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14#include <linux/err.h>
15#include <linux/of_gpio.h>
16#include <linux/gpio/consumer.h>
17#include <linux/module.h>
18#include <linux/platform_device.h>
19#include <linux/regulator/driver.h>
20#include <linux/regulator/machine.h>
21#include <linux/mfd/samsung/core.h>
22#include <linux/mfd/samsung/s5m8767.h>
23#include <linux/regulator/of_regulator.h>
24#include <linux/regmap.h>
25
26#define S5M8767_OPMODE_NORMAL_MODE 0x1
27
28struct s5m8767_info {
29 struct device *dev;
30 struct sec_pmic_dev *iodev;
31 int num_regulators;
32 struct sec_opmode_data *opmode;
33
34 int ramp_delay;
35 bool buck2_ramp;
36 bool buck3_ramp;
37 bool buck4_ramp;
38
39 bool buck2_gpiodvs;
40 bool buck3_gpiodvs;
41 bool buck4_gpiodvs;
42 u8 buck2_vol[8];
43 u8 buck3_vol[8];
44 u8 buck4_vol[8];
45 int buck_gpios[3];
46 int buck_ds[3];
47 int buck_gpioindex;
48};
49
50struct sec_voltage_desc {
51 int max;
52 int min;
53 int step;
54};
55
56static const struct sec_voltage_desc buck_voltage_val1 = {
57 .max = 2225000,
58 .min = 650000,
59 .step = 6250,
60};
61
62static const struct sec_voltage_desc buck_voltage_val2 = {
63 .max = 1600000,
64 .min = 600000,
65 .step = 6250,
66};
67
68static const struct sec_voltage_desc buck_voltage_val3 = {
69 .max = 3000000,
70 .min = 750000,
71 .step = 12500,
72};
73
74static const struct sec_voltage_desc ldo_voltage_val1 = {
75 .max = 3950000,
76 .min = 800000,
77 .step = 50000,
78};
79
80static const struct sec_voltage_desc ldo_voltage_val2 = {
81 .max = 2375000,
82 .min = 800000,
83 .step = 25000,
84};
85
86static const struct sec_voltage_desc *reg_voltage_map[] = {
87 [S5M8767_LDO1] = &ldo_voltage_val2,
88 [S5M8767_LDO2] = &ldo_voltage_val2,
89 [S5M8767_LDO3] = &ldo_voltage_val1,
90 [S5M8767_LDO4] = &ldo_voltage_val1,
91 [S5M8767_LDO5] = &ldo_voltage_val1,
92 [S5M8767_LDO6] = &ldo_voltage_val2,
93 [S5M8767_LDO7] = &ldo_voltage_val2,
94 [S5M8767_LDO8] = &ldo_voltage_val2,
95 [S5M8767_LDO9] = &ldo_voltage_val1,
96 [S5M8767_LDO10] = &ldo_voltage_val1,
97 [S5M8767_LDO11] = &ldo_voltage_val1,
98 [S5M8767_LDO12] = &ldo_voltage_val1,
99 [S5M8767_LDO13] = &ldo_voltage_val1,
100 [S5M8767_LDO14] = &ldo_voltage_val1,
101 [S5M8767_LDO15] = &ldo_voltage_val2,
102 [S5M8767_LDO16] = &ldo_voltage_val1,
103 [S5M8767_LDO17] = &ldo_voltage_val1,
104 [S5M8767_LDO18] = &ldo_voltage_val1,
105 [S5M8767_LDO19] = &ldo_voltage_val1,
106 [S5M8767_LDO20] = &ldo_voltage_val1,
107 [S5M8767_LDO21] = &ldo_voltage_val1,
108 [S5M8767_LDO22] = &ldo_voltage_val1,
109 [S5M8767_LDO23] = &ldo_voltage_val1,
110 [S5M8767_LDO24] = &ldo_voltage_val1,
111 [S5M8767_LDO25] = &ldo_voltage_val1,
112 [S5M8767_LDO26] = &ldo_voltage_val1,
113 [S5M8767_LDO27] = &ldo_voltage_val1,
114 [S5M8767_LDO28] = &ldo_voltage_val1,
115 [S5M8767_BUCK1] = &buck_voltage_val1,
116 [S5M8767_BUCK2] = &buck_voltage_val2,
117 [S5M8767_BUCK3] = &buck_voltage_val2,
118 [S5M8767_BUCK4] = &buck_voltage_val2,
119 [S5M8767_BUCK5] = &buck_voltage_val1,
120 [S5M8767_BUCK6] = &buck_voltage_val1,
121 [S5M8767_BUCK7] = &buck_voltage_val3,
122 [S5M8767_BUCK8] = &buck_voltage_val3,
123 [S5M8767_BUCK9] = &buck_voltage_val3,
124};
125
126static unsigned int s5m8767_opmode_reg[][4] = {
127
128
129 {0x0, 0x3, 0x2, 0x1},
130 {0x0, 0x3, 0x2, 0x1},
131 {0x0, 0x3, 0x2, 0x1},
132 {0x0, 0x0, 0x0, 0x0},
133 {0x0, 0x3, 0x2, 0x1},
134 {0x0, 0x3, 0x2, 0x1},
135 {0x0, 0x3, 0x2, 0x1},
136 {0x0, 0x3, 0x2, 0x1},
137 {0x0, 0x3, 0x2, 0x1},
138 {0x0, 0x3, 0x2, 0x1},
139 {0x0, 0x3, 0x2, 0x1},
140 {0x0, 0x3, 0x2, 0x1},
141 {0x0, 0x3, 0x2, 0x1},
142 {0x0, 0x3, 0x2, 0x1},
143 {0x0, 0x3, 0x2, 0x1},
144 {0x0, 0x3, 0x2, 0x1},
145 {0x0, 0x3, 0x2, 0x1},
146 {0x0, 0x0, 0x0, 0x0},
147 {0x0, 0x3, 0x2, 0x1},
148 {0x0, 0x3, 0x2, 0x1},
149 {0x0, 0x3, 0x2, 0x1},
150 {0x0, 0x3, 0x2, 0x1},
151 {0x0, 0x0, 0x0, 0x0},
152 {0x0, 0x3, 0x2, 0x1},
153 {0x0, 0x3, 0x2, 0x1},
154 {0x0, 0x3, 0x2, 0x1},
155 {0x0, 0x3, 0x2, 0x1},
156 {0x0, 0x3, 0x2, 0x1},
157
158
159 {0x0, 0x3, 0x1, 0x1},
160 {0x0, 0x3, 0x1, 0x1},
161 {0x0, 0x3, 0x1, 0x1},
162 {0x0, 0x3, 0x1, 0x1},
163 {0x0, 0x3, 0x2, 0x1},
164 {0x0, 0x3, 0x1, 0x1},
165 {0x0, 0x3, 0x1, 0x1},
166 {0x0, 0x3, 0x1, 0x1},
167 {0x0, 0x3, 0x1, 0x1},
168};
169
170static int s5m8767_get_register(struct s5m8767_info *s5m8767, int reg_id,
171 int *reg, int *enable_ctrl)
172{
173 int i;
174 unsigned int mode;
175
176 switch (reg_id) {
177 case S5M8767_LDO1 ... S5M8767_LDO2:
178 *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
179 break;
180 case S5M8767_LDO3 ... S5M8767_LDO28:
181 *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
182 break;
183 case S5M8767_BUCK1:
184 *reg = S5M8767_REG_BUCK1CTRL1;
185 break;
186 case S5M8767_BUCK2 ... S5M8767_BUCK4:
187 *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9;
188 break;
189 case S5M8767_BUCK5:
190 *reg = S5M8767_REG_BUCK5CTRL1;
191 break;
192 case S5M8767_BUCK6 ... S5M8767_BUCK9:
193 *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2;
194 break;
195 default:
196 return -EINVAL;
197 }
198
199 for (i = 0; i < s5m8767->num_regulators; i++) {
200 if (s5m8767->opmode[i].id == reg_id) {
201 mode = s5m8767->opmode[i].mode;
202 break;
203 }
204 }
205
206 if (i >= s5m8767->num_regulators)
207 return -EINVAL;
208
209 *enable_ctrl = s5m8767_opmode_reg[reg_id][mode] << S5M8767_ENCTRL_SHIFT;
210
211 return 0;
212}
213
214static int s5m8767_get_vsel_reg(int reg_id, struct s5m8767_info *s5m8767)
215{
216 int reg;
217
218 switch (reg_id) {
219 case S5M8767_LDO1 ... S5M8767_LDO2:
220 reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
221 break;
222 case S5M8767_LDO3 ... S5M8767_LDO28:
223 reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
224 break;
225 case S5M8767_BUCK1:
226 reg = S5M8767_REG_BUCK1CTRL2;
227 break;
228 case S5M8767_BUCK2:
229 reg = S5M8767_REG_BUCK2DVS1;
230 if (s5m8767->buck2_gpiodvs)
231 reg += s5m8767->buck_gpioindex;
232 break;
233 case S5M8767_BUCK3:
234 reg = S5M8767_REG_BUCK3DVS1;
235 if (s5m8767->buck3_gpiodvs)
236 reg += s5m8767->buck_gpioindex;
237 break;
238 case S5M8767_BUCK4:
239 reg = S5M8767_REG_BUCK4DVS1;
240 if (s5m8767->buck4_gpiodvs)
241 reg += s5m8767->buck_gpioindex;
242 break;
243 case S5M8767_BUCK5:
244 reg = S5M8767_REG_BUCK5CTRL2;
245 break;
246 case S5M8767_BUCK6 ... S5M8767_BUCK9:
247 reg = S5M8767_REG_BUCK6CTRL2 + (reg_id - S5M8767_BUCK6) * 2;
248 break;
249 default:
250 return -EINVAL;
251 }
252
253 return reg;
254}
255
256static int s5m8767_convert_voltage_to_sel(const struct sec_voltage_desc *desc,
257 int min_vol)
258{
259 int selector = 0;
260
261 if (desc == NULL)
262 return -EINVAL;
263
264 if (min_vol > desc->max)
265 return -EINVAL;
266
267 if (min_vol < desc->min)
268 min_vol = desc->min;
269
270 selector = DIV_ROUND_UP(min_vol - desc->min, desc->step);
271
272 if (desc->min + desc->step * selector > desc->max)
273 return -EINVAL;
274
275 return selector;
276}
277
278static inline int s5m8767_set_high(struct s5m8767_info *s5m8767)
279{
280 int temp_index = s5m8767->buck_gpioindex;
281
282 gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
283 gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
284 gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
285
286 return 0;
287}
288
289static inline int s5m8767_set_low(struct s5m8767_info *s5m8767)
290{
291 int temp_index = s5m8767->buck_gpioindex;
292
293 gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
294 gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
295 gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
296
297 return 0;
298}
299
300static int s5m8767_set_voltage_sel(struct regulator_dev *rdev,
301 unsigned selector)
302{
303 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
304 int reg_id = rdev_get_id(rdev);
305 int old_index, index = 0;
306 u8 *buck234_vol = NULL;
307
308 switch (reg_id) {
309 case S5M8767_LDO1 ... S5M8767_LDO28:
310 break;
311 case S5M8767_BUCK1 ... S5M8767_BUCK6:
312 if (reg_id == S5M8767_BUCK2 && s5m8767->buck2_gpiodvs)
313 buck234_vol = &s5m8767->buck2_vol[0];
314 else if (reg_id == S5M8767_BUCK3 && s5m8767->buck3_gpiodvs)
315 buck234_vol = &s5m8767->buck3_vol[0];
316 else if (reg_id == S5M8767_BUCK4 && s5m8767->buck4_gpiodvs)
317 buck234_vol = &s5m8767->buck4_vol[0];
318 break;
319 case S5M8767_BUCK7 ... S5M8767_BUCK8:
320 return -EINVAL;
321 case S5M8767_BUCK9:
322 break;
323 default:
324 return -EINVAL;
325 }
326
327
328 if (buck234_vol) {
329 while (*buck234_vol != selector) {
330 buck234_vol++;
331 index++;
332 }
333 old_index = s5m8767->buck_gpioindex;
334 s5m8767->buck_gpioindex = index;
335
336 if (index > old_index)
337 return s5m8767_set_high(s5m8767);
338 else
339 return s5m8767_set_low(s5m8767);
340 } else {
341 return regulator_set_voltage_sel_regmap(rdev, selector);
342 }
343}
344
345static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev,
346 unsigned int old_sel,
347 unsigned int new_sel)
348{
349 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
350 const struct sec_voltage_desc *desc;
351 int reg_id = rdev_get_id(rdev);
352
353 desc = reg_voltage_map[reg_id];
354
355 if ((old_sel < new_sel) && s5m8767->ramp_delay)
356 return DIV_ROUND_UP(desc->step * (new_sel - old_sel),
357 s5m8767->ramp_delay * 1000);
358 return 0;
359}
360
361static const struct regulator_ops s5m8767_ops = {
362 .list_voltage = regulator_list_voltage_linear,
363 .is_enabled = regulator_is_enabled_regmap,
364 .enable = regulator_enable_regmap,
365 .disable = regulator_disable_regmap,
366 .get_voltage_sel = regulator_get_voltage_sel_regmap,
367 .set_voltage_sel = s5m8767_set_voltage_sel,
368 .set_voltage_time_sel = s5m8767_set_voltage_time_sel,
369};
370
371static const struct regulator_ops s5m8767_buck78_ops = {
372 .list_voltage = regulator_list_voltage_linear,
373 .is_enabled = regulator_is_enabled_regmap,
374 .enable = regulator_enable_regmap,
375 .disable = regulator_disable_regmap,
376 .get_voltage_sel = regulator_get_voltage_sel_regmap,
377 .set_voltage_sel = regulator_set_voltage_sel_regmap,
378};
379
380#define s5m8767_regulator_desc(_name) { \
381 .name = #_name, \
382 .id = S5M8767_##_name, \
383 .ops = &s5m8767_ops, \
384 .type = REGULATOR_VOLTAGE, \
385 .owner = THIS_MODULE, \
386}
387
388#define s5m8767_regulator_buck78_desc(_name) { \
389 .name = #_name, \
390 .id = S5M8767_##_name, \
391 .ops = &s5m8767_buck78_ops, \
392 .type = REGULATOR_VOLTAGE, \
393 .owner = THIS_MODULE, \
394}
395
396static struct regulator_desc regulators[] = {
397 s5m8767_regulator_desc(LDO1),
398 s5m8767_regulator_desc(LDO2),
399 s5m8767_regulator_desc(LDO3),
400 s5m8767_regulator_desc(LDO4),
401 s5m8767_regulator_desc(LDO5),
402 s5m8767_regulator_desc(LDO6),
403 s5m8767_regulator_desc(LDO7),
404 s5m8767_regulator_desc(LDO8),
405 s5m8767_regulator_desc(LDO9),
406 s5m8767_regulator_desc(LDO10),
407 s5m8767_regulator_desc(LDO11),
408 s5m8767_regulator_desc(LDO12),
409 s5m8767_regulator_desc(LDO13),
410 s5m8767_regulator_desc(LDO14),
411 s5m8767_regulator_desc(LDO15),
412 s5m8767_regulator_desc(LDO16),
413 s5m8767_regulator_desc(LDO17),
414 s5m8767_regulator_desc(LDO18),
415 s5m8767_regulator_desc(LDO19),
416 s5m8767_regulator_desc(LDO20),
417 s5m8767_regulator_desc(LDO21),
418 s5m8767_regulator_desc(LDO22),
419 s5m8767_regulator_desc(LDO23),
420 s5m8767_regulator_desc(LDO24),
421 s5m8767_regulator_desc(LDO25),
422 s5m8767_regulator_desc(LDO26),
423 s5m8767_regulator_desc(LDO27),
424 s5m8767_regulator_desc(LDO28),
425 s5m8767_regulator_desc(BUCK1),
426 s5m8767_regulator_desc(BUCK2),
427 s5m8767_regulator_desc(BUCK3),
428 s5m8767_regulator_desc(BUCK4),
429 s5m8767_regulator_desc(BUCK5),
430 s5m8767_regulator_desc(BUCK6),
431 s5m8767_regulator_buck78_desc(BUCK7),
432 s5m8767_regulator_buck78_desc(BUCK8),
433 s5m8767_regulator_desc(BUCK9),
434};
435
436
437
438
439static void s5m8767_regulator_config_ext_control(struct s5m8767_info *s5m8767,
440 struct sec_regulator_data *rdata,
441 struct regulator_config *config)
442{
443 int i, mode = 0;
444
445 if (rdata->id != S5M8767_BUCK9)
446 return;
447
448
449 for (i = 0; i < s5m8767->num_regulators; i++) {
450 const struct sec_opmode_data *opmode = &s5m8767->opmode[i];
451 if (opmode->id == rdata->id) {
452 mode = s5m8767_opmode_reg[rdata->id][opmode->mode];
453 break;
454 }
455 }
456 if (mode != S5M8767_ENCTRL_USE_GPIO) {
457 dev_warn(s5m8767->dev,
458 "ext-control for %s: mismatched op_mode (%x), ignoring\n",
459 rdata->reg_node->name, mode);
460 return;
461 }
462
463 if (!rdata->ext_control_gpiod) {
464 dev_warn(s5m8767->dev,
465 "ext-control for %s: GPIO not valid, ignoring\n",
466 rdata->reg_node->name);
467 return;
468 }
469
470 config->ena_gpiod = rdata->ext_control_gpiod;
471}
472
473
474
475
476static int s5m8767_enable_ext_control(struct s5m8767_info *s5m8767,
477 struct regulator_dev *rdev)
478{
479 int id = rdev_get_id(rdev);
480 int ret, reg, enable_ctrl;
481
482 if (id != S5M8767_BUCK9)
483 return -EINVAL;
484
485 ret = s5m8767_get_register(s5m8767, id, ®, &enable_ctrl);
486 if (ret)
487 return ret;
488
489 return regmap_update_bits(s5m8767->iodev->regmap_pmic,
490 reg, S5M8767_ENCTRL_MASK,
491 S5M8767_ENCTRL_USE_GPIO << S5M8767_ENCTRL_SHIFT);
492}
493
494
495#ifdef CONFIG_OF
496static int s5m8767_pmic_dt_parse_dvs_gpio(struct sec_pmic_dev *iodev,
497 struct sec_platform_data *pdata,
498 struct device_node *pmic_np)
499{
500 int i, gpio;
501
502 for (i = 0; i < 3; i++) {
503 gpio = of_get_named_gpio(pmic_np,
504 "s5m8767,pmic-buck-dvs-gpios", i);
505 if (!gpio_is_valid(gpio)) {
506 dev_err(iodev->dev, "invalid gpio[%d]: %d\n", i, gpio);
507 return -EINVAL;
508 }
509 pdata->buck_gpios[i] = gpio;
510 }
511 return 0;
512}
513
514static int s5m8767_pmic_dt_parse_ds_gpio(struct sec_pmic_dev *iodev,
515 struct sec_platform_data *pdata,
516 struct device_node *pmic_np)
517{
518 int i, gpio;
519
520 for (i = 0; i < 3; i++) {
521 gpio = of_get_named_gpio(pmic_np,
522 "s5m8767,pmic-buck-ds-gpios", i);
523 if (!gpio_is_valid(gpio)) {
524 dev_err(iodev->dev, "invalid gpio[%d]: %d\n", i, gpio);
525 return -EINVAL;
526 }
527 pdata->buck_ds[i] = gpio;
528 }
529 return 0;
530}
531
532static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev,
533 struct sec_platform_data *pdata)
534{
535 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
536 struct device_node *pmic_np, *regulators_np, *reg_np;
537 struct sec_regulator_data *rdata;
538 struct sec_opmode_data *rmode;
539 unsigned int i, dvs_voltage_nr = 8, ret;
540
541 pmic_np = iodev->dev->of_node;
542 if (!pmic_np) {
543 dev_err(iodev->dev, "could not find pmic sub-node\n");
544 return -ENODEV;
545 }
546
547 regulators_np = of_get_child_by_name(pmic_np, "regulators");
548 if (!regulators_np) {
549 dev_err(iodev->dev, "could not find regulators sub-node\n");
550 return -EINVAL;
551 }
552
553
554 pdata->num_regulators = of_get_child_count(regulators_np);
555
556 rdata = devm_kcalloc(&pdev->dev,
557 pdata->num_regulators, sizeof(*rdata),
558 GFP_KERNEL);
559 if (!rdata)
560 return -ENOMEM;
561
562 rmode = devm_kcalloc(&pdev->dev,
563 pdata->num_regulators, sizeof(*rmode),
564 GFP_KERNEL);
565 if (!rmode)
566 return -ENOMEM;
567
568 pdata->regulators = rdata;
569 pdata->opmode = rmode;
570 for_each_child_of_node(regulators_np, reg_np) {
571 for (i = 0; i < ARRAY_SIZE(regulators); i++)
572 if (!of_node_cmp(reg_np->name, regulators[i].name))
573 break;
574
575 if (i == ARRAY_SIZE(regulators)) {
576 dev_warn(iodev->dev,
577 "don't know how to configure regulator %s\n",
578 reg_np->name);
579 continue;
580 }
581
582 rdata->ext_control_gpiod = devm_gpiod_get_from_of_node(&pdev->dev,
583 reg_np,
584 "s5m8767,pmic-ext-control-gpios",
585 0,
586 GPIOD_OUT_HIGH,
587 "s5m8767");
588 if (PTR_ERR(rdata->ext_control_gpiod) == -ENOENT)
589 rdata->ext_control_gpiod = NULL;
590 else if (IS_ERR(rdata->ext_control_gpiod))
591 return PTR_ERR(rdata->ext_control_gpiod);
592
593 rdata->id = i;
594 rdata->initdata = of_get_regulator_init_data(
595 &pdev->dev, reg_np,
596 ®ulators[i]);
597 rdata->reg_node = reg_np;
598 rdata++;
599 rmode->id = i;
600 if (of_property_read_u32(reg_np, "op_mode",
601 &rmode->mode)) {
602 dev_warn(iodev->dev,
603 "no op_mode property property at %pOF\n",
604 reg_np);
605
606 rmode->mode = S5M8767_OPMODE_NORMAL_MODE;
607 }
608 rmode++;
609 }
610
611 of_node_put(regulators_np);
612
613 if (of_get_property(pmic_np, "s5m8767,pmic-buck2-uses-gpio-dvs", NULL)) {
614 pdata->buck2_gpiodvs = true;
615
616 if (of_property_read_u32_array(pmic_np,
617 "s5m8767,pmic-buck2-dvs-voltage",
618 pdata->buck2_voltage, dvs_voltage_nr)) {
619 dev_err(iodev->dev, "buck2 voltages not specified\n");
620 return -EINVAL;
621 }
622 }
623
624 if (of_get_property(pmic_np, "s5m8767,pmic-buck3-uses-gpio-dvs", NULL)) {
625 pdata->buck3_gpiodvs = true;
626
627 if (of_property_read_u32_array(pmic_np,
628 "s5m8767,pmic-buck3-dvs-voltage",
629 pdata->buck3_voltage, dvs_voltage_nr)) {
630 dev_err(iodev->dev, "buck3 voltages not specified\n");
631 return -EINVAL;
632 }
633 }
634
635 if (of_get_property(pmic_np, "s5m8767,pmic-buck4-uses-gpio-dvs", NULL)) {
636 pdata->buck4_gpiodvs = true;
637
638 if (of_property_read_u32_array(pmic_np,
639 "s5m8767,pmic-buck4-dvs-voltage",
640 pdata->buck4_voltage, dvs_voltage_nr)) {
641 dev_err(iodev->dev, "buck4 voltages not specified\n");
642 return -EINVAL;
643 }
644 }
645
646 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
647 pdata->buck4_gpiodvs) {
648 ret = s5m8767_pmic_dt_parse_dvs_gpio(iodev, pdata, pmic_np);
649 if (ret)
650 return -EINVAL;
651
652 if (of_property_read_u32(pmic_np,
653 "s5m8767,pmic-buck-default-dvs-idx",
654 &pdata->buck_default_idx)) {
655 pdata->buck_default_idx = 0;
656 } else {
657 if (pdata->buck_default_idx >= 8) {
658 pdata->buck_default_idx = 0;
659 dev_info(iodev->dev,
660 "invalid value for default dvs index, use 0\n");
661 }
662 }
663 }
664
665 ret = s5m8767_pmic_dt_parse_ds_gpio(iodev, pdata, pmic_np);
666 if (ret)
667 return -EINVAL;
668
669 if (of_get_property(pmic_np, "s5m8767,pmic-buck2-ramp-enable", NULL))
670 pdata->buck2_ramp_enable = true;
671
672 if (of_get_property(pmic_np, "s5m8767,pmic-buck3-ramp-enable", NULL))
673 pdata->buck3_ramp_enable = true;
674
675 if (of_get_property(pmic_np, "s5m8767,pmic-buck4-ramp-enable", NULL))
676 pdata->buck4_ramp_enable = true;
677
678 if (pdata->buck2_ramp_enable || pdata->buck3_ramp_enable
679 || pdata->buck4_ramp_enable) {
680 if (of_property_read_u32(pmic_np, "s5m8767,pmic-buck-ramp-delay",
681 &pdata->buck_ramp_delay))
682 pdata->buck_ramp_delay = 0;
683 }
684
685 return 0;
686}
687#else
688static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev,
689 struct sec_platform_data *pdata)
690{
691 return 0;
692}
693#endif
694
695static int s5m8767_pmic_probe(struct platform_device *pdev)
696{
697 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
698 struct sec_platform_data *pdata = iodev->pdata;
699 struct regulator_config config = { };
700 struct s5m8767_info *s5m8767;
701 int i, ret, buck_init;
702
703 if (!pdata) {
704 dev_err(pdev->dev.parent, "Platform data not supplied\n");
705 return -ENODEV;
706 }
707
708 if (iodev->dev->of_node) {
709 ret = s5m8767_pmic_dt_parse_pdata(pdev, pdata);
710 if (ret)
711 return ret;
712 }
713
714 if (pdata->buck2_gpiodvs) {
715 if (pdata->buck3_gpiodvs || pdata->buck4_gpiodvs) {
716 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
717 return -EINVAL;
718 }
719 }
720
721 if (pdata->buck3_gpiodvs) {
722 if (pdata->buck2_gpiodvs || pdata->buck4_gpiodvs) {
723 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
724 return -EINVAL;
725 }
726 }
727
728 if (pdata->buck4_gpiodvs) {
729 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs) {
730 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
731 return -EINVAL;
732 }
733 }
734
735 s5m8767 = devm_kzalloc(&pdev->dev, sizeof(struct s5m8767_info),
736 GFP_KERNEL);
737 if (!s5m8767)
738 return -ENOMEM;
739
740 s5m8767->dev = &pdev->dev;
741 s5m8767->iodev = iodev;
742 s5m8767->num_regulators = pdata->num_regulators;
743 platform_set_drvdata(pdev, s5m8767);
744
745 s5m8767->buck_gpioindex = pdata->buck_default_idx;
746 s5m8767->buck2_gpiodvs = pdata->buck2_gpiodvs;
747 s5m8767->buck3_gpiodvs = pdata->buck3_gpiodvs;
748 s5m8767->buck4_gpiodvs = pdata->buck4_gpiodvs;
749 s5m8767->buck_gpios[0] = pdata->buck_gpios[0];
750 s5m8767->buck_gpios[1] = pdata->buck_gpios[1];
751 s5m8767->buck_gpios[2] = pdata->buck_gpios[2];
752 s5m8767->buck_ds[0] = pdata->buck_ds[0];
753 s5m8767->buck_ds[1] = pdata->buck_ds[1];
754 s5m8767->buck_ds[2] = pdata->buck_ds[2];
755
756 s5m8767->ramp_delay = pdata->buck_ramp_delay;
757 s5m8767->buck2_ramp = pdata->buck2_ramp_enable;
758 s5m8767->buck3_ramp = pdata->buck3_ramp_enable;
759 s5m8767->buck4_ramp = pdata->buck4_ramp_enable;
760 s5m8767->opmode = pdata->opmode;
761
762 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
763 pdata->buck2_init);
764
765 regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK2DVS2,
766 buck_init);
767
768 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
769 pdata->buck3_init);
770
771 regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK3DVS2,
772 buck_init);
773
774 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
775 pdata->buck4_init);
776
777 regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK4DVS2,
778 buck_init);
779
780 for (i = 0; i < 8; i++) {
781 if (s5m8767->buck2_gpiodvs) {
782 s5m8767->buck2_vol[i] =
783 s5m8767_convert_voltage_to_sel(
784 &buck_voltage_val2,
785 pdata->buck2_voltage[i]);
786 }
787
788 if (s5m8767->buck3_gpiodvs) {
789 s5m8767->buck3_vol[i] =
790 s5m8767_convert_voltage_to_sel(
791 &buck_voltage_val2,
792 pdata->buck3_voltage[i]);
793 }
794
795 if (s5m8767->buck4_gpiodvs) {
796 s5m8767->buck4_vol[i] =
797 s5m8767_convert_voltage_to_sel(
798 &buck_voltage_val2,
799 pdata->buck4_voltage[i]);
800 }
801 }
802
803 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
804 pdata->buck4_gpiodvs) {
805
806 if (!gpio_is_valid(pdata->buck_gpios[0]) ||
807 !gpio_is_valid(pdata->buck_gpios[1]) ||
808 !gpio_is_valid(pdata->buck_gpios[2])) {
809 dev_err(&pdev->dev, "GPIO NOT VALID\n");
810 return -EINVAL;
811 }
812
813 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[0],
814 "S5M8767 SET1");
815 if (ret)
816 return ret;
817
818 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[1],
819 "S5M8767 SET2");
820 if (ret)
821 return ret;
822
823 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[2],
824 "S5M8767 SET3");
825 if (ret)
826 return ret;
827
828
829 gpio_direction_output(pdata->buck_gpios[0],
830 (s5m8767->buck_gpioindex >> 2) & 0x1);
831
832 gpio_direction_output(pdata->buck_gpios[1],
833 (s5m8767->buck_gpioindex >> 1) & 0x1);
834
835 gpio_direction_output(pdata->buck_gpios[2],
836 (s5m8767->buck_gpioindex >> 0) & 0x1);
837 }
838
839 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[0], "S5M8767 DS2");
840 if (ret)
841 return ret;
842
843 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[1], "S5M8767 DS3");
844 if (ret)
845 return ret;
846
847 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[2], "S5M8767 DS4");
848 if (ret)
849 return ret;
850
851
852 gpio_direction_output(pdata->buck_ds[0], 0x0);
853
854 gpio_direction_output(pdata->buck_ds[1], 0x0);
855
856 gpio_direction_output(pdata->buck_ds[2], 0x0);
857
858 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
859 pdata->buck4_gpiodvs) {
860 regmap_update_bits(s5m8767->iodev->regmap_pmic,
861 S5M8767_REG_BUCK2CTRL, 1 << 1,
862 (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1));
863 regmap_update_bits(s5m8767->iodev->regmap_pmic,
864 S5M8767_REG_BUCK3CTRL, 1 << 1,
865 (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1));
866 regmap_update_bits(s5m8767->iodev->regmap_pmic,
867 S5M8767_REG_BUCK4CTRL, 1 << 1,
868 (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1));
869 }
870
871
872 for (i = 0; i < 8; i++) {
873 if (s5m8767->buck2_gpiodvs) {
874 regmap_write(s5m8767->iodev->regmap_pmic,
875 S5M8767_REG_BUCK2DVS1 + i,
876 s5m8767->buck2_vol[i]);
877 }
878
879 if (s5m8767->buck3_gpiodvs) {
880 regmap_write(s5m8767->iodev->regmap_pmic,
881 S5M8767_REG_BUCK3DVS1 + i,
882 s5m8767->buck3_vol[i]);
883 }
884
885 if (s5m8767->buck4_gpiodvs) {
886 regmap_write(s5m8767->iodev->regmap_pmic,
887 S5M8767_REG_BUCK4DVS1 + i,
888 s5m8767->buck4_vol[i]);
889 }
890 }
891
892 if (s5m8767->buck2_ramp)
893 regmap_update_bits(s5m8767->iodev->regmap_pmic,
894 S5M8767_REG_DVSRAMP, 0x08, 0x08);
895
896 if (s5m8767->buck3_ramp)
897 regmap_update_bits(s5m8767->iodev->regmap_pmic,
898 S5M8767_REG_DVSRAMP, 0x04, 0x04);
899
900 if (s5m8767->buck4_ramp)
901 regmap_update_bits(s5m8767->iodev->regmap_pmic,
902 S5M8767_REG_DVSRAMP, 0x02, 0x02);
903
904 if (s5m8767->buck2_ramp || s5m8767->buck3_ramp
905 || s5m8767->buck4_ramp) {
906 unsigned int val;
907 switch (s5m8767->ramp_delay) {
908 case 5:
909 val = S5M8767_DVS_BUCK_RAMP_5;
910 break;
911 case 10:
912 val = S5M8767_DVS_BUCK_RAMP_10;
913 break;
914 case 25:
915 val = S5M8767_DVS_BUCK_RAMP_25;
916 break;
917 case 50:
918 val = S5M8767_DVS_BUCK_RAMP_50;
919 break;
920 case 100:
921 val = S5M8767_DVS_BUCK_RAMP_100;
922 break;
923 default:
924 val = S5M8767_DVS_BUCK_RAMP_10;
925 }
926 regmap_update_bits(s5m8767->iodev->regmap_pmic,
927 S5M8767_REG_DVSRAMP,
928 S5M8767_DVS_BUCK_RAMP_MASK,
929 val << S5M8767_DVS_BUCK_RAMP_SHIFT);
930 }
931
932 for (i = 0; i < pdata->num_regulators; i++) {
933 const struct sec_voltage_desc *desc;
934 int id = pdata->regulators[i].id;
935 int enable_reg, enable_val;
936 struct regulator_dev *rdev;
937
938 desc = reg_voltage_map[id];
939 if (desc) {
940 regulators[id].n_voltages =
941 (desc->max - desc->min) / desc->step + 1;
942 regulators[id].min_uV = desc->min;
943 regulators[id].uV_step = desc->step;
944 regulators[id].vsel_reg =
945 s5m8767_get_vsel_reg(id, s5m8767);
946 if (id < S5M8767_BUCK1)
947 regulators[id].vsel_mask = 0x3f;
948 else
949 regulators[id].vsel_mask = 0xff;
950
951 ret = s5m8767_get_register(s5m8767, id, &enable_reg,
952 &enable_val);
953 if (ret) {
954 dev_err(s5m8767->dev, "error reading registers\n");
955 return ret;
956 }
957 regulators[id].enable_reg = enable_reg;
958 regulators[id].enable_mask = S5M8767_ENCTRL_MASK;
959 regulators[id].enable_val = enable_val;
960 }
961
962 config.dev = s5m8767->dev;
963 config.init_data = pdata->regulators[i].initdata;
964 config.driver_data = s5m8767;
965 config.regmap = iodev->regmap_pmic;
966 config.of_node = pdata->regulators[i].reg_node;
967 config.ena_gpiod = NULL;
968 if (pdata->regulators[i].ext_control_gpiod)
969 s5m8767_regulator_config_ext_control(s5m8767,
970 &pdata->regulators[i], &config);
971
972 rdev = devm_regulator_register(&pdev->dev, ®ulators[id],
973 &config);
974 if (IS_ERR(rdev)) {
975 ret = PTR_ERR(rdev);
976 dev_err(s5m8767->dev, "regulator init failed for %d\n",
977 id);
978 return ret;
979 }
980
981 if (pdata->regulators[i].ext_control_gpiod) {
982 ret = s5m8767_enable_ext_control(s5m8767, rdev);
983 if (ret < 0) {
984 dev_err(s5m8767->dev,
985 "failed to enable gpio control over %s: %d\n",
986 rdev->desc->name, ret);
987 return ret;
988 }
989 }
990 }
991
992 return 0;
993}
994
995static const struct platform_device_id s5m8767_pmic_id[] = {
996 { "s5m8767-pmic", 0},
997 { },
998};
999MODULE_DEVICE_TABLE(platform, s5m8767_pmic_id);
1000
1001static struct platform_driver s5m8767_pmic_driver = {
1002 .driver = {
1003 .name = "s5m8767-pmic",
1004 },
1005 .probe = s5m8767_pmic_probe,
1006 .id_table = s5m8767_pmic_id,
1007};
1008
1009static int __init s5m8767_pmic_init(void)
1010{
1011 return platform_driver_register(&s5m8767_pmic_driver);
1012}
1013subsys_initcall(s5m8767_pmic_init);
1014
1015static void __exit s5m8767_pmic_exit(void)
1016{
1017 platform_driver_unregister(&s5m8767_pmic_driver);
1018}
1019module_exit(s5m8767_pmic_exit);
1020
1021
1022MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
1023MODULE_DESCRIPTION("SAMSUNG S5M8767 Regulator Driver");
1024MODULE_LICENSE("GPL");
1025
