LXR linux/arch/s390/include/asm/processor.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 *  S390 version
   4 *    Copyright IBM Corp. 1999
   5 *    Author(s): Hartmut Penner (hp@de.ibm.com),
   6 *               Martin Schwidefsky (schwidefsky@de.ibm.com)
   7 *
   8 *  Derived from "include/asm-i386/processor.h"
   9 *    Copyright (C) 1994, Linus Torvalds
  10 */
  11
  12#ifndef __ASM_S390_PROCESSOR_H
  13#define __ASM_S390_PROCESSOR_H
  14
  15#include <linux/const.h>
  16
  17#define CIF_MCCK_PENDING        0       /* machine check handling is pending */
  18#define CIF_ASCE_PRIMARY        1       /* primary asce needs fixup / uaccess */
  19#define CIF_ASCE_SECONDARY      2       /* secondary asce needs fixup / uaccess */
  20#define CIF_NOHZ_DELAY          3       /* delay HZ disable for a tick */
  21#define CIF_FPU                 4       /* restore FPU registers */
  22#define CIF_IGNORE_IRQ          5       /* ignore interrupt (for udelay) */
  23#define CIF_ENABLED_WAIT        6       /* in enabled wait state */
  24#define CIF_MCCK_GUEST          7       /* machine check happening in guest */
  25#define CIF_DEDICATED_CPU       8       /* this CPU is dedicated */
  26
  27#define _CIF_MCCK_PENDING       _BITUL(CIF_MCCK_PENDING)
  28#define _CIF_ASCE_PRIMARY       _BITUL(CIF_ASCE_PRIMARY)
  29#define _CIF_ASCE_SECONDARY     _BITUL(CIF_ASCE_SECONDARY)
  30#define _CIF_NOHZ_DELAY         _BITUL(CIF_NOHZ_DELAY)
  31#define _CIF_FPU                _BITUL(CIF_FPU)
  32#define _CIF_IGNORE_IRQ         _BITUL(CIF_IGNORE_IRQ)
  33#define _CIF_ENABLED_WAIT       _BITUL(CIF_ENABLED_WAIT)
  34#define _CIF_MCCK_GUEST         _BITUL(CIF_MCCK_GUEST)
  35#define _CIF_DEDICATED_CPU      _BITUL(CIF_DEDICATED_CPU)
  36
  37#ifndef __ASSEMBLY__
  38
  39#include <linux/linkage.h>
  40#include <linux/irqflags.h>
  41#include <asm/cpu.h>
  42#include <asm/page.h>
  43#include <asm/ptrace.h>
  44#include <asm/setup.h>
  45#include <asm/runtime_instr.h>
  46#include <asm/fpu/types.h>
  47#include <asm/fpu/internal.h>
  48
  49#include <linux/rh_kabi.h>
  50
  51static inline void set_cpu_flag(int flag)
  52{
  53        S390_lowcore.cpu_flags |= (1UL << flag);
  54}
  55
  56static inline void clear_cpu_flag(int flag)
  57{
  58        S390_lowcore.cpu_flags &= ~(1UL << flag);
  59}
  60
  61static inline int test_cpu_flag(int flag)
  62{
  63        return !!(S390_lowcore.cpu_flags & (1UL << flag));
  64}
  65
  66/*
  67 * Test CIF flag of another CPU. The caller needs to ensure that
  68 * CPU hotplug can not happen, e.g. by disabling preemption.
  69 */
  70static inline int test_cpu_flag_of(int flag, int cpu)
  71{
  72        struct lowcore *lc = lowcore_ptr[cpu];
  73        return !!(lc->cpu_flags & (1UL << flag));
  74}
  75
  76#define arch_needs_cpu() test_cpu_flag(CIF_NOHZ_DELAY)
  77
  78/*
  79 * Default implementation of macro that returns current
  80 * instruction pointer ("program counter").
  81 */
  82#define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
  83
  84static inline void get_cpu_id(struct cpuid *ptr)
  85{
  86        asm volatile("stidp %0" : "=Q" (*ptr));
  87}
  88
  89void s390_adjust_jiffies(void);
  90void s390_update_cpu_mhz(void);
  91void cpu_detect_mhz_feature(void);
  92
  93extern const struct seq_operations cpuinfo_op;
  94extern int sysctl_ieee_emulation_warnings;
  95extern void execve_tail(void);
  96extern void __bpon(void);
  97
  98/*
  99 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
 100 */
 101
 102#define TASK_SIZE_OF(tsk)       (test_tsk_thread_flag(tsk, TIF_31BIT) ? \
 103                                        (1UL << 31) : -PAGE_SIZE)
 104#define TASK_UNMAPPED_BASE      (test_thread_flag(TIF_31BIT) ? \
 105                                        (1UL << 30) : (1UL << 41))
 106#define TASK_SIZE               TASK_SIZE_OF(current)
 107#define TASK_SIZE_MAX           (-PAGE_SIZE)
 108
 109#define STACK_TOP               (test_thread_flag(TIF_31BIT) ? \
 110                                        (1UL << 31) : (1UL << 42))
 111#define STACK_TOP_MAX           (1UL << 42)
 112
 113#define HAVE_ARCH_PICK_MMAP_LAYOUT
 114
 115typedef unsigned int mm_segment_t;
 116
 117/*
 118 * Thread structure
 119 */
 120struct thread_struct {
 121        unsigned int  acrs[NUM_ACRS];
 122        unsigned long ksp;              /* kernel stack pointer             */
 123        unsigned long user_timer;       /* task cputime in user space */
 124        unsigned long guest_timer;      /* task cputime in kvm guest */
 125        unsigned long system_timer;     /* task cputime in kernel space */
 126        unsigned long hardirq_timer;    /* task cputime in hardirq context */
 127        unsigned long softirq_timer;    /* task cputime in softirq context */
 128        unsigned long sys_call_table;   /* system call table address */
 129        mm_segment_t mm_segment;
 130        unsigned long gmap_addr;        /* address of last gmap fault. */
 131        unsigned int gmap_write_flag;   /* gmap fault write indication */
 132        unsigned int gmap_int_code;     /* int code of last gmap fault */
 133        unsigned int gmap_pfault;       /* signal of a pending guest pfault */
 134        /* Per-thread information related to debugging */
 135        struct per_regs per_user;       /* User specified PER registers */
 136        struct per_event per_event;     /* Cause of the last PER trap */
 137        unsigned long per_flags;        /* Flags to control debug behavior */
 138        unsigned int system_call;       /* system call number in signal */
 139        unsigned long last_break;       /* last breaking-event-address. */
 140        /* pfault_wait is used to block the process on a pfault event */
 141        unsigned long pfault_wait;
 142        struct list_head list;
 143        /* cpu runtime instrumentation */
 144        struct runtime_instr_cb *ri_cb;
 145        struct gs_cb *gs_cb;            /* Current guarded storage cb */
 146        struct gs_cb *gs_bc_cb;         /* Broadcast guarded storage cb */
 147        unsigned char trap_tdb[256];    /* Transaction abort diagnose block */
 148
 149        RH_KABI_RESERVE(1)
 150        RH_KABI_RESERVE(2)
 151        RH_KABI_RESERVE(3)
 152        RH_KABI_RESERVE(4)
 153
 154        /*
 155         * Warning: 'fpu' is dynamically-sized. It *MUST* be at
 156         * the end.
 157         */
 158        struct fpu fpu;                 /* FP and VX register save area */
 159};
 160
 161/* Flag to disable transactions. */
 162#define PER_FLAG_NO_TE                  1UL
 163/* Flag to enable random transaction aborts. */
 164#define PER_FLAG_TE_ABORT_RAND          2UL
 165/* Flag to specify random transaction abort mode:
 166 * - abort each transaction at a random instruction before TEND if set.
 167 * - abort random transactions at a random instruction if cleared.
 168 */
 169#define PER_FLAG_TE_ABORT_RAND_TEND     4UL
 170
 171typedef struct thread_struct thread_struct;
 172
 173/*
 174 * Stack layout of a C stack frame.
 175 */
 176#ifndef __PACK_STACK
 177struct stack_frame {
 178        unsigned long back_chain;
 179        unsigned long empty1[5];
 180        unsigned long gprs[10];
 181        unsigned int  empty2[8];
 182};
 183#else
 184struct stack_frame {
 185        unsigned long empty1[5];
 186        unsigned int  empty2[8];
 187        unsigned long gprs[10];
 188        unsigned long back_chain;
 189};
 190#endif
 191
 192#define ARCH_MIN_TASKALIGN      8
 193
 194#define INIT_THREAD {                                                   \
 195        .ksp = sizeof(init_stack) + (unsigned long) &init_stack,        \
 196        .fpu.regs = (void *) init_task.thread.fpu.fprs,                 \
 197        .last_break = 1,                                                \
 198}
 199
 200/*
 201 * Do necessary setup to start up a new thread.
 202 */
 203#define start_thread(regs, new_psw, new_stackp) do {                    \
 204        regs->psw.mask  = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA;    \
 205        regs->psw.addr  = new_psw;                                      \
 206        regs->gprs[15]  = new_stackp;                                   \
 207        execve_tail();                                                  \
 208} while (0)
 209
 210#define start_thread31(regs, new_psw, new_stackp) do {                  \
 211        regs->psw.mask  = PSW_USER_BITS | PSW_MASK_BA;                  \
 212        regs->psw.addr  = new_psw;                                      \
 213        regs->gprs[15]  = new_stackp;                                   \
 214        crst_table_downgrade(current->mm);                              \
 215        execve_tail();                                                  \
 216} while (0)
 217
 218/* Forward declaration, a strange C thing */
 219struct task_struct;
 220struct mm_struct;
 221struct seq_file;
 222struct pt_regs;
 223
 224typedef int (*dump_trace_func_t)(void *data, unsigned long address, int reliable);
 225void dump_trace(dump_trace_func_t func, void *data,
 226                struct task_struct *task, unsigned long sp);
 227void show_registers(struct pt_regs *regs);
 228
 229void show_cacheinfo(struct seq_file *m);
 230
 231/* Free all resources held by a thread. */
 232static inline void release_thread(struct task_struct *tsk) { }
 233
 234/* Free guarded storage control block */
 235void guarded_storage_release(struct task_struct *tsk);
 236
 237unsigned long get_wchan(struct task_struct *p);
 238#define task_pt_regs(tsk) ((struct pt_regs *) \
 239        (task_stack_page(tsk) + THREAD_SIZE) - 1)
 240#define KSTK_EIP(tsk)   (task_pt_regs(tsk)->psw.addr)
 241#define KSTK_ESP(tsk)   (task_pt_regs(tsk)->gprs[15])
 242
 243/* Has task runtime instrumentation enabled ? */
 244#define is_ri_task(tsk) (!!(tsk)->thread.ri_cb)
 245
 246static inline unsigned long current_stack_pointer(void)
 247{
 248        unsigned long sp;
 249
 250        asm volatile("la %0,0(15)" : "=a" (sp));
 251        return sp;
 252}
 253
 254static __no_kasan_or_inline unsigned short stap(void)
 255{
 256        unsigned short cpu_address;
 257
 258        asm volatile("stap %0" : "=Q" (cpu_address));
 259        return cpu_address;
 260}
 261
 262/*
 263 * Give up the time slice of the virtual PU.
 264 */
 265#define cpu_relax_yield cpu_relax_yield
 266void cpu_relax_yield(void);
 267
 268#define cpu_relax() barrier()
 269
 270#define ECAG_CACHE_ATTRIBUTE    0
 271#define ECAG_CPU_ATTRIBUTE      1
 272
 273static inline unsigned long __ecag(unsigned int asi, unsigned char parm)
 274{
 275        unsigned long val;
 276
 277        asm volatile(".insn     rsy,0xeb000000004c,%0,0,0(%1)" /* ecag */
 278                     : "=d" (val) : "a" (asi << 8 | parm));
 279        return val;
 280}
 281
 282static inline void psw_set_key(unsigned int key)
 283{
 284        asm volatile("spka 0(%0)" : : "d" (key));
 285}
 286
 287/*
 288 * Set PSW to specified value.
 289 */
 290static inline void __load_psw(psw_t psw)
 291{
 292        asm volatile("lpswe %0" : : "Q" (psw) : "cc");
 293}
 294
 295/*
 296 * Set PSW mask to specified value, while leaving the
 297 * PSW addr pointing to the next instruction.
 298 */
 299static __no_kasan_or_inline void __load_psw_mask(unsigned long mask)
 300{
 301        unsigned long addr;
 302        psw_t psw;
 303
 304        psw.mask = mask;
 305
 306        asm volatile(
 307                "       larl    %0,1f\n"
 308                "       stg     %0,%O1+8(%R1)\n"
 309                "       lpswe   %1\n"
 310                "1:"
 311                : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
 312}
 313
 314/*
 315 * Extract current PSW mask
 316 */
 317static inline unsigned long __extract_psw(void)
 318{
 319        unsigned int reg1, reg2;
 320
 321        asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2));
 322        return (((unsigned long) reg1) << 32) | ((unsigned long) reg2);
 323}
 324
 325static inline void local_mcck_enable(void)
 326{
 327        __load_psw_mask(__extract_psw() | PSW_MASK_MCHECK);
 328}
 329
 330static inline void local_mcck_disable(void)
 331{
 332        __load_psw_mask(__extract_psw() & ~PSW_MASK_MCHECK);
 333}
 334
 335/*
 336 * Rewind PSW instruction address by specified number of bytes.
 337 */
 338static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc)
 339{
 340        unsigned long mask;
 341
 342        mask = (psw.mask & PSW_MASK_EA) ? -1UL :
 343               (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 :
 344                                          (1UL << 24) - 1;
 345        return (psw.addr - ilc) & mask;
 346}
 347
 348/*
 349 * Function to stop a processor until the next interrupt occurs
 350 */
 351void enabled_wait(void);
 352
 353/*
 354 * Function to drop a processor into disabled wait state
 355 */
 356static inline void __noreturn disabled_wait(unsigned long code)
 357{
 358        psw_t psw;
 359
 360        psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA;
 361        psw.addr = code;
 362        __load_psw(psw);
 363        while (1);
 364}
 365
 366/*
 367 * Basic Machine Check/Program Check Handler.
 368 */
 369
 370extern void s390_base_mcck_handler(void);
 371extern void s390_base_pgm_handler(void);
 372extern void s390_base_ext_handler(void);
 373
 374extern void (*s390_base_mcck_handler_fn)(void);
 375extern void (*s390_base_pgm_handler_fn)(void);
 376extern void (*s390_base_ext_handler_fn)(void);
 377
 378#define ARCH_LOW_ADDRESS_LIMIT  0x7fffffffUL
 379
 380extern int memcpy_real(void *, void *, size_t);
 381extern void memcpy_absolute(void *, void *, size_t);
 382
 383#define mem_assign_absolute(dest, val) do {                     \
 384        __typeof__(dest) __tmp = (val);                         \
 385                                                                \
 386        BUILD_BUG_ON(sizeof(__tmp) != sizeof(val));             \
 387        memcpy_absolute(&(dest), &__tmp, sizeof(__tmp));        \
 388} while (0)
 389
 390extern int s390_isolate_bp(void);
 391extern int s390_isolate_bp_guest(void);
 392
 393#endif /* __ASSEMBLY__ */
 394
 395#endif /* __ASM_S390_PROCESSOR_H */
 396