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16#include <linux/platform_device.h>
17#include <linux/init.h>
18#include <linux/serial.h>
19#include <linux/io.h>
20#include <linux/serial_sci.h>
21#include <linux/sh_timer.h>
22#include <linux/sh_intc.h>
23#include <linux/usb/ohci_pdriver.h>
24#include <asm/rtc.h>
25#include <cpu/serial.h>
26
27static struct resource rtc_resources[] = {
28 [0] = {
29 .start = 0xa413fec0,
30 .end = 0xa413fec0 + 0x28 - 1,
31 .flags = IORESOURCE_IO,
32 },
33 [1] = {
34
35 .start = evt2irq(0x480),
36 .flags = IORESOURCE_IRQ,
37 },
38};
39
40static struct sh_rtc_platform_info rtc_info = {
41 .capabilities = RTC_CAP_4_DIGIT_YEAR,
42};
43
44static struct platform_device rtc_device = {
45 .name = "sh-rtc",
46 .id = -1,
47 .num_resources = ARRAY_SIZE(rtc_resources),
48 .resource = rtc_resources,
49 .dev = {
50 .platform_data = &rtc_info,
51 },
52};
53
54static struct plat_sci_port scif0_platform_data = {
55 .type = PORT_SCIF,
56 .ops = &sh7720_sci_port_ops,
57 .regtype = SCIx_SH7705_SCIF_REGTYPE,
58};
59
60static struct resource scif0_resources[] = {
61 DEFINE_RES_MEM(0xa4430000, 0x100),
62 DEFINE_RES_IRQ(evt2irq(0xc00)),
63};
64
65static struct platform_device scif0_device = {
66 .name = "sh-sci",
67 .id = 0,
68 .resource = scif0_resources,
69 .num_resources = ARRAY_SIZE(scif0_resources),
70 .dev = {
71 .platform_data = &scif0_platform_data,
72 },
73};
74
75static struct plat_sci_port scif1_platform_data = {
76 .type = PORT_SCIF,
77 .ops = &sh7720_sci_port_ops,
78 .regtype = SCIx_SH7705_SCIF_REGTYPE,
79};
80
81static struct resource scif1_resources[] = {
82 DEFINE_RES_MEM(0xa4438000, 0x100),
83 DEFINE_RES_IRQ(evt2irq(0xc20)),
84};
85
86static struct platform_device scif1_device = {
87 .name = "sh-sci",
88 .id = 1,
89 .resource = scif1_resources,
90 .num_resources = ARRAY_SIZE(scif1_resources),
91 .dev = {
92 .platform_data = &scif1_platform_data,
93 },
94};
95
96static struct resource usb_ohci_resources[] = {
97 [0] = {
98 .start = 0xA4428000,
99 .end = 0xA44280FF,
100 .flags = IORESOURCE_MEM,
101 },
102 [1] = {
103 .start = evt2irq(0xa60),
104 .end = evt2irq(0xa60),
105 .flags = IORESOURCE_IRQ,
106 },
107};
108
109static u64 usb_ohci_dma_mask = 0xffffffffUL;
110
111static struct usb_ohci_pdata usb_ohci_pdata;
112
113static struct platform_device usb_ohci_device = {
114 .name = "ohci-platform",
115 .id = -1,
116 .dev = {
117 .dma_mask = &usb_ohci_dma_mask,
118 .coherent_dma_mask = 0xffffffff,
119 .platform_data = &usb_ohci_pdata,
120 },
121 .num_resources = ARRAY_SIZE(usb_ohci_resources),
122 .resource = usb_ohci_resources,
123};
124
125static struct resource usbf_resources[] = {
126 [0] = {
127 .name = "sh_udc",
128 .start = 0xA4420000,
129 .end = 0xA44200FF,
130 .flags = IORESOURCE_MEM,
131 },
132 [1] = {
133 .name = "sh_udc",
134 .start = evt2irq(0xa20),
135 .end = evt2irq(0xa20),
136 .flags = IORESOURCE_IRQ,
137 },
138};
139
140static struct platform_device usbf_device = {
141 .name = "sh_udc",
142 .id = -1,
143 .dev = {
144 .dma_mask = NULL,
145 .coherent_dma_mask = 0xffffffff,
146 },
147 .num_resources = ARRAY_SIZE(usbf_resources),
148 .resource = usbf_resources,
149};
150
151static struct sh_timer_config cmt_platform_data = {
152 .channels_mask = 0x1f,
153};
154
155static struct resource cmt_resources[] = {
156 DEFINE_RES_MEM(0x044a0000, 0x60),
157 DEFINE_RES_IRQ(evt2irq(0xf00)),
158};
159
160static struct platform_device cmt_device = {
161 .name = "sh-cmt-32",
162 .id = 0,
163 .dev = {
164 .platform_data = &cmt_platform_data,
165 },
166 .resource = cmt_resources,
167 .num_resources = ARRAY_SIZE(cmt_resources),
168};
169
170static struct sh_timer_config tmu0_platform_data = {
171 .channels_mask = 7,
172};
173
174static struct resource tmu0_resources[] = {
175 DEFINE_RES_MEM(0xa412fe90, 0x28),
176 DEFINE_RES_IRQ(evt2irq(0x400)),
177 DEFINE_RES_IRQ(evt2irq(0x420)),
178 DEFINE_RES_IRQ(evt2irq(0x440)),
179};
180
181static struct platform_device tmu0_device = {
182 .name = "sh-tmu-sh3",
183 .id = 0,
184 .dev = {
185 .platform_data = &tmu0_platform_data,
186 },
187 .resource = tmu0_resources,
188 .num_resources = ARRAY_SIZE(tmu0_resources),
189};
190
191static struct platform_device *sh7720_devices[] __initdata = {
192 &scif0_device,
193 &scif1_device,
194 &cmt_device,
195 &tmu0_device,
196 &rtc_device,
197 &usb_ohci_device,
198 &usbf_device,
199};
200
201static int __init sh7720_devices_setup(void)
202{
203 return platform_add_devices(sh7720_devices,
204 ARRAY_SIZE(sh7720_devices));
205}
206arch_initcall(sh7720_devices_setup);
207
208static struct platform_device *sh7720_early_devices[] __initdata = {
209 &scif0_device,
210 &scif1_device,
211 &cmt_device,
212 &tmu0_device,
213};
214
215void __init plat_early_device_setup(void)
216{
217 early_platform_add_devices(sh7720_early_devices,
218 ARRAY_SIZE(sh7720_early_devices));
219}
220
221enum {
222 UNUSED = 0,
223
224
225 TMU0, TMU1, TMU2, RTC,
226 WDT, REF_RCMI, SIM,
227 IRQ0, IRQ1, IRQ2, IRQ3,
228 USBF_SPD, TMU_SUNI, IRQ5, IRQ4,
229 DMAC1, LCDC, SSL,
230 ADC, DMAC2, USBFI, CMT,
231 SCIF0, SCIF1,
232 PINT07, PINT815, TPU, IIC,
233 SIOF0, SIOF1, MMC, PCC,
234 USBHI, AFEIF,
235 H_UDI,
236};
237
238static struct intc_vect vectors[] __initdata = {
239
240 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
241 INTC_VECT(TMU2, 0x440), INTC_VECT(RTC, 0x480),
242 INTC_VECT(RTC, 0x4a0), INTC_VECT(RTC, 0x4c0),
243 INTC_VECT(SIM, 0x4e0), INTC_VECT(SIM, 0x500),
244 INTC_VECT(SIM, 0x520), INTC_VECT(SIM, 0x540),
245 INTC_VECT(WDT, 0x560), INTC_VECT(REF_RCMI, 0x580),
246 INTC_VECT(TMU_SUNI, 0x6c0),
247 INTC_VECT(USBF_SPD, 0x6e0), INTC_VECT(DMAC1, 0x800),
248 INTC_VECT(DMAC1, 0x820), INTC_VECT(DMAC1, 0x840),
249 INTC_VECT(DMAC1, 0x860), INTC_VECT(LCDC, 0x900),
250#if defined(CONFIG_CPU_SUBTYPE_SH7720)
251 INTC_VECT(SSL, 0x980),
252#endif
253 INTC_VECT(USBFI, 0xa20), INTC_VECT(USBFI, 0xa40),
254 INTC_VECT(USBHI, 0xa60),
255 INTC_VECT(DMAC2, 0xb80), INTC_VECT(DMAC2, 0xba0),
256 INTC_VECT(ADC, 0xbe0), INTC_VECT(SCIF0, 0xc00),
257 INTC_VECT(SCIF1, 0xc20), INTC_VECT(PINT07, 0xc80),
258 INTC_VECT(PINT815, 0xca0), INTC_VECT(SIOF0, 0xd00),
259 INTC_VECT(SIOF1, 0xd20), INTC_VECT(TPU, 0xd80),
260 INTC_VECT(TPU, 0xda0), INTC_VECT(TPU, 0xdc0),
261 INTC_VECT(TPU, 0xde0), INTC_VECT(IIC, 0xe00),
262 INTC_VECT(MMC, 0xe80), INTC_VECT(MMC, 0xea0),
263 INTC_VECT(MMC, 0xec0), INTC_VECT(MMC, 0xee0),
264 INTC_VECT(CMT, 0xf00), INTC_VECT(PCC, 0xf60),
265 INTC_VECT(AFEIF, 0xfe0),
266};
267
268static struct intc_prio_reg prio_registers[] __initdata = {
269 { 0xA414FEE2UL, 0, 16, 4, { TMU0, TMU1, TMU2, RTC } },
270 { 0xA414FEE4UL, 0, 16, 4, { WDT, REF_RCMI, SIM, 0 } },
271 { 0xA4140016UL, 0, 16, 4, { IRQ3, IRQ2, IRQ1, IRQ0 } },
272 { 0xA4140018UL, 0, 16, 4, { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } },
273 { 0xA414001AUL, 0, 16, 4, { DMAC1, 0, LCDC, SSL } },
274 { 0xA4080000UL, 0, 16, 4, { ADC, DMAC2, USBFI, CMT } },
275 { 0xA4080002UL, 0, 16, 4, { SCIF0, SCIF1, 0, 0 } },
276 { 0xA4080004UL, 0, 16, 4, { PINT07, PINT815, TPU, IIC } },
277 { 0xA4080006UL, 0, 16, 4, { SIOF0, SIOF1, MMC, PCC } },
278 { 0xA4080008UL, 0, 16, 4, { 0, USBHI, 0, AFEIF } },
279};
280
281static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, NULL,
282 NULL, prio_registers, NULL);
283
284void __init plat_irq_setup(void)
285{
286 register_intc_controller(&intc_desc);
287 plat_irq_setup_sh3();
288}
289
