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13#ifndef __QCOM_CLK_COMMON_H__
14#define __QCOM_CLK_COMMON_H__
15
16struct platform_device;
17struct regmap_config;
18struct clk_regmap;
19struct qcom_reset_map;
20struct regmap;
21struct freq_tbl;
22struct clk_hw;
23
24#define PLL_LOCK_COUNT_SHIFT 8
25#define PLL_LOCK_COUNT_MASK 0x3f
26#define PLL_BIAS_COUNT_SHIFT 14
27#define PLL_BIAS_COUNT_MASK 0x3f
28#define PLL_VOTE_FSM_ENA BIT(20)
29#define PLL_VOTE_FSM_RESET BIT(21)
30
31struct qcom_cc_desc {
32 const struct regmap_config *config;
33 struct clk_regmap **clks;
34 size_t num_clks;
35 const struct qcom_reset_map *resets;
36 size_t num_resets;
37 struct gdsc **gdscs;
38 size_t num_gdscs;
39};
40
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45
46struct parent_map {
47 u8 src;
48 u8 cfg;
49};
50
51extern const struct freq_tbl *qcom_find_freq(const struct freq_tbl *f,
52 unsigned long rate);
53extern const struct freq_tbl *qcom_find_freq_floor(const struct freq_tbl *f,
54 unsigned long rate);
55extern void
56qcom_pll_set_fsm_mode(struct regmap *m, u32 reg, u8 bias_count, u8 lock_count);
57extern int qcom_find_src_index(struct clk_hw *hw, const struct parent_map *map,
58 u8 src);
59
60extern int qcom_cc_register_board_clk(struct device *dev, const char *path,
61 const char *name, unsigned long rate);
62extern int qcom_cc_register_sleep_clk(struct device *dev);
63
64extern struct regmap *qcom_cc_map(struct platform_device *pdev,
65 const struct qcom_cc_desc *desc);
66extern int qcom_cc_really_probe(struct platform_device *pdev,
67 const struct qcom_cc_desc *desc,
68 struct regmap *regmap);
69extern int qcom_cc_probe(struct platform_device *pdev,
70 const struct qcom_cc_desc *desc);
71
72#endif
73