linux/drivers/gpu/drm/i915/display/intel_sdvo.c
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   1/*
   2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3 * Copyright © 2006-2007 Intel Corporation
   4 *   Jesse Barnes <jesse.barnes@intel.com>
   5 *
   6 * Permission is hereby granted, free of charge, to any person obtaining a
   7 * copy of this software and associated documentation files (the "Software"),
   8 * to deal in the Software without restriction, including without limitation
   9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10 * and/or sell copies of the Software, and to permit persons to whom the
  11 * Software is furnished to do so, subject to the following conditions:
  12 *
  13 * The above copyright notice and this permission notice (including the next
  14 * paragraph) shall be included in all copies or substantial portions of the
  15 * Software.
  16 *
  17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23 * DEALINGS IN THE SOFTWARE.
  24 *
  25 * Authors:
  26 *      Eric Anholt <eric@anholt.net>
  27 */
  28
  29#include <linux/delay.h>
  30#include <linux/export.h>
  31#include <linux/i2c.h>
  32#include <linux/slab.h>
  33
  34#include <drm/drm_atomic_helper.h>
  35#include <drm/drm_crtc.h>
  36#include <drm/drm_edid.h>
  37
  38#include "i915_drv.h"
  39#include "intel_atomic.h"
  40#include "intel_connector.h"
  41#include "intel_display_types.h"
  42#include "intel_fifo_underrun.h"
  43#include "intel_gmbus.h"
  44#include "intel_hdmi.h"
  45#include "intel_hotplug.h"
  46#include "intel_panel.h"
  47#include "intel_sdvo.h"
  48#include "intel_sdvo_regs.h"
  49
  50#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  51#define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  52#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  53#define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  54
  55#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  56                        SDVO_TV_MASK)
  57
  58#define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  59#define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  60#define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  61#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  62#define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  63
  64
  65static const char * const tv_format_names[] = {
  66        "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  67        "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  68        "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  69        "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  70        "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  71        "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  72        "SECAM_60"
  73};
  74
  75#define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
  76
  77struct intel_sdvo {
  78        struct intel_encoder base;
  79
  80        struct i2c_adapter *i2c;
  81        u8 slave_addr;
  82
  83        struct i2c_adapter ddc;
  84
  85        /* Register for the SDVO device: SDVOB or SDVOC */
  86        i915_reg_t sdvo_reg;
  87
  88        /* Active outputs controlled by this SDVO output */
  89        u16 controlled_output;
  90
  91        /*
  92         * Capabilities of the SDVO device returned by
  93         * intel_sdvo_get_capabilities()
  94         */
  95        struct intel_sdvo_caps caps;
  96
  97        u8 colorimetry_cap;
  98
  99        /* Pixel clock limitations reported by the SDVO device, in kHz */
 100        int pixel_clock_min, pixel_clock_max;
 101
 102        /*
 103        * For multiple function SDVO device,
 104        * this is for current attached outputs.
 105        */
 106        u16 attached_output;
 107
 108        /*
 109         * Hotplug activation bits for this device
 110         */
 111        u16 hotplug_active;
 112
 113        enum port port;
 114
 115        bool has_hdmi_monitor;
 116        bool has_hdmi_audio;
 117
 118        /* DDC bus used by this SDVO encoder */
 119        u8 ddc_bus;
 120
 121        /*
 122         * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 123         */
 124        u8 dtd_sdvo_flags;
 125};
 126
 127struct intel_sdvo_connector {
 128        struct intel_connector base;
 129
 130        /* Mark the type of connector */
 131        u16 output_flag;
 132
 133        /* This contains all current supported TV format */
 134        u8 tv_format_supported[TV_FORMAT_NUM];
 135        int   format_supported_num;
 136        struct drm_property *tv_format;
 137
 138        /* add the property for the SDVO-TV */
 139        struct drm_property *left;
 140        struct drm_property *right;
 141        struct drm_property *top;
 142        struct drm_property *bottom;
 143        struct drm_property *hpos;
 144        struct drm_property *vpos;
 145        struct drm_property *contrast;
 146        struct drm_property *saturation;
 147        struct drm_property *hue;
 148        struct drm_property *sharpness;
 149        struct drm_property *flicker_filter;
 150        struct drm_property *flicker_filter_adaptive;
 151        struct drm_property *flicker_filter_2d;
 152        struct drm_property *tv_chroma_filter;
 153        struct drm_property *tv_luma_filter;
 154        struct drm_property *dot_crawl;
 155
 156        /* add the property for the SDVO-TV/LVDS */
 157        struct drm_property *brightness;
 158
 159        /* this is to get the range of margin.*/
 160        u32 max_hscan, max_vscan;
 161
 162        /**
 163         * This is set if we treat the device as HDMI, instead of DVI.
 164         */
 165        bool is_hdmi;
 166};
 167
 168struct intel_sdvo_connector_state {
 169        /* base.base: tv.saturation/contrast/hue/brightness */
 170        struct intel_digital_connector_state base;
 171
 172        struct {
 173                unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
 174                unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
 175                unsigned chroma_filter, luma_filter, dot_crawl;
 176        } tv;
 177};
 178
 179static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 180{
 181        return container_of(encoder, struct intel_sdvo, base);
 182}
 183
 184static struct intel_sdvo *intel_attached_sdvo(struct intel_connector *connector)
 185{
 186        return to_sdvo(intel_attached_encoder(connector));
 187}
 188
 189static struct intel_sdvo_connector *
 190to_intel_sdvo_connector(struct drm_connector *connector)
 191{
 192        return container_of(connector, struct intel_sdvo_connector, base.base);
 193}
 194
 195#define to_intel_sdvo_connector_state(conn_state) \
 196        container_of((conn_state), struct intel_sdvo_connector_state, base.base)
 197
 198static bool
 199intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags);
 200static bool
 201intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 202                              struct intel_sdvo_connector *intel_sdvo_connector,
 203                              int type);
 204static bool
 205intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 206                                   struct intel_sdvo_connector *intel_sdvo_connector);
 207
 208/*
 209 * Writes the SDVOB or SDVOC with the given value, but always writes both
 210 * SDVOB and SDVOC to work around apparent hardware issues (according to
 211 * comments in the BIOS).
 212 */
 213static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 214{
 215        struct drm_device *dev = intel_sdvo->base.base.dev;
 216        struct drm_i915_private *dev_priv = to_i915(dev);
 217        u32 bval = val, cval = val;
 218        int i;
 219
 220        if (HAS_PCH_SPLIT(dev_priv)) {
 221                intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);
 222                intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg);
 223                /*
 224                 * HW workaround, need to write this twice for issue
 225                 * that may result in first write getting masked.
 226                 */
 227                if (HAS_PCH_IBX(dev_priv)) {
 228                        intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);
 229                        intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg);
 230                }
 231                return;
 232        }
 233
 234        if (intel_sdvo->port == PORT_B)
 235                cval = intel_de_read(dev_priv, GEN3_SDVOC);
 236        else
 237                bval = intel_de_read(dev_priv, GEN3_SDVOB);
 238
 239        /*
 240         * Write the registers twice for luck. Sometimes,
 241         * writing them only once doesn't appear to 'stick'.
 242         * The BIOS does this too. Yay, magic
 243         */
 244        for (i = 0; i < 2; i++) {
 245                intel_de_write(dev_priv, GEN3_SDVOB, bval);
 246                intel_de_posting_read(dev_priv, GEN3_SDVOB);
 247
 248                intel_de_write(dev_priv, GEN3_SDVOC, cval);
 249                intel_de_posting_read(dev_priv, GEN3_SDVOC);
 250        }
 251}
 252
 253static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 254{
 255        struct i2c_msg msgs[] = {
 256                {
 257                        .addr = intel_sdvo->slave_addr,
 258                        .flags = 0,
 259                        .len = 1,
 260                        .buf = &addr,
 261                },
 262                {
 263                        .addr = intel_sdvo->slave_addr,
 264                        .flags = I2C_M_RD,
 265                        .len = 1,
 266                        .buf = ch,
 267                }
 268        };
 269        int ret;
 270
 271        if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 272                return true;
 273
 274        DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 275        return false;
 276}
 277
 278#define SDVO_CMD_NAME_ENTRY(cmd_) { .cmd = SDVO_CMD_ ## cmd_, .name = #cmd_ }
 279
 280/** Mapping of command numbers to names, for debug output */
 281static const struct {
 282        u8 cmd;
 283        const char *name;
 284} __attribute__ ((packed)) sdvo_cmd_names[] = {
 285        SDVO_CMD_NAME_ENTRY(RESET),
 286        SDVO_CMD_NAME_ENTRY(GET_DEVICE_CAPS),
 287        SDVO_CMD_NAME_ENTRY(GET_FIRMWARE_REV),
 288        SDVO_CMD_NAME_ENTRY(GET_TRAINED_INPUTS),
 289        SDVO_CMD_NAME_ENTRY(GET_ACTIVE_OUTPUTS),
 290        SDVO_CMD_NAME_ENTRY(SET_ACTIVE_OUTPUTS),
 291        SDVO_CMD_NAME_ENTRY(GET_IN_OUT_MAP),
 292        SDVO_CMD_NAME_ENTRY(SET_IN_OUT_MAP),
 293        SDVO_CMD_NAME_ENTRY(GET_ATTACHED_DISPLAYS),
 294        SDVO_CMD_NAME_ENTRY(GET_HOT_PLUG_SUPPORT),
 295        SDVO_CMD_NAME_ENTRY(SET_ACTIVE_HOT_PLUG),
 296        SDVO_CMD_NAME_ENTRY(GET_ACTIVE_HOT_PLUG),
 297        SDVO_CMD_NAME_ENTRY(GET_INTERRUPT_EVENT_SOURCE),
 298        SDVO_CMD_NAME_ENTRY(SET_TARGET_INPUT),
 299        SDVO_CMD_NAME_ENTRY(SET_TARGET_OUTPUT),
 300        SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART1),
 301        SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART2),
 302        SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART1),
 303        SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART2),
 304        SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART1),
 305        SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART2),
 306        SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART1),
 307        SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART2),
 308        SDVO_CMD_NAME_ENTRY(CREATE_PREFERRED_INPUT_TIMING),
 309        SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART1),
 310        SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART2),
 311        SDVO_CMD_NAME_ENTRY(GET_INPUT_PIXEL_CLOCK_RANGE),
 312        SDVO_CMD_NAME_ENTRY(GET_OUTPUT_PIXEL_CLOCK_RANGE),
 313        SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_CLOCK_RATE_MULTS),
 314        SDVO_CMD_NAME_ENTRY(GET_CLOCK_RATE_MULT),
 315        SDVO_CMD_NAME_ENTRY(SET_CLOCK_RATE_MULT),
 316        SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_TV_FORMATS),
 317        SDVO_CMD_NAME_ENTRY(GET_TV_FORMAT),
 318        SDVO_CMD_NAME_ENTRY(SET_TV_FORMAT),
 319        SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_POWER_STATES),
 320        SDVO_CMD_NAME_ENTRY(GET_POWER_STATE),
 321        SDVO_CMD_NAME_ENTRY(SET_ENCODER_POWER_STATE),
 322        SDVO_CMD_NAME_ENTRY(SET_DISPLAY_POWER_STATE),
 323        SDVO_CMD_NAME_ENTRY(SET_CONTROL_BUS_SWITCH),
 324        SDVO_CMD_NAME_ENTRY(GET_SDTV_RESOLUTION_SUPPORT),
 325        SDVO_CMD_NAME_ENTRY(GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 326        SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_ENHANCEMENTS),
 327
 328        /* Add the op code for SDVO enhancements */
 329        SDVO_CMD_NAME_ENTRY(GET_MAX_HPOS),
 330        SDVO_CMD_NAME_ENTRY(GET_HPOS),
 331        SDVO_CMD_NAME_ENTRY(SET_HPOS),
 332        SDVO_CMD_NAME_ENTRY(GET_MAX_VPOS),
 333        SDVO_CMD_NAME_ENTRY(GET_VPOS),
 334        SDVO_CMD_NAME_ENTRY(SET_VPOS),
 335        SDVO_CMD_NAME_ENTRY(GET_MAX_SATURATION),
 336        SDVO_CMD_NAME_ENTRY(GET_SATURATION),
 337        SDVO_CMD_NAME_ENTRY(SET_SATURATION),
 338        SDVO_CMD_NAME_ENTRY(GET_MAX_HUE),
 339        SDVO_CMD_NAME_ENTRY(GET_HUE),
 340        SDVO_CMD_NAME_ENTRY(SET_HUE),
 341        SDVO_CMD_NAME_ENTRY(GET_MAX_CONTRAST),
 342        SDVO_CMD_NAME_ENTRY(GET_CONTRAST),
 343        SDVO_CMD_NAME_ENTRY(SET_CONTRAST),
 344        SDVO_CMD_NAME_ENTRY(GET_MAX_BRIGHTNESS),
 345        SDVO_CMD_NAME_ENTRY(GET_BRIGHTNESS),
 346        SDVO_CMD_NAME_ENTRY(SET_BRIGHTNESS),
 347        SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_H),
 348        SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_H),
 349        SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_H),
 350        SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_V),
 351        SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_V),
 352        SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_V),
 353        SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER),
 354        SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER),
 355        SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER),
 356        SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_ADAPTIVE),
 357        SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_ADAPTIVE),
 358        SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_ADAPTIVE),
 359        SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_2D),
 360        SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_2D),
 361        SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_2D),
 362        SDVO_CMD_NAME_ENTRY(GET_MAX_SHARPNESS),
 363        SDVO_CMD_NAME_ENTRY(GET_SHARPNESS),
 364        SDVO_CMD_NAME_ENTRY(SET_SHARPNESS),
 365        SDVO_CMD_NAME_ENTRY(GET_DOT_CRAWL),
 366        SDVO_CMD_NAME_ENTRY(SET_DOT_CRAWL),
 367        SDVO_CMD_NAME_ENTRY(GET_MAX_TV_CHROMA_FILTER),
 368        SDVO_CMD_NAME_ENTRY(GET_TV_CHROMA_FILTER),
 369        SDVO_CMD_NAME_ENTRY(SET_TV_CHROMA_FILTER),
 370        SDVO_CMD_NAME_ENTRY(GET_MAX_TV_LUMA_FILTER),
 371        SDVO_CMD_NAME_ENTRY(GET_TV_LUMA_FILTER),
 372        SDVO_CMD_NAME_ENTRY(SET_TV_LUMA_FILTER),
 373
 374        /* HDMI op code */
 375        SDVO_CMD_NAME_ENTRY(GET_SUPP_ENCODE),
 376        SDVO_CMD_NAME_ENTRY(GET_ENCODE),
 377        SDVO_CMD_NAME_ENTRY(SET_ENCODE),
 378        SDVO_CMD_NAME_ENTRY(SET_PIXEL_REPLI),
 379        SDVO_CMD_NAME_ENTRY(GET_PIXEL_REPLI),
 380        SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY_CAP),
 381        SDVO_CMD_NAME_ENTRY(SET_COLORIMETRY),
 382        SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY),
 383        SDVO_CMD_NAME_ENTRY(GET_AUDIO_ENCRYPT_PREFER),
 384        SDVO_CMD_NAME_ENTRY(SET_AUDIO_STAT),
 385        SDVO_CMD_NAME_ENTRY(GET_AUDIO_STAT),
 386        SDVO_CMD_NAME_ENTRY(GET_HBUF_INDEX),
 387        SDVO_CMD_NAME_ENTRY(SET_HBUF_INDEX),
 388        SDVO_CMD_NAME_ENTRY(GET_HBUF_INFO),
 389        SDVO_CMD_NAME_ENTRY(GET_HBUF_AV_SPLIT),
 390        SDVO_CMD_NAME_ENTRY(SET_HBUF_AV_SPLIT),
 391        SDVO_CMD_NAME_ENTRY(GET_HBUF_TXRATE),
 392        SDVO_CMD_NAME_ENTRY(SET_HBUF_TXRATE),
 393        SDVO_CMD_NAME_ENTRY(SET_HBUF_DATA),
 394        SDVO_CMD_NAME_ENTRY(GET_HBUF_DATA),
 395};
 396
 397#undef SDVO_CMD_NAME_ENTRY
 398
 399static const char *sdvo_cmd_name(u8 cmd)
 400{
 401        int i;
 402
 403        for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 404                if (cmd == sdvo_cmd_names[i].cmd)
 405                        return sdvo_cmd_names[i].name;
 406        }
 407
 408        return NULL;
 409}
 410
 411#define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
 412
 413static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 414                                   const void *args, int args_len)
 415{
 416        struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
 417        const char *cmd_name;
 418        int i, pos = 0;
 419        char buffer[64];
 420
 421#define BUF_PRINT(args...) \
 422        pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
 423
 424        for (i = 0; i < args_len; i++) {
 425                BUF_PRINT("%02X ", ((u8 *)args)[i]);
 426        }
 427        for (; i < 8; i++) {
 428                BUF_PRINT("   ");
 429        }
 430
 431        cmd_name = sdvo_cmd_name(cmd);
 432        if (cmd_name)
 433                BUF_PRINT("(%s)", cmd_name);
 434        else
 435                BUF_PRINT("(%02X)", cmd);
 436
 437        drm_WARN_ON(&dev_priv->drm, pos >= sizeof(buffer) - 1);
 438#undef BUF_PRINT
 439
 440        DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 441}
 442
 443static const char * const cmd_status_names[] = {
 444        [SDVO_CMD_STATUS_POWER_ON] = "Power on",
 445        [SDVO_CMD_STATUS_SUCCESS] = "Success",
 446        [SDVO_CMD_STATUS_NOTSUPP] = "Not supported",
 447        [SDVO_CMD_STATUS_INVALID_ARG] = "Invalid arg",
 448        [SDVO_CMD_STATUS_PENDING] = "Pending",
 449        [SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED] = "Target not specified",
 450        [SDVO_CMD_STATUS_SCALING_NOT_SUPP] = "Scaling not supported",
 451};
 452
 453static const char *sdvo_cmd_status(u8 status)
 454{
 455        if (status < ARRAY_SIZE(cmd_status_names))
 456                return cmd_status_names[status];
 457        else
 458                return NULL;
 459}
 460
 461static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 462                                   const void *args, int args_len,
 463                                   bool unlocked)
 464{
 465        u8 *buf, status;
 466        struct i2c_msg *msgs;
 467        int i, ret = true;
 468
 469        /* Would be simpler to allocate both in one go ? */
 470        buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 471        if (!buf)
 472                return false;
 473
 474        msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 475        if (!msgs) {
 476                kfree(buf);
 477                return false;
 478        }
 479
 480        intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 481
 482        for (i = 0; i < args_len; i++) {
 483                msgs[i].addr = intel_sdvo->slave_addr;
 484                msgs[i].flags = 0;
 485                msgs[i].len = 2;
 486                msgs[i].buf = buf + 2 *i;
 487                buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 488                buf[2*i + 1] = ((u8*)args)[i];
 489        }
 490        msgs[i].addr = intel_sdvo->slave_addr;
 491        msgs[i].flags = 0;
 492        msgs[i].len = 2;
 493        msgs[i].buf = buf + 2*i;
 494        buf[2*i + 0] = SDVO_I2C_OPCODE;
 495        buf[2*i + 1] = cmd;
 496
 497        /* the following two are to read the response */
 498        status = SDVO_I2C_CMD_STATUS;
 499        msgs[i+1].addr = intel_sdvo->slave_addr;
 500        msgs[i+1].flags = 0;
 501        msgs[i+1].len = 1;
 502        msgs[i+1].buf = &status;
 503
 504        msgs[i+2].addr = intel_sdvo->slave_addr;
 505        msgs[i+2].flags = I2C_M_RD;
 506        msgs[i+2].len = 1;
 507        msgs[i+2].buf = &status;
 508
 509        if (unlocked)
 510                ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 511        else
 512                ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 513        if (ret < 0) {
 514                DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 515                ret = false;
 516                goto out;
 517        }
 518        if (ret != i+3) {
 519                /* failure in I2C transfer */
 520                DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 521                ret = false;
 522        }
 523
 524out:
 525        kfree(msgs);
 526        kfree(buf);
 527        return ret;
 528}
 529
 530static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 531                                 const void *args, int args_len)
 532{
 533        return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true);
 534}
 535
 536static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 537                                     void *response, int response_len)
 538{
 539        struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
 540        const char *cmd_status;
 541        u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 542        u8 status;
 543        int i, pos = 0;
 544        char buffer[64];
 545
 546        buffer[0] = '\0';
 547
 548        /*
 549         * The documentation states that all commands will be
 550         * processed within 15µs, and that we need only poll
 551         * the status byte a maximum of 3 times in order for the
 552         * command to be complete.
 553         *
 554         * Check 5 times in case the hardware failed to read the docs.
 555         *
 556         * Also beware that the first response by many devices is to
 557         * reply PENDING and stall for time. TVs are notorious for
 558         * requiring longer than specified to complete their replies.
 559         * Originally (in the DDX long ago), the delay was only ever 15ms
 560         * with an additional delay of 30ms applied for TVs added later after
 561         * many experiments. To accommodate both sets of delays, we do a
 562         * sequence of slow checks if the device is falling behind and fails
 563         * to reply within 5*15µs.
 564         */
 565        if (!intel_sdvo_read_byte(intel_sdvo,
 566                                  SDVO_I2C_CMD_STATUS,
 567                                  &status))
 568                goto log_fail;
 569
 570        while ((status == SDVO_CMD_STATUS_PENDING ||
 571                status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 572                if (retry < 10)
 573                        msleep(15);
 574                else
 575                        udelay(15);
 576
 577                if (!intel_sdvo_read_byte(intel_sdvo,
 578                                          SDVO_I2C_CMD_STATUS,
 579                                          &status))
 580                        goto log_fail;
 581        }
 582
 583#define BUF_PRINT(args...) \
 584        pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
 585
 586        cmd_status = sdvo_cmd_status(status);
 587        if (cmd_status)
 588                BUF_PRINT("(%s)", cmd_status);
 589        else
 590                BUF_PRINT("(??? %d)", status);
 591
 592        if (status != SDVO_CMD_STATUS_SUCCESS)
 593                goto log_fail;
 594
 595        /* Read the command response */
 596        for (i = 0; i < response_len; i++) {
 597                if (!intel_sdvo_read_byte(intel_sdvo,
 598                                          SDVO_I2C_RETURN_0 + i,
 599                                          &((u8 *)response)[i]))
 600                        goto log_fail;
 601                BUF_PRINT(" %02X", ((u8 *)response)[i]);
 602        }
 603
 604        drm_WARN_ON(&dev_priv->drm, pos >= sizeof(buffer) - 1);
 605#undef BUF_PRINT
 606
 607        DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 608        return true;
 609
 610log_fail:
 611        DRM_DEBUG_KMS("%s: R: ... failed %s\n",
 612                      SDVO_NAME(intel_sdvo), buffer);
 613        return false;
 614}
 615
 616static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
 617{
 618        if (adjusted_mode->crtc_clock >= 100000)
 619                return 1;
 620        else if (adjusted_mode->crtc_clock >= 50000)
 621                return 2;
 622        else
 623                return 4;
 624}
 625
 626static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 627                                                u8 ddc_bus)
 628{
 629        /* This must be the immediately preceding write before the i2c xfer */
 630        return __intel_sdvo_write_cmd(intel_sdvo,
 631                                      SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 632                                      &ddc_bus, 1, false);
 633}
 634
 635static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 636{
 637        if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 638                return false;
 639
 640        return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 641}
 642
 643static bool
 644intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 645{
 646        if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 647                return false;
 648
 649        return intel_sdvo_read_response(intel_sdvo, value, len);
 650}
 651
 652static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 653{
 654        struct intel_sdvo_set_target_input_args targets = {0};
 655        return intel_sdvo_set_value(intel_sdvo,
 656                                    SDVO_CMD_SET_TARGET_INPUT,
 657                                    &targets, sizeof(targets));
 658}
 659
 660/*
 661 * Return whether each input is trained.
 662 *
 663 * This function is making an assumption about the layout of the response,
 664 * which should be checked against the docs.
 665 */
 666static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 667{
 668        struct intel_sdvo_get_trained_inputs_response response;
 669
 670        BUILD_BUG_ON(sizeof(response) != 1);
 671        if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 672                                  &response, sizeof(response)))
 673                return false;
 674
 675        *input_1 = response.input0_trained;
 676        *input_2 = response.input1_trained;
 677        return true;
 678}
 679
 680static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 681                                          u16 outputs)
 682{
 683        return intel_sdvo_set_value(intel_sdvo,
 684                                    SDVO_CMD_SET_ACTIVE_OUTPUTS,
 685                                    &outputs, sizeof(outputs));
 686}
 687
 688static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 689                                          u16 *outputs)
 690{
 691        return intel_sdvo_get_value(intel_sdvo,
 692                                    SDVO_CMD_GET_ACTIVE_OUTPUTS,
 693                                    outputs, sizeof(*outputs));
 694}
 695
 696static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 697                                               int mode)
 698{
 699        u8 state = SDVO_ENCODER_STATE_ON;
 700
 701        switch (mode) {
 702        case DRM_MODE_DPMS_ON:
 703                state = SDVO_ENCODER_STATE_ON;
 704                break;
 705        case DRM_MODE_DPMS_STANDBY:
 706                state = SDVO_ENCODER_STATE_STANDBY;
 707                break;
 708        case DRM_MODE_DPMS_SUSPEND:
 709                state = SDVO_ENCODER_STATE_SUSPEND;
 710                break;
 711        case DRM_MODE_DPMS_OFF:
 712                state = SDVO_ENCODER_STATE_OFF;
 713                break;
 714        }
 715
 716        return intel_sdvo_set_value(intel_sdvo,
 717                                    SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 718}
 719
 720static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 721                                                   int *clock_min,
 722                                                   int *clock_max)
 723{
 724        struct intel_sdvo_pixel_clock_range clocks;
 725
 726        BUILD_BUG_ON(sizeof(clocks) != 4);
 727        if (!intel_sdvo_get_value(intel_sdvo,
 728                                  SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 729                                  &clocks, sizeof(clocks)))
 730                return false;
 731
 732        /* Convert the values from units of 10 kHz to kHz. */
 733        *clock_min = clocks.min * 10;
 734        *clock_max = clocks.max * 10;
 735        return true;
 736}
 737
 738static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 739                                         u16 outputs)
 740{
 741        return intel_sdvo_set_value(intel_sdvo,
 742                                    SDVO_CMD_SET_TARGET_OUTPUT,
 743                                    &outputs, sizeof(outputs));
 744}
 745
 746static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 747                                  struct intel_sdvo_dtd *dtd)
 748{
 749        return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 750                intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 751}
 752
 753static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 754                                  struct intel_sdvo_dtd *dtd)
 755{
 756        return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 757                intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 758}
 759
 760static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 761                                         struct intel_sdvo_dtd *dtd)
 762{
 763        return intel_sdvo_set_timing(intel_sdvo,
 764                                     SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 765}
 766
 767static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 768                                         struct intel_sdvo_dtd *dtd)
 769{
 770        return intel_sdvo_set_timing(intel_sdvo,
 771                                     SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 772}
 773
 774static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 775                                        struct intel_sdvo_dtd *dtd)
 776{
 777        return intel_sdvo_get_timing(intel_sdvo,
 778                                     SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 779}
 780
 781static bool
 782intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 783                                         struct intel_sdvo_connector *intel_sdvo_connector,
 784                                         u16 clock,
 785                                         u16 width,
 786                                         u16 height)
 787{
 788        struct intel_sdvo_preferred_input_timing_args args;
 789
 790        memset(&args, 0, sizeof(args));
 791        args.clock = clock;
 792        args.width = width;
 793        args.height = height;
 794        args.interlace = 0;
 795
 796        if (IS_LVDS(intel_sdvo_connector)) {
 797                const struct drm_display_mode *fixed_mode =
 798                        intel_sdvo_connector->base.panel.fixed_mode;
 799
 800                if (fixed_mode->hdisplay != width ||
 801                    fixed_mode->vdisplay != height)
 802                        args.scaled = 1;
 803        }
 804
 805        return intel_sdvo_set_value(intel_sdvo,
 806                                    SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 807                                    &args, sizeof(args));
 808}
 809
 810static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 811                                                  struct intel_sdvo_dtd *dtd)
 812{
 813        BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 814        BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 815        return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 816                                    &dtd->part1, sizeof(dtd->part1)) &&
 817                intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 818                                     &dtd->part2, sizeof(dtd->part2));
 819}
 820
 821static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 822{
 823        return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 824}
 825
 826static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 827                                         const struct drm_display_mode *mode)
 828{
 829        u16 width, height;
 830        u16 h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 831        u16 h_sync_offset, v_sync_offset;
 832        int mode_clock;
 833
 834        memset(dtd, 0, sizeof(*dtd));
 835
 836        width = mode->hdisplay;
 837        height = mode->vdisplay;
 838
 839        /* do some mode translations */
 840        h_blank_len = mode->htotal - mode->hdisplay;
 841        h_sync_len = mode->hsync_end - mode->hsync_start;
 842
 843        v_blank_len = mode->vtotal - mode->vdisplay;
 844        v_sync_len = mode->vsync_end - mode->vsync_start;
 845
 846        h_sync_offset = mode->hsync_start - mode->hdisplay;
 847        v_sync_offset = mode->vsync_start - mode->vdisplay;
 848
 849        mode_clock = mode->clock;
 850        mode_clock /= 10;
 851        dtd->part1.clock = mode_clock;
 852
 853        dtd->part1.h_active = width & 0xff;
 854        dtd->part1.h_blank = h_blank_len & 0xff;
 855        dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 856                ((h_blank_len >> 8) & 0xf);
 857        dtd->part1.v_active = height & 0xff;
 858        dtd->part1.v_blank = v_blank_len & 0xff;
 859        dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 860                ((v_blank_len >> 8) & 0xf);
 861
 862        dtd->part2.h_sync_off = h_sync_offset & 0xff;
 863        dtd->part2.h_sync_width = h_sync_len & 0xff;
 864        dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 865                (v_sync_len & 0xf);
 866        dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 867                ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 868                ((v_sync_len & 0x30) >> 4);
 869
 870        dtd->part2.dtd_flags = 0x18;
 871        if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 872                dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 873        if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 874                dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 875        if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 876                dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 877
 878        dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 879}
 880
 881static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 882                                         const struct intel_sdvo_dtd *dtd)
 883{
 884        struct drm_display_mode mode = {};
 885
 886        mode.hdisplay = dtd->part1.h_active;
 887        mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 888        mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 889        mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 890        mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 891        mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 892        mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 893        mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 894
 895        mode.vdisplay = dtd->part1.v_active;
 896        mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 897        mode.vsync_start = mode.vdisplay;
 898        mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 899        mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 900        mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 901        mode.vsync_end = mode.vsync_start +
 902                (dtd->part2.v_sync_off_width & 0xf);
 903        mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 904        mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 905        mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 906
 907        mode.clock = dtd->part1.clock * 10;
 908
 909        if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 910                mode.flags |= DRM_MODE_FLAG_INTERLACE;
 911        if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 912                mode.flags |= DRM_MODE_FLAG_PHSYNC;
 913        else
 914                mode.flags |= DRM_MODE_FLAG_NHSYNC;
 915        if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 916                mode.flags |= DRM_MODE_FLAG_PVSYNC;
 917        else
 918                mode.flags |= DRM_MODE_FLAG_NVSYNC;
 919
 920        drm_mode_set_crtcinfo(&mode, 0);
 921
 922        drm_mode_copy(pmode, &mode);
 923}
 924
 925static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 926{
 927        struct intel_sdvo_encode encode;
 928
 929        BUILD_BUG_ON(sizeof(encode) != 2);
 930        return intel_sdvo_get_value(intel_sdvo,
 931                                  SDVO_CMD_GET_SUPP_ENCODE,
 932                                  &encode, sizeof(encode));
 933}
 934
 935static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 936                                  u8 mode)
 937{
 938        return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 939}
 940
 941static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 942                                       u8 mode)
 943{
 944        return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 945}
 946
 947static bool intel_sdvo_set_pixel_replication(struct intel_sdvo *intel_sdvo,
 948                                             u8 pixel_repeat)
 949{
 950        return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_PIXEL_REPLI,
 951                                    &pixel_repeat, 1);
 952}
 953
 954static bool intel_sdvo_set_audio_state(struct intel_sdvo *intel_sdvo,
 955                                       u8 audio_state)
 956{
 957        return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_AUDIO_STAT,
 958                                    &audio_state, 1);
 959}
 960
 961static bool intel_sdvo_get_hbuf_size(struct intel_sdvo *intel_sdvo,
 962                                     u8 *hbuf_size)
 963{
 964        if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 965                                  hbuf_size, 1))
 966                return false;
 967
 968        /* Buffer size is 0 based, hooray! However zero means zero. */
 969        if (*hbuf_size)
 970                (*hbuf_size)++;
 971
 972        return true;
 973}
 974
 975#if 0
 976static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 977{
 978        int i, j;
 979        u8 set_buf_index[2];
 980        u8 av_split;
 981        u8 buf_size;
 982        u8 buf[48];
 983        u8 *pos;
 984
 985        intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 986
 987        for (i = 0; i <= av_split; i++) {
 988                set_buf_index[0] = i; set_buf_index[1] = 0;
 989                intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 990                                     set_buf_index, 2);
 991                intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 992                intel_sdvo_read_response(encoder, &buf_size, 1);
 993
 994                pos = buf;
 995                for (j = 0; j <= buf_size; j += 8) {
 996                        intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 997                                             NULL, 0);
 998                        intel_sdvo_read_response(encoder, pos, 8);
 999                        pos += 8;
1000                }
1001        }
1002}
1003#endif
1004
1005static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
1006                                       unsigned int if_index, u8 tx_rate,
1007                                       const u8 *data, unsigned int length)
1008{
1009        u8 set_buf_index[2] = { if_index, 0 };
1010        u8 hbuf_size, tmp[8];
1011        int i;
1012
1013        if (!intel_sdvo_set_value(intel_sdvo,
1014                                  SDVO_CMD_SET_HBUF_INDEX,
1015                                  set_buf_index, 2))
1016                return false;
1017
1018        if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size))
1019                return false;
1020
1021        DRM_DEBUG_KMS("writing sdvo hbuf: %i, length %u, hbuf_size: %i\n",
1022                      if_index, length, hbuf_size);
1023
1024        if (hbuf_size < length)
1025                return false;
1026
1027        for (i = 0; i < hbuf_size; i += 8) {
1028                memset(tmp, 0, 8);
1029                if (i < length)
1030                        memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
1031
1032                if (!intel_sdvo_set_value(intel_sdvo,
1033                                          SDVO_CMD_SET_HBUF_DATA,
1034                                          tmp, 8))
1035                        return false;
1036        }
1037
1038        return intel_sdvo_set_value(intel_sdvo,
1039                                    SDVO_CMD_SET_HBUF_TXRATE,
1040                                    &tx_rate, 1);
1041}
1042
1043static ssize_t intel_sdvo_read_infoframe(struct intel_sdvo *intel_sdvo,
1044                                         unsigned int if_index,
1045                                         u8 *data, unsigned int length)
1046{
1047        u8 set_buf_index[2] = { if_index, 0 };
1048        u8 hbuf_size, tx_rate, av_split;
1049        int i;
1050
1051        if (!intel_sdvo_get_value(intel_sdvo,
1052                                  SDVO_CMD_GET_HBUF_AV_SPLIT,
1053                                  &av_split, 1))
1054                return -ENXIO;
1055
1056        if (av_split < if_index)
1057                return 0;
1058
1059        if (!intel_sdvo_set_value(intel_sdvo,
1060                                  SDVO_CMD_SET_HBUF_INDEX,
1061                                  set_buf_index, 2))
1062                return -ENXIO;
1063
1064        if (!intel_sdvo_get_value(intel_sdvo,
1065                                  SDVO_CMD_GET_HBUF_TXRATE,
1066                                  &tx_rate, 1))
1067                return -ENXIO;
1068
1069        if (tx_rate == SDVO_HBUF_TX_DISABLED)
1070                return 0;
1071
1072        if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size))
1073                return false;
1074
1075        DRM_DEBUG_KMS("reading sdvo hbuf: %i, length %u, hbuf_size: %i\n",
1076                      if_index, length, hbuf_size);
1077
1078        hbuf_size = min_t(unsigned int, length, hbuf_size);
1079
1080        for (i = 0; i < hbuf_size; i += 8) {
1081                if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HBUF_DATA, NULL, 0))
1082                        return -ENXIO;
1083                if (!intel_sdvo_read_response(intel_sdvo, &data[i],
1084                                              min_t(unsigned int, 8, hbuf_size - i)))
1085                        return -ENXIO;
1086        }
1087
1088        return hbuf_size;
1089}
1090
1091static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo,
1092                                             struct intel_crtc_state *crtc_state,
1093                                             struct drm_connector_state *conn_state)
1094{
1095        struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1096        struct hdmi_avi_infoframe *frame = &crtc_state->infoframes.avi.avi;
1097        const struct drm_display_mode *adjusted_mode =
1098                &crtc_state->hw.adjusted_mode;
1099        int ret;
1100
1101        if (!crtc_state->has_hdmi_sink)
1102                return true;
1103
1104        crtc_state->infoframes.enable |=
1105                intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1106
1107        ret = drm_hdmi_avi_infoframe_from_display_mode(frame,
1108                                                       conn_state->connector,
1109                                                       adjusted_mode);
1110        if (ret)
1111                return false;
1112
1113        drm_hdmi_avi_infoframe_quant_range(frame,
1114                                           conn_state->connector,
1115                                           adjusted_mode,
1116                                           crtc_state->limited_color_range ?
1117                                           HDMI_QUANTIZATION_RANGE_LIMITED :
1118                                           HDMI_QUANTIZATION_RANGE_FULL);
1119
1120        ret = hdmi_avi_infoframe_check(frame);
1121        if (drm_WARN_ON(&dev_priv->drm, ret))
1122                return false;
1123
1124        return true;
1125}
1126
1127static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
1128                                         const struct intel_crtc_state *crtc_state)
1129{
1130        struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1131        u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1132        const union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1133        ssize_t len;
1134
1135        if ((crtc_state->infoframes.enable &
1136             intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI)) == 0)
1137                return true;
1138
1139        if (drm_WARN_ON(&dev_priv->drm,
1140                        frame->any.type != HDMI_INFOFRAME_TYPE_AVI))
1141                return false;
1142
1143        len = hdmi_infoframe_pack_only(frame, sdvo_data, sizeof(sdvo_data));
1144        if (drm_WARN_ON(&dev_priv->drm, len < 0))
1145                return false;
1146
1147        return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1148                                          SDVO_HBUF_TX_VSYNC,
1149                                          sdvo_data, len);
1150}
1151
1152static void intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo,
1153                                         struct intel_crtc_state *crtc_state)
1154{
1155        u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1156        union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1157        ssize_t len;
1158        int ret;
1159
1160        if (!crtc_state->has_hdmi_sink)
1161                return;
1162
1163        len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1164                                        sdvo_data, sizeof(sdvo_data));
1165        if (len < 0) {
1166                DRM_DEBUG_KMS("failed to read AVI infoframe\n");
1167                return;
1168        } else if (len == 0) {
1169                return;
1170        }
1171
1172        crtc_state->infoframes.enable |=
1173                intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1174
1175        ret = hdmi_infoframe_unpack(frame, sdvo_data, len);
1176        if (ret) {
1177                DRM_DEBUG_KMS("Failed to unpack AVI infoframe\n");
1178                return;
1179        }
1180
1181        if (frame->any.type != HDMI_INFOFRAME_TYPE_AVI)
1182                DRM_DEBUG_KMS("Found the wrong infoframe type 0x%x (expected 0x%02x)\n",
1183                              frame->any.type, HDMI_INFOFRAME_TYPE_AVI);
1184}
1185
1186static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1187                                     const struct drm_connector_state *conn_state)
1188{
1189        struct intel_sdvo_tv_format format;
1190        u32 format_map;
1191
1192        format_map = 1 << conn_state->tv.mode;
1193        memset(&format, 0, sizeof(format));
1194        memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1195
1196        BUILD_BUG_ON(sizeof(format) != 6);
1197        return intel_sdvo_set_value(intel_sdvo,
1198                                    SDVO_CMD_SET_TV_FORMAT,
1199                                    &format, sizeof(format));
1200}
1201
1202static bool
1203intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1204                                        const struct drm_display_mode *mode)
1205{
1206        struct intel_sdvo_dtd output_dtd;
1207
1208        if (!intel_sdvo_set_target_output(intel_sdvo,
1209                                          intel_sdvo->attached_output))
1210                return false;
1211
1212        intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1213        if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1214                return false;
1215
1216        return true;
1217}
1218
1219/*
1220 * Asks the sdvo controller for the preferred input mode given the output mode.
1221 * Unfortunately we have to set up the full output mode to do that.
1222 */
1223static bool
1224intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1225                                    struct intel_sdvo_connector *intel_sdvo_connector,
1226                                    const struct drm_display_mode *mode,
1227                                    struct drm_display_mode *adjusted_mode)
1228{
1229        struct intel_sdvo_dtd input_dtd;
1230
1231        /* Reset the input timing to the screen. Assume always input 0. */
1232        if (!intel_sdvo_set_target_input(intel_sdvo))
1233                return false;
1234
1235        if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1236                                                      intel_sdvo_connector,
1237                                                      mode->clock / 10,
1238                                                      mode->hdisplay,
1239                                                      mode->vdisplay))
1240                return false;
1241
1242        if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1243                                                   &input_dtd))
1244                return false;
1245
1246        intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1247        intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1248
1249        return true;
1250}
1251
1252static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1253{
1254        struct drm_i915_private *dev_priv = to_i915(pipe_config->uapi.crtc->dev);
1255        unsigned dotclock = pipe_config->port_clock;
1256        struct dpll *clock = &pipe_config->dpll;
1257
1258        /*
1259         * SDVO TV has fixed PLL values depend on its clock range,
1260         * this mirrors vbios setting.
1261         */
1262        if (dotclock >= 100000 && dotclock < 140500) {
1263                clock->p1 = 2;
1264                clock->p2 = 10;
1265                clock->n = 3;
1266                clock->m1 = 16;
1267                clock->m2 = 8;
1268        } else if (dotclock >= 140500 && dotclock <= 200000) {
1269                clock->p1 = 1;
1270                clock->p2 = 10;
1271                clock->n = 6;
1272                clock->m1 = 12;
1273                clock->m2 = 8;
1274        } else {
1275                drm_WARN(&dev_priv->drm, 1,
1276                         "SDVO TV clock out of range: %i\n", dotclock);
1277        }
1278
1279        pipe_config->clock_set = true;
1280}
1281
1282static bool intel_has_hdmi_sink(struct intel_sdvo *sdvo,
1283                                const struct drm_connector_state *conn_state)
1284{
1285        return sdvo->has_hdmi_monitor &&
1286                READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI;
1287}
1288
1289static bool intel_sdvo_limited_color_range(struct intel_encoder *encoder,
1290                                           const struct intel_crtc_state *crtc_state,
1291                                           const struct drm_connector_state *conn_state)
1292{
1293        struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1294
1295        if ((intel_sdvo->colorimetry_cap & SDVO_COLORIMETRY_RGB220) == 0)
1296                return false;
1297
1298        return intel_hdmi_limited_color_range(crtc_state, conn_state);
1299}
1300
1301static int intel_sdvo_compute_config(struct intel_encoder *encoder,
1302                                     struct intel_crtc_state *pipe_config,
1303                                     struct drm_connector_state *conn_state)
1304{
1305        struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1306        struct intel_sdvo_connector_state *intel_sdvo_state =
1307                to_intel_sdvo_connector_state(conn_state);
1308        struct intel_sdvo_connector *intel_sdvo_connector =
1309                to_intel_sdvo_connector(conn_state->connector);
1310        struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
1311        struct drm_display_mode *mode = &pipe_config->hw.mode;
1312
1313        DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1314        pipe_config->pipe_bpp = 8*3;
1315        pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
1316
1317        if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1318                pipe_config->has_pch_encoder = true;
1319
1320        /*
1321         * We need to construct preferred input timings based on our
1322         * output timings.  To do that, we have to set the output
1323         * timings, even though this isn't really the right place in
1324         * the sequence to do it. Oh well.
1325         */
1326        if (IS_TV(intel_sdvo_connector)) {
1327                if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1328                        return -EINVAL;
1329
1330                (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1331                                                           intel_sdvo_connector,
1332                                                           mode,
1333                                                           adjusted_mode);
1334                pipe_config->sdvo_tv_clock = true;
1335        } else if (IS_LVDS(intel_sdvo_connector)) {
1336                if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1337                                                             intel_sdvo_connector->base.panel.fixed_mode))
1338                        return -EINVAL;
1339
1340                (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1341                                                           intel_sdvo_connector,
1342                                                           mode,
1343                                                           adjusted_mode);
1344        }
1345
1346        if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
1347                return -EINVAL;
1348
1349        /*
1350         * Make the CRTC code factor in the SDVO pixel multiplier.  The
1351         * SDVO device will factor out the multiplier during mode_set.
1352         */
1353        pipe_config->pixel_multiplier =
1354                intel_sdvo_get_pixel_multiplier(adjusted_mode);
1355
1356        pipe_config->has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo, conn_state);
1357
1358        if (pipe_config->has_hdmi_sink) {
1359                if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO)
1360                        pipe_config->has_audio = intel_sdvo->has_hdmi_audio;
1361                else
1362                        pipe_config->has_audio =
1363                                intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON;
1364        }
1365
1366        pipe_config->limited_color_range =
1367                intel_sdvo_limited_color_range(encoder, pipe_config,
1368                                               conn_state);
1369
1370        /* Clock computation needs to happen after pixel multiplier. */
1371        if (IS_TV(intel_sdvo_connector))
1372                i9xx_adjust_sdvo_tv_clock(pipe_config);
1373
1374        if (conn_state->picture_aspect_ratio)
1375                adjusted_mode->picture_aspect_ratio =
1376                        conn_state->picture_aspect_ratio;
1377
1378        if (!intel_sdvo_compute_avi_infoframe(intel_sdvo,
1379                                              pipe_config, conn_state)) {
1380                DRM_DEBUG_KMS("bad AVI infoframe\n");
1381                return -EINVAL;
1382        }
1383
1384        return 0;
1385}
1386
1387#define UPDATE_PROPERTY(input, NAME) \
1388        do { \
1389                val = input; \
1390                intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1391        } while (0)
1392
1393static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1394                                    const struct intel_sdvo_connector_state *sdvo_state)
1395{
1396        const struct drm_connector_state *conn_state = &sdvo_state->base.base;
1397        struct intel_sdvo_connector *intel_sdvo_conn =
1398                to_intel_sdvo_connector(conn_state->connector);
1399        u16 val;
1400
1401        if (intel_sdvo_conn->left)
1402                UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1403
1404        if (intel_sdvo_conn->top)
1405                UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1406
1407        if (intel_sdvo_conn->hpos)
1408                UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1409
1410        if (intel_sdvo_conn->vpos)
1411                UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1412
1413        if (intel_sdvo_conn->saturation)
1414                UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1415
1416        if (intel_sdvo_conn->contrast)
1417                UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1418
1419        if (intel_sdvo_conn->hue)
1420                UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1421
1422        if (intel_sdvo_conn->brightness)
1423                UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1424
1425        if (intel_sdvo_conn->sharpness)
1426                UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1427
1428        if (intel_sdvo_conn->flicker_filter)
1429                UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1430
1431        if (intel_sdvo_conn->flicker_filter_2d)
1432                UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1433
1434        if (intel_sdvo_conn->flicker_filter_adaptive)
1435                UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1436
1437        if (intel_sdvo_conn->tv_chroma_filter)
1438                UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1439
1440        if (intel_sdvo_conn->tv_luma_filter)
1441                UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1442
1443        if (intel_sdvo_conn->dot_crawl)
1444                UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1445
1446#undef UPDATE_PROPERTY
1447}
1448
1449static void intel_sdvo_pre_enable(struct intel_atomic_state *state,
1450                                  struct intel_encoder *intel_encoder,
1451                                  const struct intel_crtc_state *crtc_state,
1452                                  const struct drm_connector_state *conn_state)
1453{
1454        struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1455        struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
1456        const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
1457        const struct intel_sdvo_connector_state *sdvo_state =
1458                to_intel_sdvo_connector_state(conn_state);
1459        const struct intel_sdvo_connector *intel_sdvo_connector =
1460                to_intel_sdvo_connector(conn_state->connector);
1461        const struct drm_display_mode *mode = &crtc_state->hw.mode;
1462        struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1463        u32 sdvox;
1464        struct intel_sdvo_in_out_map in_out;
1465        struct intel_sdvo_dtd input_dtd, output_dtd;
1466        int rate;
1467
1468        intel_sdvo_update_props(intel_sdvo, sdvo_state);
1469
1470        /*
1471         * First, set the input mapping for the first input to our controlled
1472         * output. This is only correct if we're a single-input device, in
1473         * which case the first input is the output from the appropriate SDVO
1474         * channel on the motherboard.  In a two-input device, the first input
1475         * will be SDVOB and the second SDVOC.
1476         */
1477        in_out.in0 = intel_sdvo->attached_output;
1478        in_out.in1 = 0;
1479
1480        intel_sdvo_set_value(intel_sdvo,
1481                             SDVO_CMD_SET_IN_OUT_MAP,
1482                             &in_out, sizeof(in_out));
1483
1484        /* Set the output timings to the screen */
1485        if (!intel_sdvo_set_target_output(intel_sdvo,
1486                                          intel_sdvo->attached_output))
1487                return;
1488
1489        /* lvds has a special fixed output timing. */
1490        if (IS_LVDS(intel_sdvo_connector))
1491                intel_sdvo_get_dtd_from_mode(&output_dtd,
1492                                             intel_sdvo_connector->base.panel.fixed_mode);
1493        else
1494                intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1495        if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1496                drm_info(&dev_priv->drm,
1497                         "Setting output timings on %s failed\n",
1498                         SDVO_NAME(intel_sdvo));
1499
1500        /* Set the input timing to the screen. Assume always input 0. */
1501        if (!intel_sdvo_set_target_input(intel_sdvo))
1502                return;
1503
1504        if (crtc_state->has_hdmi_sink) {
1505                intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1506                intel_sdvo_set_colorimetry(intel_sdvo,
1507                                           crtc_state->limited_color_range ?
1508                                           SDVO_COLORIMETRY_RGB220 :
1509                                           SDVO_COLORIMETRY_RGB256);
1510                intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1511                intel_sdvo_set_pixel_replication(intel_sdvo,
1512                                                 !!(adjusted_mode->flags &
1513                                                    DRM_MODE_FLAG_DBLCLK));
1514        } else
1515                intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1516
1517        if (IS_TV(intel_sdvo_connector) &&
1518            !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1519                return;
1520
1521        intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1522
1523        if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector))
1524                input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1525        if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1526                drm_info(&dev_priv->drm,
1527                         "Setting input timings on %s failed\n",
1528                         SDVO_NAME(intel_sdvo));
1529
1530        switch (crtc_state->pixel_multiplier) {
1531        default:
1532                drm_WARN(&dev_priv->drm, 1,
1533                         "unknown pixel multiplier specified\n");
1534                fallthrough;
1535        case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1536        case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1537        case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1538        }
1539        if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1540                return;
1541
1542        /* Set the SDVO control regs. */
1543        if (INTEL_GEN(dev_priv) >= 4) {
1544                /* The real mode polarity is set by the SDVO commands, using
1545                 * struct intel_sdvo_dtd. */
1546                sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1547                if (INTEL_GEN(dev_priv) < 5)
1548                        sdvox |= SDVO_BORDER_ENABLE;
1549        } else {
1550                sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1551                if (intel_sdvo->port == PORT_B)
1552                        sdvox &= SDVOB_PRESERVE_MASK;
1553                else
1554                        sdvox &= SDVOC_PRESERVE_MASK;
1555                sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1556        }
1557
1558        if (HAS_PCH_CPT(dev_priv))
1559                sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1560        else
1561                sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1562
1563        if (INTEL_GEN(dev_priv) >= 4) {
1564                /* done in crtc_mode_set as the dpll_md reg must be written early */
1565        } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1566                   IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1567                /* done in crtc_mode_set as it lives inside the dpll register */
1568        } else {
1569                sdvox |= (crtc_state->pixel_multiplier - 1)
1570                        << SDVO_PORT_MULTIPLY_SHIFT;
1571        }
1572
1573        if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1574            INTEL_GEN(dev_priv) < 5)
1575                sdvox |= SDVO_STALL_SELECT;
1576        intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1577}
1578
1579static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1580{
1581        struct intel_sdvo_connector *intel_sdvo_connector =
1582                to_intel_sdvo_connector(&connector->base);
1583        struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1584        u16 active_outputs = 0;
1585
1586        intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1587
1588        return active_outputs & intel_sdvo_connector->output_flag;
1589}
1590
1591bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
1592                             i915_reg_t sdvo_reg, enum pipe *pipe)
1593{
1594        u32 val;
1595
1596        val = intel_de_read(dev_priv, sdvo_reg);
1597
1598        /* asserts want to know the pipe even if the port is disabled */
1599        if (HAS_PCH_CPT(dev_priv))
1600                *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT;
1601        else if (IS_CHERRYVIEW(dev_priv))
1602                *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV;
1603        else
1604                *pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT;
1605
1606        return val & SDVO_ENABLE;
1607}
1608
1609static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1610                                    enum pipe *pipe)
1611{
1612        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1613        struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1614        u16 active_outputs = 0;
1615        bool ret;
1616
1617        intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1618
1619        ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe);
1620
1621        return ret || active_outputs;
1622}
1623
1624static void intel_sdvo_get_config(struct intel_encoder *encoder,
1625                                  struct intel_crtc_state *pipe_config)
1626{
1627        struct drm_device *dev = encoder->base.dev;
1628        struct drm_i915_private *dev_priv = to_i915(dev);
1629        struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1630        struct intel_sdvo_dtd dtd;
1631        int encoder_pixel_multiplier = 0;
1632        int dotclock;
1633        u32 flags = 0, sdvox;
1634        u8 val;
1635        bool ret;
1636
1637        pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
1638
1639        sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1640
1641        ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1642        if (!ret) {
1643                /*
1644                 * Some sdvo encoders are not spec compliant and don't
1645                 * implement the mandatory get_timings function.
1646                 */
1647                drm_dbg(&dev_priv->drm, "failed to retrieve SDVO DTD\n");
1648                pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1649        } else {
1650                if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1651                        flags |= DRM_MODE_FLAG_PHSYNC;
1652                else
1653                        flags |= DRM_MODE_FLAG_NHSYNC;
1654
1655                if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1656                        flags |= DRM_MODE_FLAG_PVSYNC;
1657                else
1658                        flags |= DRM_MODE_FLAG_NVSYNC;
1659        }
1660
1661        pipe_config->hw.adjusted_mode.flags |= flags;
1662
1663        /*
1664         * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1665         * the sdvo port register, on all other platforms it is part of the dpll
1666         * state. Since the general pipe state readout happens before the
1667         * encoder->get_config we so already have a valid pixel multplier on all
1668         * other platfroms.
1669         */
1670        if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1671                pipe_config->pixel_multiplier =
1672                        ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1673                         >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1674        }
1675
1676        dotclock = pipe_config->port_clock;
1677
1678        if (pipe_config->pixel_multiplier)
1679                dotclock /= pipe_config->pixel_multiplier;
1680
1681        pipe_config->hw.adjusted_mode.crtc_clock = dotclock;
1682
1683        /* Cross check the port pixel multiplier with the sdvo encoder state. */
1684        if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1685                                 &val, 1)) {
1686                switch (val) {
1687                case SDVO_CLOCK_RATE_MULT_1X:
1688                        encoder_pixel_multiplier = 1;
1689                        break;
1690                case SDVO_CLOCK_RATE_MULT_2X:
1691                        encoder_pixel_multiplier = 2;
1692                        break;
1693                case SDVO_CLOCK_RATE_MULT_4X:
1694                        encoder_pixel_multiplier = 4;
1695                        break;
1696                }
1697        }
1698
1699        drm_WARN(dev,
1700                 encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1701                 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1702                 pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1703
1704        if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_COLORIMETRY,
1705                                 &val, 1)) {
1706                if (val == SDVO_COLORIMETRY_RGB220)
1707                        pipe_config->limited_color_range = true;
1708        }
1709
1710        if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT,
1711                                 &val, 1)) {
1712                u8 mask = SDVO_AUDIO_ELD_VALID | SDVO_AUDIO_PRESENCE_DETECT;
1713
1714                if ((val & mask) == mask)
1715                        pipe_config->has_audio = true;
1716        }
1717
1718        if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1719                                 &val, 1)) {
1720                if (val == SDVO_ENCODE_HDMI)
1721                        pipe_config->has_hdmi_sink = true;
1722        }
1723
1724        intel_sdvo_get_avi_infoframe(intel_sdvo, pipe_config);
1725}
1726
1727static void intel_sdvo_disable_audio(struct intel_sdvo *intel_sdvo)
1728{
1729        intel_sdvo_set_audio_state(intel_sdvo, 0);
1730}
1731
1732static void intel_sdvo_enable_audio(struct intel_sdvo *intel_sdvo,
1733                                    const struct intel_crtc_state *crtc_state,
1734                                    const struct drm_connector_state *conn_state)
1735{
1736        const struct drm_display_mode *adjusted_mode =
1737                &crtc_state->hw.adjusted_mode;
1738        struct drm_connector *connector = conn_state->connector;
1739        u8 *eld = connector->eld;
1740
1741        eld[6] = drm_av_sync_delay(connector, adjusted_mode) / 2;
1742
1743        intel_sdvo_set_audio_state(intel_sdvo, 0);
1744
1745        intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_ELD,
1746                                   SDVO_HBUF_TX_DISABLED,
1747                                   eld, drm_eld_size(eld));
1748
1749        intel_sdvo_set_audio_state(intel_sdvo, SDVO_AUDIO_ELD_VALID |
1750                                   SDVO_AUDIO_PRESENCE_DETECT);
1751}
1752
1753static void intel_disable_sdvo(struct intel_atomic_state *state,
1754                               struct intel_encoder *encoder,
1755                               const struct intel_crtc_state *old_crtc_state,
1756                               const struct drm_connector_state *conn_state)
1757{
1758        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1759        struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1760        struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
1761        u32 temp;
1762
1763        if (old_crtc_state->has_audio)
1764                intel_sdvo_disable_audio(intel_sdvo);
1765
1766        intel_sdvo_set_active_outputs(intel_sdvo, 0);
1767        if (0)
1768                intel_sdvo_set_encoder_power_state(intel_sdvo,
1769                                                   DRM_MODE_DPMS_OFF);
1770
1771        temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1772
1773        temp &= ~SDVO_ENABLE;
1774        intel_sdvo_write_sdvox(intel_sdvo, temp);
1775
1776        /*
1777         * HW workaround for IBX, we need to move the port
1778         * to transcoder A after disabling it to allow the
1779         * matching DP port to be enabled on transcoder A.
1780         */
1781        if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1782                /*
1783                 * We get CPU/PCH FIFO underruns on the other pipe when
1784                 * doing the workaround. Sweep them under the rug.
1785                 */
1786                intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1787                intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1788
1789                temp &= ~SDVO_PIPE_SEL_MASK;
1790                temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A);
1791                intel_sdvo_write_sdvox(intel_sdvo, temp);
1792
1793                temp &= ~SDVO_ENABLE;
1794                intel_sdvo_write_sdvox(intel_sdvo, temp);
1795
1796                intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1797                intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1798                intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1799        }
1800}
1801
1802static void pch_disable_sdvo(struct intel_atomic_state *state,
1803                             struct intel_encoder *encoder,
1804                             const struct intel_crtc_state *old_crtc_state,
1805                             const struct drm_connector_state *old_conn_state)
1806{
1807}
1808
1809static void pch_post_disable_sdvo(struct intel_atomic_state *state,
1810                                  struct intel_encoder *encoder,
1811                                  const struct intel_crtc_state *old_crtc_state,
1812                                  const struct drm_connector_state *old_conn_state)
1813{
1814        intel_disable_sdvo(state, encoder, old_crtc_state, old_conn_state);
1815}
1816
1817static void intel_enable_sdvo(struct intel_atomic_state *state,
1818                              struct intel_encoder *encoder,
1819                              const struct intel_crtc_state *pipe_config,
1820                              const struct drm_connector_state *conn_state)
1821{
1822        struct drm_device *dev = encoder->base.dev;
1823        struct drm_i915_private *dev_priv = to_i915(dev);
1824        struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1825        struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc);
1826        u32 temp;
1827        bool input1, input2;
1828        int i;
1829        bool success;
1830
1831        temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1832        temp |= SDVO_ENABLE;
1833        intel_sdvo_write_sdvox(intel_sdvo, temp);
1834
1835        for (i = 0; i < 2; i++)
1836                intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
1837
1838        success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1839        /*
1840         * Warn if the device reported failure to sync.
1841         *
1842         * A lot of SDVO devices fail to notify of sync, but it's
1843         * a given it the status is a success, we succeeded.
1844         */
1845        if (success && !input1) {
1846                drm_dbg_kms(&dev_priv->drm,
1847                            "First %s output reported failure to "
1848                            "sync\n", SDVO_NAME(intel_sdvo));
1849        }
1850
1851        if (0)
1852                intel_sdvo_set_encoder_power_state(intel_sdvo,
1853                                                   DRM_MODE_DPMS_ON);
1854        intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1855
1856        if (pipe_config->has_audio)
1857                intel_sdvo_enable_audio(intel_sdvo, pipe_config, conn_state);
1858}
1859
1860static enum drm_mode_status
1861intel_sdvo_mode_valid(struct drm_connector *connector,
1862                      struct drm_display_mode *mode)
1863{
1864        struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
1865        struct intel_sdvo_connector *intel_sdvo_connector =
1866                to_intel_sdvo_connector(connector);
1867        int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1868        bool has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo, connector->state);
1869        int clock = mode->clock;
1870
1871        if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1872                return MODE_NO_DBLESCAN;
1873
1874
1875        if (clock > max_dotclk)
1876                return MODE_CLOCK_HIGH;
1877
1878        if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
1879                if (!has_hdmi_sink)
1880                        return MODE_CLOCK_LOW;
1881                clock *= 2;
1882        }
1883
1884        if (intel_sdvo->pixel_clock_min > clock)
1885                return MODE_CLOCK_LOW;
1886
1887        if (intel_sdvo->pixel_clock_max < clock)
1888                return MODE_CLOCK_HIGH;
1889
1890        if (IS_LVDS(intel_sdvo_connector)) {
1891                const struct drm_display_mode *fixed_mode =
1892                        intel_sdvo_connector->base.panel.fixed_mode;
1893
1894                if (mode->hdisplay > fixed_mode->hdisplay)
1895                        return MODE_PANEL;
1896
1897                if (mode->vdisplay > fixed_mode->vdisplay)
1898                        return MODE_PANEL;
1899        }
1900
1901        return MODE_OK;
1902}
1903
1904static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1905{
1906        BUILD_BUG_ON(sizeof(*caps) != 8);
1907        if (!intel_sdvo_get_value(intel_sdvo,
1908                                  SDVO_CMD_GET_DEVICE_CAPS,
1909                                  caps, sizeof(*caps)))
1910                return false;
1911
1912        DRM_DEBUG_KMS("SDVO capabilities:\n"
1913                      "  vendor_id: %d\n"
1914                      "  device_id: %d\n"
1915                      "  device_rev_id: %d\n"
1916                      "  sdvo_version_major: %d\n"
1917                      "  sdvo_version_minor: %d\n"
1918                      "  sdvo_inputs_mask: %d\n"
1919                      "  smooth_scaling: %d\n"
1920                      "  sharp_scaling: %d\n"
1921                      "  up_scaling: %d\n"
1922                      "  down_scaling: %d\n"
1923                      "  stall_support: %d\n"
1924                      "  output_flags: %d\n",
1925                      caps->vendor_id,
1926                      caps->device_id,
1927                      caps->device_rev_id,
1928                      caps->sdvo_version_major,
1929                      caps->sdvo_version_minor,
1930                      caps->sdvo_inputs_mask,
1931                      caps->smooth_scaling,
1932                      caps->sharp_scaling,
1933                      caps->up_scaling,
1934                      caps->down_scaling,
1935                      caps->stall_support,
1936                      caps->output_flags);
1937
1938        return true;
1939}
1940
1941static u8 intel_sdvo_get_colorimetry_cap(struct intel_sdvo *intel_sdvo)
1942{
1943        u8 cap;
1944
1945        if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_COLORIMETRY_CAP,
1946                                  &cap, sizeof(cap)))
1947                return SDVO_COLORIMETRY_RGB256;
1948
1949        return cap;
1950}
1951
1952static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1953{
1954        struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1955        u16 hotplug;
1956
1957        if (!I915_HAS_HOTPLUG(dev_priv))
1958                return 0;
1959
1960        /*
1961         * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1962         * on the line.
1963         */
1964        if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
1965                return 0;
1966
1967        if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1968                                        &hotplug, sizeof(hotplug)))
1969                return 0;
1970
1971        return hotplug;
1972}
1973
1974static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1975{
1976        struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1977
1978        intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1979                             &intel_sdvo->hotplug_active, 2);
1980}
1981
1982static enum intel_hotplug_state
1983intel_sdvo_hotplug(struct intel_encoder *encoder,
1984                   struct intel_connector *connector)
1985{
1986        intel_sdvo_enable_hotplug(encoder);
1987
1988        return intel_encoder_hotplug(encoder, connector);
1989}
1990
1991static bool
1992intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1993{
1994        /* Is there more than one type of output? */
1995        return hweight16(intel_sdvo->caps.output_flags) > 1;
1996}
1997
1998static struct edid *
1999intel_sdvo_get_edid(struct drm_connector *connector)
2000{
2001        struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector));
2002        return drm_get_edid(connector, &sdvo->ddc);
2003}
2004
2005/* Mac mini hack -- use the same DDC as the analog connector */
2006static struct edid *
2007intel_sdvo_get_analog_edid(struct drm_connector *connector)
2008{
2009        struct drm_i915_private *dev_priv = to_i915(connector->dev);
2010
2011        return drm_get_edid(connector,
2012                            intel_gmbus_get_adapter(dev_priv,
2013                                                    dev_priv->vbt.crt_ddc_pin));
2014}
2015
2016static enum drm_connector_status
2017intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
2018{
2019        struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2020        struct intel_sdvo_connector *intel_sdvo_connector =
2021                to_intel_sdvo_connector(connector);
2022        enum drm_connector_status status;
2023        struct edid *edid;
2024
2025        edid = intel_sdvo_get_edid(connector);
2026
2027        if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
2028                u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
2029
2030                /*
2031                 * Don't use the 1 as the argument of DDC bus switch to get
2032                 * the EDID. It is used for SDVO SPD ROM.
2033                 */
2034                for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
2035                        intel_sdvo->ddc_bus = ddc;
2036                        edid = intel_sdvo_get_edid(connector);
2037                        if (edid)
2038                                break;
2039                }
2040                /*
2041                 * If we found the EDID on the other bus,
2042                 * assume that is the correct DDC bus.
2043                 */
2044                if (edid == NULL)
2045                        intel_sdvo->ddc_bus = saved_ddc;
2046        }
2047
2048        /*
2049         * When there is no edid and no monitor is connected with VGA
2050         * port, try to use the CRT ddc to read the EDID for DVI-connector.
2051         */
2052        if (edid == NULL)
2053                edid = intel_sdvo_get_analog_edid(connector);
2054
2055        status = connector_status_unknown;
2056        if (edid != NULL) {
2057                /* DDC bus is shared, match EDID to connector type */
2058                if (edid->input & DRM_EDID_INPUT_DIGITAL) {
2059                        status = connector_status_connected;
2060                        if (intel_sdvo_connector->is_hdmi) {
2061                                intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
2062                                intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
2063                        }
2064                } else
2065                        status = connector_status_disconnected;
2066                kfree(edid);
2067        }
2068
2069        return status;
2070}
2071
2072static bool
2073intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
2074                                  struct edid *edid)
2075{
2076        bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
2077        bool connector_is_digital = !!IS_DIGITAL(sdvo);
2078
2079        DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
2080                      connector_is_digital, monitor_is_digital);
2081        return connector_is_digital == monitor_is_digital;
2082}
2083
2084static enum drm_connector_status
2085intel_sdvo_detect(struct drm_connector *connector, bool force)
2086{
2087        struct drm_i915_private *i915 = to_i915(connector->dev);
2088        struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2089        struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2090        enum drm_connector_status ret;
2091        u16 response;
2092
2093        DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2094                      connector->base.id, connector->name);
2095
2096        if (!INTEL_DISPLAY_ENABLED(i915))
2097                return connector_status_disconnected;
2098
2099        if (!intel_sdvo_get_value(intel_sdvo,
2100                                  SDVO_CMD_GET_ATTACHED_DISPLAYS,
2101                                  &response, 2))
2102                return connector_status_unknown;
2103
2104        DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
2105                      response & 0xff, response >> 8,
2106                      intel_sdvo_connector->output_flag);
2107
2108        if (response == 0)
2109                return connector_status_disconnected;
2110
2111        intel_sdvo->attached_output = response;
2112
2113        intel_sdvo->has_hdmi_monitor = false;
2114        intel_sdvo->has_hdmi_audio = false;
2115
2116        if ((intel_sdvo_connector->output_flag & response) == 0)
2117                ret = connector_status_disconnected;
2118        else if (IS_TMDS(intel_sdvo_connector))
2119                ret = intel_sdvo_tmds_sink_detect(connector);
2120        else {
2121                struct edid *edid;
2122
2123                /* if we have an edid check it matches the connection */
2124                edid = intel_sdvo_get_edid(connector);
2125                if (edid == NULL)
2126                        edid = intel_sdvo_get_analog_edid(connector);
2127                if (edid != NULL) {
2128                        if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
2129                                                              edid))
2130                                ret = connector_status_connected;
2131                        else
2132                                ret = connector_status_disconnected;
2133
2134                        kfree(edid);
2135                } else
2136                        ret = connector_status_connected;
2137        }
2138
2139        return ret;
2140}
2141
2142static int intel_sdvo_get_ddc_modes(struct drm_connector *connector)
2143{
2144        int num_modes = 0;
2145        struct edid *edid;
2146
2147        DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2148                      connector->base.id, connector->name);
2149
2150        /* set the bus switch and get the modes */
2151        edid = intel_sdvo_get_edid(connector);
2152
2153        /*
2154         * Mac mini hack.  On this device, the DVI-I connector shares one DDC
2155         * link between analog and digital outputs. So, if the regular SDVO
2156         * DDC fails, check to see if the analog output is disconnected, in
2157         * which case we'll look there for the digital DDC data.
2158         */
2159        if (!edid)
2160                edid = intel_sdvo_get_analog_edid(connector);
2161
2162        if (!edid)
2163                return 0;
2164
2165        if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
2166                                              edid))
2167                num_modes += intel_connector_update_modes(connector, edid);
2168
2169        kfree(edid);
2170
2171        return num_modes;
2172}
2173
2174/*
2175 * Set of SDVO TV modes.
2176 * Note!  This is in reply order (see loop in get_tv_modes).
2177 * XXX: all 60Hz refresh?
2178 */
2179static const struct drm_display_mode sdvo_tv_modes[] = {
2180        { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
2181                   416, 0, 200, 201, 232, 233, 0,
2182                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2183        { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
2184                   416, 0, 240, 241, 272, 273, 0,
2185                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2186        { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
2187                   496, 0, 300, 301, 332, 333, 0,
2188                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2189        { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
2190                   736, 0, 350, 351, 382, 383, 0,
2191                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2192        { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
2193                   736, 0, 400, 401, 432, 433, 0,
2194                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2195        { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
2196                   736, 0, 480, 481, 512, 513, 0,
2197                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2198        { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
2199                   800, 0, 480, 481, 512, 513, 0,
2200                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2201        { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
2202                   800, 0, 576, 577, 608, 609, 0,
2203                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2204        { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
2205                   816, 0, 350, 351, 382, 383, 0,
2206                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2207        { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
2208                   816, 0, 400, 401, 432, 433, 0,
2209                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2210        { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
2211                   816, 0, 480, 481, 512, 513, 0,
2212                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2213        { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
2214                   816, 0, 540, 541, 572, 573, 0,
2215                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2216        { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
2217                   816, 0, 576, 577, 608, 609, 0,
2218                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2219        { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
2220                   864, 0, 576, 577, 608, 609, 0,
2221                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2222        { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
2223                   896, 0, 600, 601, 632, 633, 0,
2224                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2225        { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
2226                   928, 0, 624, 625, 656, 657, 0,
2227                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2228        { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
2229                   1016, 0, 766, 767, 798, 799, 0,
2230                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2231        { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
2232                   1120, 0, 768, 769, 800, 801, 0,
2233                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2234        { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
2235                   1376, 0, 1024, 1025, 1056, 1057, 0,
2236                   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2237};
2238
2239static int intel_sdvo_get_tv_modes(struct drm_connector *connector)
2240{
2241        struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2242        const struct drm_connector_state *conn_state = connector->state;
2243        struct intel_sdvo_sdtv_resolution_request tv_res;
2244        u32 reply = 0, format_map = 0;
2245        int num_modes = 0;
2246        int i;
2247
2248        DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2249                      connector->base.id, connector->name);
2250
2251        /*
2252         * Read the list of supported input resolutions for the selected TV
2253         * format.
2254         */
2255        format_map = 1 << conn_state->tv.mode;
2256        memcpy(&tv_res, &format_map,
2257               min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
2258
2259        if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
2260                return 0;
2261
2262        BUILD_BUG_ON(sizeof(tv_res) != 3);
2263        if (!intel_sdvo_write_cmd(intel_sdvo,
2264                                  SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
2265                                  &tv_res, sizeof(tv_res)))
2266                return 0;
2267        if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
2268                return 0;
2269
2270        for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) {
2271                if (reply & (1 << i)) {
2272                        struct drm_display_mode *nmode;
2273                        nmode = drm_mode_duplicate(connector->dev,
2274                                                   &sdvo_tv_modes[i]);
2275                        if (nmode) {
2276                                drm_mode_probed_add(connector, nmode);
2277                                num_modes++;
2278                        }
2279                }
2280        }
2281
2282        return num_modes;
2283}
2284
2285static int intel_sdvo_get_lvds_modes(struct drm_connector *connector)
2286{
2287        struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2288        struct drm_i915_private *dev_priv = to_i915(connector->dev);
2289        struct drm_display_mode *newmode;
2290        int num_modes = 0;
2291
2292        drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s]\n",
2293                    connector->base.id, connector->name);
2294
2295        /*
2296         * Fetch modes from VBT. For SDVO prefer the VBT mode since some
2297         * SDVO->LVDS transcoders can't cope with the EDID mode.
2298         */
2299        if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
2300                newmode = drm_mode_duplicate(connector->dev,
2301                                             dev_priv->vbt.sdvo_lvds_vbt_mode);
2302                if (newmode != NULL) {
2303                        /* Guarantee the mode is preferred */
2304                        newmode->type = (DRM_MODE_TYPE_PREFERRED |
2305                                         DRM_MODE_TYPE_DRIVER);
2306                        drm_mode_probed_add(connector, newmode);
2307                        num_modes++;
2308                }
2309        }
2310
2311        /*
2312         * Attempt to get the mode list from DDC.
2313         * Assume that the preferred modes are
2314         * arranged in priority order.
2315         */
2316        num_modes += intel_ddc_get_modes(connector, &intel_sdvo->ddc);
2317
2318        return num_modes;
2319}
2320
2321static int intel_sdvo_get_modes(struct drm_connector *connector)
2322{
2323        struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2324
2325        if (IS_TV(intel_sdvo_connector))
2326                return intel_sdvo_get_tv_modes(connector);
2327        else if (IS_LVDS(intel_sdvo_connector))
2328                return intel_sdvo_get_lvds_modes(connector);
2329        else
2330                return intel_sdvo_get_ddc_modes(connector);
2331}
2332
2333static int
2334intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2335                                         const struct drm_connector_state *state,
2336                                         struct drm_property *property,
2337                                         u64 *val)
2338{
2339        struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2340        const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);
2341
2342        if (property == intel_sdvo_connector->tv_format) {
2343                int i;
2344
2345                for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2346                        if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) {
2347                                *val = i;
2348
2349                                return 0;
2350                        }
2351
2352                drm_WARN_ON(connector->dev, 1);
2353                *val = 0;
2354        } else if (property == intel_sdvo_connector->top ||
2355                   property == intel_sdvo_connector->bottom)
2356                *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2357        else if (property == intel_sdvo_connector->left ||
2358                 property == intel_sdvo_connector->right)
2359                *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2360        else if (property == intel_sdvo_connector->hpos)
2361                *val = sdvo_state->tv.hpos;
2362        else if (property == intel_sdvo_connector->vpos)
2363                *val = sdvo_state->tv.vpos;
2364        else if (property == intel_sdvo_connector->saturation)
2365                *val = state->tv.saturation;
2366        else if (property == intel_sdvo_connector->contrast)
2367                *val = state->tv.contrast;
2368        else if (property == intel_sdvo_connector->hue)
2369                *val = state->tv.hue;
2370        else if (property == intel_sdvo_connector->brightness)
2371                *val = state->tv.brightness;
2372        else if (property == intel_sdvo_connector->sharpness)
2373                *val = sdvo_state->tv.sharpness;
2374        else if (property == intel_sdvo_connector->flicker_filter)
2375                *val = sdvo_state->tv.flicker_filter;
2376        else if (property == intel_sdvo_connector->flicker_filter_2d)
2377                *val = sdvo_state->tv.flicker_filter_2d;
2378        else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2379                *val = sdvo_state->tv.flicker_filter_adaptive;
2380        else if (property == intel_sdvo_connector->tv_chroma_filter)
2381                *val = sdvo_state->tv.chroma_filter;
2382        else if (property == intel_sdvo_connector->tv_luma_filter)
2383                *val = sdvo_state->tv.luma_filter;
2384        else if (property == intel_sdvo_connector->dot_crawl)
2385                *val = sdvo_state->tv.dot_crawl;
2386        else
2387                return intel_digital_connector_atomic_get_property(connector, state, property, val);
2388
2389        return 0;
2390}
2391
2392static int
2393intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2394                                         struct drm_connector_state *state,
2395                                         struct drm_property *property,
2396                                         u64 val)
2397{
2398        struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2399        struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2400
2401        if (property == intel_sdvo_connector->tv_format) {
2402                state->tv.mode = intel_sdvo_connector->tv_format_supported[val];
2403
2404                if (state->crtc) {
2405                        struct drm_crtc_state *crtc_state =
2406                                drm_atomic_get_new_crtc_state(state->state, state->crtc);
2407
2408                        crtc_state->connectors_changed = true;
2409                }
2410        } else if (property == intel_sdvo_connector->top ||
2411                   property == intel_sdvo_connector->bottom)
2412                /* Cannot set these independent from each other */
2413                sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2414        else if (property == intel_sdvo_connector->left ||
2415                 property == intel_sdvo_connector->right)
2416                /* Cannot set these independent from each other */
2417                sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2418        else if (property == intel_sdvo_connector->hpos)
2419                sdvo_state->tv.hpos = val;
2420        else if (property == intel_sdvo_connector->vpos)
2421                sdvo_state->tv.vpos = val;
2422        else if (property == intel_sdvo_connector->saturation)
2423                state->tv.saturation = val;
2424        else if (property == intel_sdvo_connector->contrast)
2425                state->tv.contrast = val;
2426        else if (property == intel_sdvo_connector->hue)
2427                state->tv.hue = val;
2428        else if (property == intel_sdvo_connector->brightness)
2429                state->tv.brightness = val;
2430        else if (property == intel_sdvo_connector->sharpness)
2431                sdvo_state->tv.sharpness = val;
2432        else if (property == intel_sdvo_connector->flicker_filter)
2433                sdvo_state->tv.flicker_filter = val;
2434        else if (property == intel_sdvo_connector->flicker_filter_2d)
2435                sdvo_state->tv.flicker_filter_2d = val;
2436        else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2437                sdvo_state->tv.flicker_filter_adaptive = val;
2438        else if (property == intel_sdvo_connector->tv_chroma_filter)
2439                sdvo_state->tv.chroma_filter = val;
2440        else if (property == intel_sdvo_connector->tv_luma_filter)
2441                sdvo_state->tv.luma_filter = val;
2442        else if (property == intel_sdvo_connector->dot_crawl)
2443                sdvo_state->tv.dot_crawl = val;
2444        else
2445                return intel_digital_connector_atomic_set_property(connector, state, property, val);
2446
2447        return 0;
2448}
2449
2450static int
2451intel_sdvo_connector_register(struct drm_connector *connector)
2452{
2453        struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector));
2454        int ret;
2455
2456        ret = intel_connector_register(connector);
2457        if (ret)
2458                return ret;
2459
2460        return sysfs_create_link(&connector->kdev->kobj,
2461                                 &sdvo->ddc.dev.kobj,
2462                                 sdvo->ddc.dev.kobj.name);
2463}
2464
2465static void
2466intel_sdvo_connector_unregister(struct drm_connector *connector)
2467{
2468        struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector));
2469
2470        sysfs_remove_link(&connector->kdev->kobj,
2471                          sdvo->ddc.dev.kobj.name);
2472        intel_connector_unregister(connector);
2473}
2474
2475static struct drm_connector_state *
2476intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2477{
2478        struct intel_sdvo_connector_state *state;
2479
2480        state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2481        if (!state)
2482                return NULL;
2483
2484        __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2485        return &state->base.base;
2486}
2487
2488static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2489        .detect = intel_sdvo_detect,
2490        .fill_modes = drm_helper_probe_single_connector_modes,
2491        .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2492        .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2493        .late_register = intel_sdvo_connector_register,
2494        .early_unregister = intel_sdvo_connector_unregister,
2495        .destroy = intel_connector_destroy,
2496        .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2497        .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2498};
2499
2500static int intel_sdvo_atomic_check(struct drm_connector *conn,
2501                                   struct drm_atomic_state *state)
2502{
2503        struct drm_connector_state *new_conn_state =
2504                drm_atomic_get_new_connector_state(state, conn);
2505        struct drm_connector_state *old_conn_state =
2506                drm_atomic_get_old_connector_state(state, conn);
2507        struct intel_sdvo_connector_state *old_state =
2508                to_intel_sdvo_connector_state(old_conn_state);
2509        struct intel_sdvo_connector_state *new_state =
2510                to_intel_sdvo_connector_state(new_conn_state);
2511
2512        if (new_conn_state->crtc &&
2513            (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2514             memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2515                struct drm_crtc_state *crtc_state =
2516                        drm_atomic_get_new_crtc_state(state,
2517                                                      new_conn_state->crtc);
2518
2519                crtc_state->connectors_changed = true;
2520        }
2521
2522        return intel_digital_connector_atomic_check(conn, state);
2523}
2524
2525static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2526        .get_modes = intel_sdvo_get_modes,
2527        .mode_valid = intel_sdvo_mode_valid,
2528        .atomic_check = intel_sdvo_atomic_check,
2529};
2530
2531static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2532{
2533        struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2534
2535        i2c_del_adapter(&intel_sdvo->ddc);
2536        intel_encoder_destroy(encoder);
2537}
2538
2539static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2540        .destroy = intel_sdvo_enc_destroy,
2541};
2542
2543static void
2544intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2545{
2546        u16 mask = 0;
2547        unsigned int num_bits;
2548
2549        /*
2550         * Make a mask of outputs less than or equal to our own priority in the
2551         * list.
2552         */
2553        switch (sdvo->controlled_output) {
2554        case SDVO_OUTPUT_LVDS1:
2555                mask |= SDVO_OUTPUT_LVDS1;
2556                fallthrough;
2557        case SDVO_OUTPUT_LVDS0:
2558                mask |= SDVO_OUTPUT_LVDS0;
2559                fallthrough;
2560        case SDVO_OUTPUT_TMDS1:
2561                mask |= SDVO_OUTPUT_TMDS1;
2562                fallthrough;
2563        case SDVO_OUTPUT_TMDS0:
2564                mask |= SDVO_OUTPUT_TMDS0;
2565                fallthrough;
2566        case SDVO_OUTPUT_RGB1:
2567                mask |= SDVO_OUTPUT_RGB1;
2568                fallthrough;
2569        case SDVO_OUTPUT_RGB0:
2570                mask |= SDVO_OUTPUT_RGB0;
2571                break;
2572        }
2573
2574        /* Count bits to find what number we are in the priority list. */
2575        mask &= sdvo->caps.output_flags;
2576        num_bits = hweight16(mask);
2577        /* If more than 3 outputs, default to DDC bus 3 for now. */
2578        if (num_bits > 3)
2579                num_bits = 3;
2580
2581        /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2582        sdvo->ddc_bus = 1 << num_bits;
2583}
2584
2585/*
2586 * Choose the appropriate DDC bus for control bus switch command for this
2587 * SDVO output based on the controlled output.
2588 *
2589 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2590 * outputs, then LVDS outputs.
2591 */
2592static void
2593intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2594                          struct intel_sdvo *sdvo)
2595{
2596        struct sdvo_device_mapping *mapping;
2597
2598        if (sdvo->port == PORT_B)
2599                mapping = &dev_priv->vbt.sdvo_mappings[0];
2600        else
2601                mapping = &dev_priv->vbt.sdvo_mappings[1];
2602
2603        if (mapping->initialized)
2604                sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2605        else
2606                intel_sdvo_guess_ddc_bus(sdvo);
2607}
2608
2609static void
2610intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2611                          struct intel_sdvo *sdvo)
2612{
2613        struct sdvo_device_mapping *mapping;
2614        u8 pin;
2615
2616        if (sdvo->port == PORT_B)
2617                mapping = &dev_priv->vbt.sdvo_mappings[0];
2618        else
2619                mapping = &dev_priv->vbt.sdvo_mappings[1];
2620
2621        if (mapping->initialized &&
2622            intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2623                pin = mapping->i2c_pin;
2624        else
2625                pin = GMBUS_PIN_DPB;
2626
2627        sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2628
2629        /*
2630         * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2631         * our code totally fails once we start using gmbus. Hence fall back to
2632         * bit banging for now.
2633         */
2634        intel_gmbus_force_bit(sdvo->i2c, true);
2635}
2636
2637/* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2638static void
2639intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2640{
2641        intel_gmbus_force_bit(sdvo->i2c, false);
2642}
2643
2644static bool
2645intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2646{
2647        return intel_sdvo_check_supp_encode(intel_sdvo);
2648}
2649
2650static u8
2651intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv,
2652                          struct intel_sdvo *sdvo)
2653{
2654        struct sdvo_device_mapping *my_mapping, *other_mapping;
2655
2656        if (sdvo->port == PORT_B) {
2657                my_mapping = &dev_priv->vbt.sdvo_mappings[0];
2658                other_mapping = &dev_priv->vbt.sdvo_mappings[1];
2659        } else {
2660                my_mapping = &dev_priv->vbt.sdvo_mappings[1];
2661                other_mapping = &dev_priv->vbt.sdvo_mappings[0];
2662        }
2663
2664        /* If the BIOS described our SDVO device, take advantage of it. */
2665        if (my_mapping->slave_addr)
2666                return my_mapping->slave_addr;
2667
2668        /*
2669         * If the BIOS only described a different SDVO device, use the
2670         * address that it isn't using.
2671         */
2672        if (other_mapping->slave_addr) {
2673                if (other_mapping->slave_addr == 0x70)
2674                        return 0x72;
2675                else
2676                        return 0x70;
2677        }
2678
2679        /*
2680         * No SDVO device info is found for another DVO port,
2681         * so use mapping assumption we had before BIOS parsing.
2682         */
2683        if (sdvo->port == PORT_B)
2684                return 0x70;
2685        else
2686                return 0x72;
2687}
2688
2689static int
2690intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2691                          struct intel_sdvo *encoder)
2692{
2693        struct drm_connector *drm_connector;
2694        int ret;
2695
2696        drm_connector = &connector->base.base;
2697        ret = drm_connector_init(encoder->base.base.dev,
2698                           drm_connector,
2699                           &intel_sdvo_connector_funcs,
2700                           connector->base.base.connector_type);
2701        if (ret < 0)
2702                return ret;
2703
2704        drm_connector_helper_add(drm_connector,
2705                                 &intel_sdvo_connector_helper_funcs);
2706
2707        connector->base.base.interlace_allowed = 1;
2708        connector->base.base.doublescan_allowed = 0;
2709        connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2710        connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2711
2712        intel_connector_attach_encoder(&connector->base, &encoder->base);
2713
2714        return 0;
2715}
2716
2717static void
2718intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2719                               struct intel_sdvo_connector *connector)
2720{
2721        intel_attach_force_audio_property(&connector->base.base);
2722        if (intel_sdvo->colorimetry_cap & SDVO_COLORIMETRY_RGB220)
2723                intel_attach_broadcast_rgb_property(&connector->base.base);
2724        intel_attach_aspect_ratio_property(&connector->base.base);
2725}
2726
2727static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2728{
2729        struct intel_sdvo_connector *sdvo_connector;
2730        struct intel_sdvo_connector_state *conn_state;
2731
2732        sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2733        if (!sdvo_connector)
2734                return NULL;
2735
2736        conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2737        if (!conn_state) {
2738                kfree(sdvo_connector);
2739                return NULL;
2740        }
2741
2742        __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2743                                            &conn_state->base.base);
2744
2745        return sdvo_connector;
2746}
2747
2748static bool
2749intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2750{
2751        struct drm_encoder *encoder = &intel_sdvo->base.base;
2752        struct drm_connector *connector;
2753        struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2754        struct intel_connector *intel_connector;
2755        struct intel_sdvo_connector *intel_sdvo_connector;
2756
2757        DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2758
2759        intel_sdvo_connector = intel_sdvo_connector_alloc();
2760        if (!intel_sdvo_connector)
2761                return false;
2762
2763        if (device == 0) {
2764                intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2765                intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2766        } else if (device == 1) {
2767                intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2768                intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2769        }
2770
2771        intel_connector = &intel_sdvo_connector->base;
2772        connector = &intel_connector->base;
2773        if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2774                intel_sdvo_connector->output_flag) {
2775                intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2776                /*
2777                 * Some SDVO devices have one-shot hotplug interrupts.
2778                 * Ensure that they get re-enabled when an interrupt happens.
2779                 */
2780                intel_connector->polled = DRM_CONNECTOR_POLL_HPD;
2781                intel_encoder->hotplug = intel_sdvo_hotplug;
2782                intel_sdvo_enable_hotplug(intel_encoder);
2783        } else {
2784                intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2785        }
2786        encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2787        connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2788
2789        if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2790                connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2791                intel_sdvo_connector->is_hdmi = true;
2792        }
2793
2794        if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2795                kfree(intel_sdvo_connector);
2796                return false;
2797        }
2798
2799        if (intel_sdvo_connector->is_hdmi)
2800                intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2801
2802        return true;
2803}
2804
2805static bool
2806intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2807{
2808        struct drm_encoder *encoder = &intel_sdvo->base.base;
2809        struct drm_connector *connector;
2810        struct intel_connector *intel_connector;
2811        struct intel_sdvo_connector *intel_sdvo_connector;
2812
2813        DRM_DEBUG_KMS("initialising TV type %d\n", type);
2814
2815        intel_sdvo_connector = intel_sdvo_connector_alloc();
2816        if (!intel_sdvo_connector)
2817                return false;
2818
2819        intel_connector = &intel_sdvo_connector->base;
2820        connector = &intel_connector->base;
2821        encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2822        connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2823
2824        intel_sdvo->controlled_output |= type;
2825        intel_sdvo_connector->output_flag = type;
2826
2827        if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2828                kfree(intel_sdvo_connector);
2829                return false;
2830        }
2831
2832        if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2833                goto err;
2834
2835        if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2836                goto err;
2837
2838        return true;
2839
2840err:
2841        intel_connector_destroy(connector);
2842        return false;
2843}
2844
2845static bool
2846intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2847{
2848        struct drm_encoder *encoder = &intel_sdvo->base.base;
2849        struct drm_connector *connector;
2850        struct intel_connector *intel_connector;
2851        struct intel_sdvo_connector *intel_sdvo_connector;
2852
2853        DRM_DEBUG_KMS("initialising analog device %d\n", device);
2854
2855        intel_sdvo_connector = intel_sdvo_connector_alloc();
2856        if (!intel_sdvo_connector)
2857                return false;
2858
2859        intel_connector = &intel_sdvo_connector->base;
2860        connector = &intel_connector->base;
2861        intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2862        encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2863        connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2864
2865        if (device == 0) {
2866                intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2867                intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2868        } else if (device == 1) {
2869                intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2870                intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2871        }
2872
2873        if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2874                kfree(intel_sdvo_connector);
2875                return false;
2876        }
2877
2878        return true;
2879}
2880
2881static bool
2882intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2883{
2884        struct drm_encoder *encoder = &intel_sdvo->base.base;
2885        struct drm_connector *connector;
2886        struct intel_connector *intel_connector;
2887        struct intel_sdvo_connector *intel_sdvo_connector;
2888        struct drm_display_mode *mode;
2889
2890        DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2891
2892        intel_sdvo_connector = intel_sdvo_connector_alloc();
2893        if (!intel_sdvo_connector)
2894                return false;
2895
2896        intel_connector = &intel_sdvo_connector->base;
2897        connector = &intel_connector->base;
2898        encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2899        connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2900
2901        if (device == 0) {
2902                intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2903                intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2904        } else if (device == 1) {
2905                intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2906                intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2907        }
2908
2909        if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2910                kfree(intel_sdvo_connector);
2911                return false;
2912        }
2913
2914        if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2915                goto err;
2916
2917        intel_sdvo_get_lvds_modes(connector);
2918
2919        list_for_each_entry(mode, &connector->probed_modes, head) {
2920                if (mode->type & DRM_MODE_TYPE_PREFERRED) {
2921                        struct drm_display_mode *fixed_mode =
2922                                drm_mode_duplicate(connector->dev, mode);
2923
2924                        intel_panel_init(&intel_connector->panel,
2925                                         fixed_mode, NULL);
2926                        break;
2927                }
2928        }
2929
2930        if (!intel_connector->panel.fixed_mode)
2931                goto err;
2932
2933        return true;
2934
2935err:
2936        intel_connector_destroy(connector);
2937        return false;
2938}
2939
2940static bool
2941intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags)
2942{
2943        /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2944
2945        if (flags & SDVO_OUTPUT_TMDS0)
2946                if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2947                        return false;
2948
2949        if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2950                if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2951                        return false;
2952
2953        /* TV has no XXX1 function block */
2954        if (flags & SDVO_OUTPUT_SVID0)
2955                if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2956                        return false;
2957
2958        if (flags & SDVO_OUTPUT_CVBS0)
2959                if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2960                        return false;
2961
2962        if (flags & SDVO_OUTPUT_YPRPB0)
2963                if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2964                        return false;
2965
2966        if (flags & SDVO_OUTPUT_RGB0)
2967                if (!intel_sdvo_analog_init(intel_sdvo, 0))
2968                        return false;
2969
2970        if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2971                if (!intel_sdvo_analog_init(intel_sdvo, 1))
2972                        return false;
2973
2974        if (flags & SDVO_OUTPUT_LVDS0)
2975                if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2976                        return false;
2977
2978        if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2979                if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2980                        return false;
2981
2982        if ((flags & SDVO_OUTPUT_MASK) == 0) {
2983                unsigned char bytes[2];
2984
2985                intel_sdvo->controlled_output = 0;
2986                memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2987                DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2988                              SDVO_NAME(intel_sdvo),
2989                              bytes[0], bytes[1]);
2990                return false;
2991        }
2992        intel_sdvo->base.pipe_mask = ~0;
2993
2994        return true;
2995}
2996
2997static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2998{
2999        struct drm_device *dev = intel_sdvo->base.base.dev;
3000        struct drm_connector *connector, *tmp;
3001
3002        list_for_each_entry_safe(connector, tmp,
3003                                 &dev->mode_config.connector_list, head) {
3004                if (intel_attached_encoder(to_intel_connector(connector)) == &intel_sdvo->base) {
3005                        drm_connector_unregister(connector);
3006                        intel_connector_destroy(connector);
3007                }
3008        }
3009}
3010
3011static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
3012                                          struct intel_sdvo_connector *intel_sdvo_connector,
3013                                          int type)
3014{
3015        struct drm_device *dev = intel_sdvo->base.base.dev;
3016        struct intel_sdvo_tv_format format;
3017        u32 format_map, i;
3018
3019        if (!intel_sdvo_set_target_output(intel_sdvo, type))
3020                return false;
3021
3022        BUILD_BUG_ON(sizeof(format) != 6);
3023        if (!intel_sdvo_get_value(intel_sdvo,
3024                                  SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
3025                                  &format, sizeof(format)))
3026                return false;
3027
3028        memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
3029
3030        if (format_map == 0)
3031                return false;
3032
3033        intel_sdvo_connector->format_supported_num = 0;
3034        for (i = 0 ; i < TV_FORMAT_NUM; i++)
3035                if (format_map & (1 << i))
3036                        intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
3037
3038
3039        intel_sdvo_connector->tv_format =
3040                        drm_property_create(dev, DRM_MODE_PROP_ENUM,
3041                                            "mode", intel_sdvo_connector->format_supported_num);
3042        if (!intel_sdvo_connector->tv_format)
3043                return false;
3044
3045        for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
3046                drm_property_add_enum(intel_sdvo_connector->tv_format, i,
3047                                      tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
3048
3049        intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
3050        drm_object_attach_property(&intel_sdvo_connector->base.base.base,
3051                                   intel_sdvo_connector->tv_format, 0);
3052        return true;
3053
3054}
3055
3056#define _ENHANCEMENT(state_assignment, name, NAME) do { \
3057        if (enhancements.name) { \
3058                if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
3059                    !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
3060                        return false; \
3061                intel_sdvo_connector->name = \
3062                        drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
3063                if (!intel_sdvo_connector->name) return false; \
3064                state_assignment = response; \
3065                drm_object_attach_property(&connector->base, \
3066                                           intel_sdvo_connector->name, 0); \
3067                DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
3068                              data_value[0], data_value[1], response); \
3069        } \
3070} while (0)
3071
3072#define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
3073
3074static bool
3075intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
3076                                      struct intel_sdvo_connector *intel_sdvo_connector,
3077                                      struct intel_sdvo_enhancements_reply enhancements)
3078{
3079        struct drm_device *dev = intel_sdvo->base.base.dev;
3080        struct drm_connector *connector = &intel_sdvo_connector->base.base;
3081        struct drm_connector_state *conn_state = connector->state;
3082        struct intel_sdvo_connector_state *sdvo_state =
3083                to_intel_sdvo_connector_state(conn_state);
3084        u16 response, data_value[2];
3085
3086        /* when horizontal overscan is supported, Add the left/right property */
3087        if (enhancements.overscan_h) {
3088                if (!intel_sdvo_get_value(intel_sdvo,
3089                                          SDVO_CMD_GET_MAX_OVERSCAN_H,
3090                                          &data_value, 4))
3091                        return false;
3092
3093                if (!intel_sdvo_get_value(intel_sdvo,
3094                                          SDVO_CMD_GET_OVERSCAN_H,
3095                                          &response, 2))
3096                        return false;
3097
3098                sdvo_state->tv.overscan_h = response;
3099
3100                intel_sdvo_connector->max_hscan = data_value[0];
3101                intel_sdvo_connector->left =
3102                        drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
3103                if (!intel_sdvo_connector->left)
3104                        return false;
3105
3106                drm_object_attach_property(&connector->base,
3107                                           intel_sdvo_connector->left, 0);
3108
3109                intel_sdvo_connector->right =
3110                        drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
3111                if (!intel_sdvo_connector->right)
3112                        return false;
3113
3114                drm_object_attach_property(&connector->base,
3115                                              intel_sdvo_connector->right, 0);
3116                DRM_DEBUG_KMS("h_overscan: max %d, "
3117                              "default %d, current %d\n",
3118                              data_value[0], data_value[1], response);
3119        }
3120
3121        if (enhancements.overscan_v) {
3122                if (!intel_sdvo_get_value(intel_sdvo,
3123                                          SDVO_CMD_GET_MAX_OVERSCAN_V,
3124                                          &data_value, 4))
3125                        return false;
3126
3127                if (!intel_sdvo_get_value(intel_sdvo,
3128                                          SDVO_CMD_GET_OVERSCAN_V,
3129                                          &response, 2))
3130                        return false;
3131
3132                sdvo_state->tv.overscan_v = response;
3133
3134                intel_sdvo_connector->max_vscan = data_value[0];
3135                intel_sdvo_connector->top =
3136                        drm_property_create_range(dev, 0,
3137                                            "top_margin", 0, data_value[0]);
3138                if (!intel_sdvo_connector->top)
3139                        return false;
3140
3141                drm_object_attach_property(&connector->base,
3142                                           intel_sdvo_connector->top, 0);
3143
3144                intel_sdvo_connector->bottom =
3145                        drm_property_create_range(dev, 0,
3146                                            "bottom_margin", 0, data_value[0]);
3147                if (!intel_sdvo_connector->bottom)
3148                        return false;
3149
3150                drm_object_attach_property(&connector->base,
3151                                              intel_sdvo_connector->bottom, 0);
3152                DRM_DEBUG_KMS("v_overscan: max %d, "
3153                              "default %d, current %d\n",
3154                              data_value[0], data_value[1], response);
3155        }
3156
3157        ENHANCEMENT(&sdvo_state->tv, hpos, HPOS);
3158        ENHANCEMENT(&sdvo_state->tv, vpos, VPOS);
3159        ENHANCEMENT(&conn_state->tv, saturation, SATURATION);
3160        ENHANCEMENT(&conn_state->tv, contrast, CONTRAST);
3161        ENHANCEMENT(&conn_state->tv, hue, HUE);
3162        ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS);
3163        ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS);
3164        ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER);
3165        ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
3166        ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D);
3167        _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER);
3168        _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER);
3169
3170        if (enhancements.dot_crawl) {
3171                if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
3172                        return false;
3173
3174                sdvo_state->tv.dot_crawl = response & 0x1;
3175                intel_sdvo_connector->dot_crawl =
3176                        drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
3177                if (!intel_sdvo_connector->dot_crawl)
3178                        return false;
3179
3180                drm_object_attach_property(&connector->base,
3181                                           intel_sdvo_connector->dot_crawl, 0);
3182                DRM_DEBUG_KMS("dot crawl: current %d\n", response);
3183        }
3184
3185        return true;
3186}
3187
3188static bool
3189intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
3190                                        struct intel_sdvo_connector *intel_sdvo_connector,
3191                                        struct intel_sdvo_enhancements_reply enhancements)
3192{
3193        struct drm_device *dev = intel_sdvo->base.base.dev;
3194        struct drm_connector *connector = &intel_sdvo_connector->base.base;
3195        u16 response, data_value[2];
3196
3197        ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS);
3198
3199        return true;
3200}
3201#undef ENHANCEMENT
3202#undef _ENHANCEMENT
3203
3204static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
3205                                               struct intel_sdvo_connector *intel_sdvo_connector)
3206{
3207        union {
3208                struct intel_sdvo_enhancements_reply reply;
3209                u16 response;
3210        } enhancements;
3211
3212        BUILD_BUG_ON(sizeof(enhancements) != 2);
3213
3214        if (!intel_sdvo_get_value(intel_sdvo,
3215                                  SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
3216                                  &enhancements, sizeof(enhancements)) ||
3217            enhancements.response == 0) {
3218                DRM_DEBUG_KMS("No enhancement is supported\n");
3219                return true;
3220        }
3221
3222        if (IS_TV(intel_sdvo_connector))
3223                return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3224        else if (IS_LVDS(intel_sdvo_connector))
3225                return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3226        else
3227                return true;
3228}
3229
3230static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
3231                                     struct i2c_msg *msgs,
3232                                     int num)
3233{
3234        struct intel_sdvo *sdvo = adapter->algo_data;
3235
3236        if (!__intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
3237                return -EIO;
3238
3239        return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
3240}
3241
3242static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
3243{
3244        struct intel_sdvo *sdvo = adapter->algo_data;
3245        return sdvo->i2c->algo->functionality(sdvo->i2c);
3246}
3247
3248static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
3249        .master_xfer    = intel_sdvo_ddc_proxy_xfer,
3250        .functionality  = intel_sdvo_ddc_proxy_func
3251};
3252
3253static void proxy_lock_bus(struct i2c_adapter *adapter,
3254                           unsigned int flags)
3255{
3256        struct intel_sdvo *sdvo = adapter->algo_data;
3257        sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags);
3258}
3259
3260static int proxy_trylock_bus(struct i2c_adapter *adapter,
3261                             unsigned int flags)
3262{
3263        struct intel_sdvo *sdvo = adapter->algo_data;
3264        return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags);
3265}
3266
3267static void proxy_unlock_bus(struct i2c_adapter *adapter,
3268                             unsigned int flags)
3269{
3270        struct intel_sdvo *sdvo = adapter->algo_data;
3271        sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags);
3272}
3273
3274static const struct i2c_lock_operations proxy_lock_ops = {
3275        .lock_bus =    proxy_lock_bus,
3276        .trylock_bus = proxy_trylock_bus,
3277        .unlock_bus =  proxy_unlock_bus,
3278};
3279
3280static bool
3281intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
3282                          struct drm_i915_private *dev_priv)
3283{
3284        struct pci_dev *pdev = dev_priv->drm.pdev;
3285
3286        sdvo->ddc.owner = THIS_MODULE;
3287        sdvo->ddc.class = I2C_CLASS_DDC;
3288        snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
3289        sdvo->ddc.dev.parent = &pdev->dev;
3290        sdvo->ddc.algo_data = sdvo;
3291        sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
3292        sdvo->ddc.lock_ops = &proxy_lock_ops;
3293
3294        return i2c_add_adapter(&sdvo->ddc) == 0;
3295}
3296
3297static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
3298                                   enum port port)
3299{
3300        if (HAS_PCH_SPLIT(dev_priv))
3301                drm_WARN_ON(&dev_priv->drm, port != PORT_B);
3302        else
3303                drm_WARN_ON(&dev_priv->drm, port != PORT_B && port != PORT_C);
3304}
3305
3306bool intel_sdvo_init(struct drm_i915_private *dev_priv,
3307                     i915_reg_t sdvo_reg, enum port port)
3308{
3309        struct intel_encoder *intel_encoder;
3310        struct intel_sdvo *intel_sdvo;
3311        int i;
3312
3313        assert_sdvo_port_valid(dev_priv, port);
3314
3315        intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
3316        if (!intel_sdvo)
3317                return false;
3318
3319        intel_sdvo->sdvo_reg = sdvo_reg;
3320        intel_sdvo->port = port;
3321        intel_sdvo->slave_addr =
3322                intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1;
3323        intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
3324        if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv))
3325                goto err_i2c_bus;
3326
3327        /* encoder type will be decided later */
3328        intel_encoder = &intel_sdvo->base;
3329        intel_encoder->type = INTEL_OUTPUT_SDVO;
3330        intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
3331        intel_encoder->port = port;
3332        drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
3333                         &intel_sdvo_enc_funcs, 0,
3334                         "SDVO %c", port_name(port));
3335
3336        /* Read the regs to test if we can talk to the device */
3337        for (i = 0; i < 0x40; i++) {
3338                u8 byte;
3339
3340                if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3341                        drm_dbg_kms(&dev_priv->drm,
3342                                    "No SDVO device found on %s\n",
3343                                    SDVO_NAME(intel_sdvo));
3344                        goto err;
3345                }
3346        }
3347
3348        intel_encoder->compute_config = intel_sdvo_compute_config;
3349        if (HAS_PCH_SPLIT(dev_priv)) {
3350                intel_encoder->disable = pch_disable_sdvo;
3351                intel_encoder->post_disable = pch_post_disable_sdvo;
3352        } else {
3353                intel_encoder->disable = intel_disable_sdvo;
3354        }
3355        intel_encoder->pre_enable = intel_sdvo_pre_enable;
3356        intel_encoder->enable = intel_enable_sdvo;
3357        intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3358        intel_encoder->get_config = intel_sdvo_get_config;
3359
3360        /* In default case sdvo lvds is false */
3361        if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3362                goto err;
3363
3364        intel_sdvo->colorimetry_cap =
3365                intel_sdvo_get_colorimetry_cap(intel_sdvo);
3366
3367        if (intel_sdvo_output_setup(intel_sdvo,
3368                                    intel_sdvo->caps.output_flags) != true) {
3369                drm_dbg_kms(&dev_priv->drm,
3370                            "SDVO output failed to setup on %s\n",
3371                            SDVO_NAME(intel_sdvo));
3372                /* Output_setup can leave behind connectors! */
3373                goto err_output;
3374        }
3375
3376        /*
3377         * Only enable the hotplug irq if we need it, to work around noisy
3378         * hotplug lines.
3379         */
3380        if (intel_sdvo->hotplug_active) {
3381                if (intel_sdvo->port == PORT_B)
3382                        intel_encoder->hpd_pin = HPD_SDVO_B;
3383                else
3384                        intel_encoder->hpd_pin = HPD_SDVO_C;
3385        }
3386
3387        /*
3388         * Cloning SDVO with anything is often impossible, since the SDVO
3389         * encoder can request a special input timing mode. And even if that's
3390         * not the case we have evidence that cloning a plain unscaled mode with
3391         * VGA doesn't really work. Furthermore the cloning flags are way too
3392         * simplistic anyway to express such constraints, so just give up on
3393         * cloning for SDVO encoders.
3394         */
3395        intel_sdvo->base.cloneable = 0;
3396
3397        intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo);
3398
3399        /* Set the input timing to the screen. Assume always input 0. */
3400        if (!intel_sdvo_set_target_input(intel_sdvo))
3401                goto err_output;
3402
3403        if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3404                                                    &intel_sdvo->pixel_clock_min,
3405                                                    &intel_sdvo->pixel_clock_max))
3406                goto err_output;
3407
3408        drm_dbg_kms(&dev_priv->drm, "%s device VID/DID: %02X:%02X.%02X, "
3409                        "clock range %dMHz - %dMHz, "
3410                        "input 1: %c, input 2: %c, "
3411                        "output 1: %c, output 2: %c\n",
3412                        SDVO_NAME(intel_sdvo),
3413                        intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3414                        intel_sdvo->caps.device_rev_id,
3415                        intel_sdvo->pixel_clock_min / 1000,
3416                        intel_sdvo->pixel_clock_max / 1000,
3417                        (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3418                        (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3419                        /* check currently supported outputs */
3420                        intel_sdvo->caps.output_flags &
3421                        (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3422                        intel_sdvo->caps.output_flags &
3423                        (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3424        return true;
3425
3426err_output:
3427        intel_sdvo_output_cleanup(intel_sdvo);
3428
3429err:
3430        drm_encoder_cleanup(&intel_encoder->base);
3431        i2c_del_adapter(&intel_sdvo->ddc);
3432err_i2c_bus:
3433        intel_sdvo_unselect_i2c_bus(intel_sdvo);
3434        kfree(intel_sdvo);
3435
3436        return false;
3437}
3438