linux/drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.c
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   1/*
   2 * Copyright 2018 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 */
  22#include "priv.h"
  23
  24#include <core/memory.h>
  25#include <subdev/mmu.h>
  26#include <engine/fifo.h>
  27
  28#include <nvif/class.h>
  29
  30static void
  31gv100_fault_buffer_process(struct nvkm_fault_buffer *buffer)
  32{
  33        struct nvkm_device *device = buffer->fault->subdev.device;
  34        struct nvkm_memory *mem = buffer->mem;
  35        u32 get = nvkm_rd32(device, buffer->get);
  36        u32 put = nvkm_rd32(device, buffer->put);
  37        if (put == get)
  38                return;
  39
  40        nvkm_kmap(mem);
  41        while (get != put) {
  42                const u32   base = get * buffer->fault->func->buffer.entry_size;
  43                const u32 instlo = nvkm_ro32(mem, base + 0x00);
  44                const u32 insthi = nvkm_ro32(mem, base + 0x04);
  45                const u32 addrlo = nvkm_ro32(mem, base + 0x08);
  46                const u32 addrhi = nvkm_ro32(mem, base + 0x0c);
  47                const u32 timelo = nvkm_ro32(mem, base + 0x10);
  48                const u32 timehi = nvkm_ro32(mem, base + 0x14);
  49                const u32  info0 = nvkm_ro32(mem, base + 0x18);
  50                const u32  info1 = nvkm_ro32(mem, base + 0x1c);
  51                struct nvkm_fault_data info;
  52
  53                if (++get == buffer->entries)
  54                        get = 0;
  55                nvkm_wr32(device, buffer->get, get);
  56
  57                info.addr   = ((u64)addrhi << 32) | addrlo;
  58                info.inst   = ((u64)insthi << 32) | instlo;
  59                info.time   = ((u64)timehi << 32) | timelo;
  60                info.engine = (info0 & 0x000000ff);
  61                info.valid  = (info1 & 0x80000000) >> 31;
  62                info.gpc    = (info1 & 0x1f000000) >> 24;
  63                info.hub    = (info1 & 0x00100000) >> 20;
  64                info.access = (info1 & 0x000f0000) >> 16;
  65                info.client = (info1 & 0x00007f00) >> 8;
  66                info.reason = (info1 & 0x0000001f);
  67
  68                nvkm_fifo_fault(device->fifo, &info);
  69        }
  70        nvkm_done(mem);
  71}
  72
  73static void
  74gv100_fault_buffer_intr(struct nvkm_fault_buffer *buffer, bool enable)
  75{
  76        struct nvkm_device *device = buffer->fault->subdev.device;
  77        const u32 intr = buffer->id ? 0x08000000 : 0x20000000;
  78        if (enable)
  79                nvkm_mask(device, 0x100a2c, intr, intr);
  80        else
  81                nvkm_mask(device, 0x100a34, intr, intr);
  82}
  83
  84static void
  85gv100_fault_buffer_fini(struct nvkm_fault_buffer *buffer)
  86{
  87        struct nvkm_device *device = buffer->fault->subdev.device;
  88        const u32 foff = buffer->id * 0x14;
  89        nvkm_mask(device, 0x100e34 + foff, 0x80000000, 0x00000000);
  90}
  91
  92static void
  93gv100_fault_buffer_init(struct nvkm_fault_buffer *buffer)
  94{
  95        struct nvkm_device *device = buffer->fault->subdev.device;
  96        const u32 foff = buffer->id * 0x14;
  97
  98        nvkm_mask(device, 0x100e34 + foff, 0xc0000000, 0x40000000);
  99        nvkm_wr32(device, 0x100e28 + foff, upper_32_bits(buffer->addr));
 100        nvkm_wr32(device, 0x100e24 + foff, lower_32_bits(buffer->addr));
 101        nvkm_mask(device, 0x100e34 + foff, 0x80000000, 0x80000000);
 102}
 103
 104static void
 105gv100_fault_buffer_info(struct nvkm_fault_buffer *buffer)
 106{
 107        struct nvkm_device *device = buffer->fault->subdev.device;
 108        const u32 foff = buffer->id * 0x14;
 109
 110        nvkm_mask(device, 0x100e34 + foff, 0x40000000, 0x40000000);
 111
 112        buffer->entries = nvkm_rd32(device, 0x100e34 + foff) & 0x000fffff;
 113        buffer->get = 0x100e2c + foff;
 114        buffer->put = 0x100e30 + foff;
 115}
 116
 117static int
 118gv100_fault_ntfy_nrpfb(struct nvkm_notify *notify)
 119{
 120        struct nvkm_fault *fault = container_of(notify, typeof(*fault), nrpfb);
 121        gv100_fault_buffer_process(fault->buffer[0]);
 122        return NVKM_NOTIFY_KEEP;
 123}
 124
 125static void
 126gv100_fault_intr_fault(struct nvkm_fault *fault)
 127{
 128        struct nvkm_subdev *subdev = &fault->subdev;
 129        struct nvkm_device *device = subdev->device;
 130        struct nvkm_fault_data info;
 131        const u32 addrlo = nvkm_rd32(device, 0x100e4c);
 132        const u32 addrhi = nvkm_rd32(device, 0x100e50);
 133        const u32  info0 = nvkm_rd32(device, 0x100e54);
 134        const u32 insthi = nvkm_rd32(device, 0x100e58);
 135        const u32  info1 = nvkm_rd32(device, 0x100e5c);
 136
 137        info.addr = ((u64)addrhi << 32) | addrlo;
 138        info.inst = ((u64)insthi << 32) | (info0 & 0xfffff000);
 139        info.time = 0;
 140        info.engine = (info0 & 0x000000ff);
 141        info.valid  = (info1 & 0x80000000) >> 31;
 142        info.gpc    = (info1 & 0x1f000000) >> 24;
 143        info.hub    = (info1 & 0x00100000) >> 20;
 144        info.access = (info1 & 0x000f0000) >> 16;
 145        info.client = (info1 & 0x00007f00) >> 8;
 146        info.reason = (info1 & 0x0000001f);
 147
 148        nvkm_fifo_fault(device->fifo, &info);
 149}
 150
 151static void
 152gv100_fault_intr(struct nvkm_fault *fault)
 153{
 154        struct nvkm_subdev *subdev = &fault->subdev;
 155        struct nvkm_device *device = subdev->device;
 156        u32 stat = nvkm_rd32(device, 0x100a20);
 157
 158        if (stat & 0x80000000) {
 159                gv100_fault_intr_fault(fault);
 160                nvkm_wr32(device, 0x100e60, 0x80000000);
 161                stat &= ~0x80000000;
 162        }
 163
 164        if (stat & 0x20000000) {
 165                if (fault->buffer[0]) {
 166                        nvkm_event_send(&fault->event, 1, 0, NULL, 0);
 167                        stat &= ~0x20000000;
 168                }
 169        }
 170
 171        if (stat & 0x08000000) {
 172                if (fault->buffer[1]) {
 173                        nvkm_event_send(&fault->event, 1, 1, NULL, 0);
 174                        stat &= ~0x08000000;
 175                }
 176        }
 177
 178        if (stat) {
 179                nvkm_debug(subdev, "intr %08x\n", stat);
 180        }
 181}
 182
 183static void
 184gv100_fault_fini(struct nvkm_fault *fault)
 185{
 186        nvkm_notify_put(&fault->nrpfb);
 187        if (fault->buffer[0])
 188                fault->func->buffer.fini(fault->buffer[0]);
 189        nvkm_mask(fault->subdev.device, 0x100a34, 0x80000000, 0x80000000);
 190}
 191
 192static void
 193gv100_fault_init(struct nvkm_fault *fault)
 194{
 195        nvkm_mask(fault->subdev.device, 0x100a2c, 0x80000000, 0x80000000);
 196        fault->func->buffer.init(fault->buffer[0]);
 197        nvkm_notify_get(&fault->nrpfb);
 198}
 199
 200int
 201gv100_fault_oneinit(struct nvkm_fault *fault)
 202{
 203        return nvkm_notify_init(&fault->buffer[0]->object, &fault->event,
 204                                gv100_fault_ntfy_nrpfb, true, NULL, 0, 0,
 205                                &fault->nrpfb);
 206}
 207
 208static const struct nvkm_fault_func
 209gv100_fault = {
 210        .oneinit = gv100_fault_oneinit,
 211        .init = gv100_fault_init,
 212        .fini = gv100_fault_fini,
 213        .intr = gv100_fault_intr,
 214        .buffer.nr = 2,
 215        .buffer.entry_size = 32,
 216        .buffer.info = gv100_fault_buffer_info,
 217        .buffer.pin = gp100_fault_buffer_pin,
 218        .buffer.init = gv100_fault_buffer_init,
 219        .buffer.fini = gv100_fault_buffer_fini,
 220        .buffer.intr = gv100_fault_buffer_intr,
 221        /*TODO: Figure out how to expose non-replayable fault buffer, which,
 222         *      for some reason, is where recoverable CE faults appear...
 223         *
 224         *      It's a bit tricky, as both NVKM and SVM will need access to
 225         *      the non-replayable fault buffer.
 226         */
 227        .user = { { 0, 0, VOLTA_FAULT_BUFFER_A }, 1 },
 228};
 229
 230int
 231gv100_fault_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
 232                struct nvkm_fault **pfault)
 233{
 234        return nvkm_fault_new_(&gv100_fault, device, type, inst, pfault);
 235}
 236