linux/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c
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   1/*
   2 * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
   3 *
   4 * This software is available to you under a choice of one of two
   5 * licenses.  You may choose to be licensed under the terms of the GNU
   6 * General Public License (GPL) Version 2, available from the file
   7 * COPYING in the main directory of this source tree, or the
   8 * OpenIB.org BSD license below:
   9 *
  10 *     Redistribution and use in source and binary forms, with or
  11 *     without modification, are permitted provided that the following
  12 *     conditions are met:
  13 *
  14 *      - Redistributions of source code must retain the above
  15 *        copyright notice, this list of conditions and the following
  16 *        disclaimer.
  17 *
  18 *      - Redistributions in binary form must reproduce the above
  19 *        copyright notice, this list of conditions and the following
  20 *        disclaimer in the documentation and/or other materials
  21 *        provided with the distribution.
  22 *
  23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30 * SOFTWARE.
  31 */
  32
  33#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  34
  35#include <linux/module.h>
  36#include <linux/moduleparam.h>
  37#include <linux/init.h>
  38#include <linux/pci.h>
  39#include <linux/dma-mapping.h>
  40#include <linux/netdevice.h>
  41#include <linux/etherdevice.h>
  42#include <linux/if_vlan.h>
  43#include <linux/mdio.h>
  44#include <linux/sockios.h>
  45#include <linux/workqueue.h>
  46#include <linux/proc_fs.h>
  47#include <linux/rtnetlink.h>
  48#include <linux/firmware.h>
  49#include <linux/log2.h>
  50#include <linux/stringify.h>
  51#include <linux/sched.h>
  52#include <linux/slab.h>
  53#include <linux/uaccess.h>
  54#include <linux/nospec.h>
  55
  56#include "common.h"
  57#include "cxgb3_ioctl.h"
  58#include "regs.h"
  59#include "cxgb3_offload.h"
  60#include "version.h"
  61
  62#include "cxgb3_ctl_defs.h"
  63#include "t3_cpl.h"
  64#include "firmware_exports.h"
  65
  66enum {
  67        MAX_TXQ_ENTRIES = 16384,
  68        MAX_CTRL_TXQ_ENTRIES = 1024,
  69        MAX_RSPQ_ENTRIES = 16384,
  70        MAX_RX_BUFFERS = 16384,
  71        MAX_RX_JUMBO_BUFFERS = 16384,
  72        MIN_TXQ_ENTRIES = 4,
  73        MIN_CTRL_TXQ_ENTRIES = 4,
  74        MIN_RSPQ_ENTRIES = 32,
  75        MIN_FL_ENTRIES = 32
  76};
  77
  78#define PORT_MASK ((1 << MAX_NPORTS) - 1)
  79
  80#define DFLT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK | \
  81                         NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP |\
  82                         NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR)
  83
  84#define EEPROM_MAGIC 0x38E2F10C
  85
  86#define CH_DEVICE(devid, idx) \
  87        { PCI_VENDOR_ID_CHELSIO, devid, PCI_ANY_ID, PCI_ANY_ID, 0, 0, idx }
  88
  89static const struct pci_device_id cxgb3_pci_tbl[] = {
  90        CH_DEVICE(0x20, 0),     /* PE9000 */
  91        CH_DEVICE(0x21, 1),     /* T302E */
  92        CH_DEVICE(0x22, 2),     /* T310E */
  93        CH_DEVICE(0x23, 3),     /* T320X */
  94        CH_DEVICE(0x24, 1),     /* T302X */
  95        CH_DEVICE(0x25, 3),     /* T320E */
  96        CH_DEVICE(0x26, 2),     /* T310X */
  97        CH_DEVICE(0x30, 2),     /* T3B10 */
  98        CH_DEVICE(0x31, 3),     /* T3B20 */
  99        CH_DEVICE(0x32, 1),     /* T3B02 */
 100        CH_DEVICE(0x35, 6),     /* T3C20-derived T3C10 */
 101        CH_DEVICE(0x36, 3),     /* S320E-CR */
 102        CH_DEVICE(0x37, 7),     /* N320E-G2 */
 103        {0,}
 104};
 105
 106MODULE_DESCRIPTION(DRV_DESC);
 107MODULE_AUTHOR("Chelsio Communications");
 108MODULE_LICENSE("Dual BSD/GPL");
 109MODULE_DEVICE_TABLE(pci, cxgb3_pci_tbl);
 110
 111static int dflt_msg_enable = DFLT_MSG_ENABLE;
 112
 113module_param(dflt_msg_enable, int, 0644);
 114MODULE_PARM_DESC(dflt_msg_enable, "Chelsio T3 default message enable bitmap");
 115
 116/*
 117 * The driver uses the best interrupt scheme available on a platform in the
 118 * order MSI-X, MSI, legacy pin interrupts.  This parameter determines which
 119 * of these schemes the driver may consider as follows:
 120 *
 121 * msi = 2: choose from among all three options
 122 * msi = 1: only consider MSI and pin interrupts
 123 * msi = 0: force pin interrupts
 124 */
 125static int msi = 2;
 126
 127module_param(msi, int, 0644);
 128MODULE_PARM_DESC(msi, "whether to use MSI or MSI-X");
 129
 130/*
 131 * The driver enables offload as a default.
 132 * To disable it, use ofld_disable = 1.
 133 */
 134
 135static int ofld_disable = 0;
 136
 137module_param(ofld_disable, int, 0644);
 138MODULE_PARM_DESC(ofld_disable, "whether to enable offload at init time or not");
 139
 140/*
 141 * We have work elements that we need to cancel when an interface is taken
 142 * down.  Normally the work elements would be executed by keventd but that
 143 * can deadlock because of linkwatch.  If our close method takes the rtnl
 144 * lock and linkwatch is ahead of our work elements in keventd, linkwatch
 145 * will block keventd as it needs the rtnl lock, and we'll deadlock waiting
 146 * for our work to complete.  Get our own work queue to solve this.
 147 */
 148struct workqueue_struct *cxgb3_wq;
 149
 150/**
 151 *      link_report - show link status and link speed/duplex
 152 *      @p: the port whose settings are to be reported
 153 *
 154 *      Shows the link status, speed, and duplex of a port.
 155 */
 156static void link_report(struct net_device *dev)
 157{
 158        if (!netif_carrier_ok(dev))
 159                netdev_info(dev, "link down\n");
 160        else {
 161                const char *s = "10Mbps";
 162                const struct port_info *p = netdev_priv(dev);
 163
 164                switch (p->link_config.speed) {
 165                case SPEED_10000:
 166                        s = "10Gbps";
 167                        break;
 168                case SPEED_1000:
 169                        s = "1000Mbps";
 170                        break;
 171                case SPEED_100:
 172                        s = "100Mbps";
 173                        break;
 174                }
 175
 176                netdev_info(dev, "link up, %s, %s-duplex\n",
 177                            s, p->link_config.duplex == DUPLEX_FULL
 178                            ? "full" : "half");
 179        }
 180}
 181
 182static void enable_tx_fifo_drain(struct adapter *adapter,
 183                                 struct port_info *pi)
 184{
 185        t3_set_reg_field(adapter, A_XGM_TXFIFO_CFG + pi->mac.offset, 0,
 186                         F_ENDROPPKT);
 187        t3_write_reg(adapter, A_XGM_RX_CTRL + pi->mac.offset, 0);
 188        t3_write_reg(adapter, A_XGM_TX_CTRL + pi->mac.offset, F_TXEN);
 189        t3_write_reg(adapter, A_XGM_RX_CTRL + pi->mac.offset, F_RXEN);
 190}
 191
 192static void disable_tx_fifo_drain(struct adapter *adapter,
 193                                  struct port_info *pi)
 194{
 195        t3_set_reg_field(adapter, A_XGM_TXFIFO_CFG + pi->mac.offset,
 196                         F_ENDROPPKT, 0);
 197}
 198
 199void t3_os_link_fault(struct adapter *adap, int port_id, int state)
 200{
 201        struct net_device *dev = adap->port[port_id];
 202        struct port_info *pi = netdev_priv(dev);
 203
 204        if (state == netif_carrier_ok(dev))
 205                return;
 206
 207        if (state) {
 208                struct cmac *mac = &pi->mac;
 209
 210                netif_carrier_on(dev);
 211
 212                disable_tx_fifo_drain(adap, pi);
 213
 214                /* Clear local faults */
 215                t3_xgm_intr_disable(adap, pi->port_id);
 216                t3_read_reg(adap, A_XGM_INT_STATUS +
 217                                    pi->mac.offset);
 218                t3_write_reg(adap,
 219                             A_XGM_INT_CAUSE + pi->mac.offset,
 220                             F_XGM_INT);
 221
 222                t3_set_reg_field(adap,
 223                                 A_XGM_INT_ENABLE +
 224                                 pi->mac.offset,
 225                                 F_XGM_INT, F_XGM_INT);
 226                t3_xgm_intr_enable(adap, pi->port_id);
 227
 228                t3_mac_enable(mac, MAC_DIRECTION_TX);
 229        } else {
 230                netif_carrier_off(dev);
 231
 232                /* Flush TX FIFO */
 233                enable_tx_fifo_drain(adap, pi);
 234        }
 235        link_report(dev);
 236}
 237
 238/**
 239 *      t3_os_link_changed - handle link status changes
 240 *      @adapter: the adapter associated with the link change
 241 *      @port_id: the port index whose limk status has changed
 242 *      @link_stat: the new status of the link
 243 *      @speed: the new speed setting
 244 *      @duplex: the new duplex setting
 245 *      @pause: the new flow-control setting
 246 *
 247 *      This is the OS-dependent handler for link status changes.  The OS
 248 *      neutral handler takes care of most of the processing for these events,
 249 *      then calls this handler for any OS-specific processing.
 250 */
 251void t3_os_link_changed(struct adapter *adapter, int port_id, int link_stat,
 252                        int speed, int duplex, int pause)
 253{
 254        struct net_device *dev = adapter->port[port_id];
 255        struct port_info *pi = netdev_priv(dev);
 256        struct cmac *mac = &pi->mac;
 257
 258        /* Skip changes from disabled ports. */
 259        if (!netif_running(dev))
 260                return;
 261
 262        if (link_stat != netif_carrier_ok(dev)) {
 263                if (link_stat) {
 264                        disable_tx_fifo_drain(adapter, pi);
 265
 266                        t3_mac_enable(mac, MAC_DIRECTION_RX);
 267
 268                        /* Clear local faults */
 269                        t3_xgm_intr_disable(adapter, pi->port_id);
 270                        t3_read_reg(adapter, A_XGM_INT_STATUS +
 271                                    pi->mac.offset);
 272                        t3_write_reg(adapter,
 273                                     A_XGM_INT_CAUSE + pi->mac.offset,
 274                                     F_XGM_INT);
 275
 276                        t3_set_reg_field(adapter,
 277                                         A_XGM_INT_ENABLE + pi->mac.offset,
 278                                         F_XGM_INT, F_XGM_INT);
 279                        t3_xgm_intr_enable(adapter, pi->port_id);
 280
 281                        netif_carrier_on(dev);
 282                } else {
 283                        netif_carrier_off(dev);
 284
 285                        t3_xgm_intr_disable(adapter, pi->port_id);
 286                        t3_read_reg(adapter, A_XGM_INT_STATUS + pi->mac.offset);
 287                        t3_set_reg_field(adapter,
 288                                         A_XGM_INT_ENABLE + pi->mac.offset,
 289                                         F_XGM_INT, 0);
 290
 291                        if (is_10G(adapter))
 292                                pi->phy.ops->power_down(&pi->phy, 1);
 293
 294                        t3_read_reg(adapter, A_XGM_INT_STATUS + pi->mac.offset);
 295                        t3_mac_disable(mac, MAC_DIRECTION_RX);
 296                        t3_link_start(&pi->phy, mac, &pi->link_config);
 297
 298                        /* Flush TX FIFO */
 299                        enable_tx_fifo_drain(adapter, pi);
 300                }
 301
 302                link_report(dev);
 303        }
 304}
 305
 306/**
 307 *      t3_os_phymod_changed - handle PHY module changes
 308 *      @phy: the PHY reporting the module change
 309 *      @mod_type: new module type
 310 *
 311 *      This is the OS-dependent handler for PHY module changes.  It is
 312 *      invoked when a PHY module is removed or inserted for any OS-specific
 313 *      processing.
 314 */
 315void t3_os_phymod_changed(struct adapter *adap, int port_id)
 316{
 317        static const char *mod_str[] = {
 318                NULL, "SR", "LR", "LRM", "TWINAX", "TWINAX", "unknown"
 319        };
 320
 321        const struct net_device *dev = adap->port[port_id];
 322        const struct port_info *pi = netdev_priv(dev);
 323
 324        if (pi->phy.modtype == phy_modtype_none)
 325                netdev_info(dev, "PHY module unplugged\n");
 326        else
 327                netdev_info(dev, "%s PHY module inserted\n",
 328                            mod_str[pi->phy.modtype]);
 329}
 330
 331static void cxgb_set_rxmode(struct net_device *dev)
 332{
 333        struct port_info *pi = netdev_priv(dev);
 334
 335        t3_mac_set_rx_mode(&pi->mac, dev);
 336}
 337
 338/**
 339 *      link_start - enable a port
 340 *      @dev: the device to enable
 341 *
 342 *      Performs the MAC and PHY actions needed to enable a port.
 343 */
 344static void link_start(struct net_device *dev)
 345{
 346        struct port_info *pi = netdev_priv(dev);
 347        struct cmac *mac = &pi->mac;
 348
 349        t3_mac_reset(mac);
 350        t3_mac_set_num_ucast(mac, MAX_MAC_IDX);
 351        t3_mac_set_mtu(mac, dev->mtu);
 352        t3_mac_set_address(mac, LAN_MAC_IDX, dev->dev_addr);
 353        t3_mac_set_address(mac, SAN_MAC_IDX, pi->iscsic.mac_addr);
 354        t3_mac_set_rx_mode(mac, dev);
 355        t3_link_start(&pi->phy, mac, &pi->link_config);
 356        t3_mac_enable(mac, MAC_DIRECTION_RX | MAC_DIRECTION_TX);
 357}
 358
 359static inline void cxgb_disable_msi(struct adapter *adapter)
 360{
 361        if (adapter->flags & USING_MSIX) {
 362                pci_disable_msix(adapter->pdev);
 363                adapter->flags &= ~USING_MSIX;
 364        } else if (adapter->flags & USING_MSI) {
 365                pci_disable_msi(adapter->pdev);
 366                adapter->flags &= ~USING_MSI;
 367        }
 368}
 369
 370/*
 371 * Interrupt handler for asynchronous events used with MSI-X.
 372 */
 373static irqreturn_t t3_async_intr_handler(int irq, void *cookie)
 374{
 375        t3_slow_intr_handler(cookie);
 376        return IRQ_HANDLED;
 377}
 378
 379/*
 380 * Name the MSI-X interrupts.
 381 */
 382static void name_msix_vecs(struct adapter *adap)
 383{
 384        int i, j, msi_idx = 1, n = sizeof(adap->msix_info[0].desc) - 1;
 385
 386        snprintf(adap->msix_info[0].desc, n, "%s", adap->name);
 387        adap->msix_info[0].desc[n] = 0;
 388
 389        for_each_port(adap, j) {
 390                struct net_device *d = adap->port[j];
 391                const struct port_info *pi = netdev_priv(d);
 392
 393                for (i = 0; i < pi->nqsets; i++, msi_idx++) {
 394                        snprintf(adap->msix_info[msi_idx].desc, n,
 395                                 "%s-%d", d->name, pi->first_qset + i);
 396                        adap->msix_info[msi_idx].desc[n] = 0;
 397                }
 398        }
 399}
 400
 401static int request_msix_data_irqs(struct adapter *adap)
 402{
 403        int i, j, err, qidx = 0;
 404
 405        for_each_port(adap, i) {
 406                int nqsets = adap2pinfo(adap, i)->nqsets;
 407
 408                for (j = 0; j < nqsets; ++j) {
 409                        err = request_irq(adap->msix_info[qidx + 1].vec,
 410                                          t3_intr_handler(adap,
 411                                                          adap->sge.qs[qidx].
 412                                                          rspq.polling), 0,
 413                                          adap->msix_info[qidx + 1].desc,
 414                                          &adap->sge.qs[qidx]);
 415                        if (err) {
 416                                while (--qidx >= 0)
 417                                        free_irq(adap->msix_info[qidx + 1].vec,
 418                                                 &adap->sge.qs[qidx]);
 419                                return err;
 420                        }
 421                        qidx++;
 422                }
 423        }
 424        return 0;
 425}
 426
 427static void free_irq_resources(struct adapter *adapter)
 428{
 429        if (adapter->flags & USING_MSIX) {
 430                int i, n = 0;
 431
 432                free_irq(adapter->msix_info[0].vec, adapter);
 433                for_each_port(adapter, i)
 434                        n += adap2pinfo(adapter, i)->nqsets;
 435
 436                for (i = 0; i < n; ++i)
 437                        free_irq(adapter->msix_info[i + 1].vec,
 438                                 &adapter->sge.qs[i]);
 439        } else
 440                free_irq(adapter->pdev->irq, adapter);
 441}
 442
 443static int await_mgmt_replies(struct adapter *adap, unsigned long init_cnt,
 444                              unsigned long n)
 445{
 446        int attempts = 10;
 447
 448        while (adap->sge.qs[0].rspq.offload_pkts < init_cnt + n) {
 449                if (!--attempts)
 450                        return -ETIMEDOUT;
 451                msleep(10);
 452        }
 453        return 0;
 454}
 455
 456static int init_tp_parity(struct adapter *adap)
 457{
 458        int i;
 459        struct sk_buff *skb;
 460        struct cpl_set_tcb_field *greq;
 461        unsigned long cnt = adap->sge.qs[0].rspq.offload_pkts;
 462
 463        t3_tp_set_offload_mode(adap, 1);
 464
 465        for (i = 0; i < 16; i++) {
 466                struct cpl_smt_write_req *req;
 467
 468                skb = alloc_skb(sizeof(*req), GFP_KERNEL);
 469                if (!skb)
 470                        skb = adap->nofail_skb;
 471                if (!skb)
 472                        goto alloc_skb_fail;
 473
 474                req = __skb_put_zero(skb, sizeof(*req));
 475                req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
 476                OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SMT_WRITE_REQ, i));
 477                req->mtu_idx = NMTUS - 1;
 478                req->iff = i;
 479                t3_mgmt_tx(adap, skb);
 480                if (skb == adap->nofail_skb) {
 481                        await_mgmt_replies(adap, cnt, i + 1);
 482                        adap->nofail_skb = alloc_skb(sizeof(*greq), GFP_KERNEL);
 483                        if (!adap->nofail_skb)
 484                                goto alloc_skb_fail;
 485                }
 486        }
 487
 488        for (i = 0; i < 2048; i++) {
 489                struct cpl_l2t_write_req *req;
 490
 491                skb = alloc_skb(sizeof(*req), GFP_KERNEL);
 492                if (!skb)
 493                        skb = adap->nofail_skb;
 494                if (!skb)
 495                        goto alloc_skb_fail;
 496
 497                req = __skb_put_zero(skb, sizeof(*req));
 498                req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
 499                OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_L2T_WRITE_REQ, i));
 500                req->params = htonl(V_L2T_W_IDX(i));
 501                t3_mgmt_tx(adap, skb);
 502                if (skb == adap->nofail_skb) {
 503                        await_mgmt_replies(adap, cnt, 16 + i + 1);
 504                        adap->nofail_skb = alloc_skb(sizeof(*greq), GFP_KERNEL);
 505                        if (!adap->nofail_skb)
 506                                goto alloc_skb_fail;
 507                }
 508        }
 509
 510        for (i = 0; i < 2048; i++) {
 511                struct cpl_rte_write_req *req;
 512
 513                skb = alloc_skb(sizeof(*req), GFP_KERNEL);
 514                if (!skb)
 515                        skb = adap->nofail_skb;
 516                if (!skb)
 517                        goto alloc_skb_fail;
 518
 519                req = __skb_put_zero(skb, sizeof(*req));
 520                req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
 521                OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_RTE_WRITE_REQ, i));
 522                req->l2t_idx = htonl(V_L2T_W_IDX(i));
 523                t3_mgmt_tx(adap, skb);
 524                if (skb == adap->nofail_skb) {
 525                        await_mgmt_replies(adap, cnt, 16 + 2048 + i + 1);
 526                        adap->nofail_skb = alloc_skb(sizeof(*greq), GFP_KERNEL);
 527                        if (!adap->nofail_skb)
 528                                goto alloc_skb_fail;
 529                }
 530        }
 531
 532        skb = alloc_skb(sizeof(*greq), GFP_KERNEL);
 533        if (!skb)
 534                skb = adap->nofail_skb;
 535        if (!skb)
 536                goto alloc_skb_fail;
 537
 538        greq = __skb_put_zero(skb, sizeof(*greq));
 539        greq->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
 540        OPCODE_TID(greq) = htonl(MK_OPCODE_TID(CPL_SET_TCB_FIELD, 0));
 541        greq->mask = cpu_to_be64(1);
 542        t3_mgmt_tx(adap, skb);
 543
 544        i = await_mgmt_replies(adap, cnt, 16 + 2048 + 2048 + 1);
 545        if (skb == adap->nofail_skb) {
 546                i = await_mgmt_replies(adap, cnt, 16 + 2048 + 2048 + 1);
 547                adap->nofail_skb = alloc_skb(sizeof(*greq), GFP_KERNEL);
 548        }
 549
 550        t3_tp_set_offload_mode(adap, 0);
 551        return i;
 552
 553alloc_skb_fail:
 554        t3_tp_set_offload_mode(adap, 0);
 555        return -ENOMEM;
 556}
 557
 558/**
 559 *      setup_rss - configure RSS
 560 *      @adap: the adapter
 561 *
 562 *      Sets up RSS to distribute packets to multiple receive queues.  We
 563 *      configure the RSS CPU lookup table to distribute to the number of HW
 564 *      receive queues, and the response queue lookup table to narrow that
 565 *      down to the response queues actually configured for each port.
 566 *      We always configure the RSS mapping for two ports since the mapping
 567 *      table has plenty of entries.
 568 */
 569static void setup_rss(struct adapter *adap)
 570{
 571        int i;
 572        unsigned int nq0 = adap2pinfo(adap, 0)->nqsets;
 573        unsigned int nq1 = adap->port[1] ? adap2pinfo(adap, 1)->nqsets : 1;
 574        u8 cpus[SGE_QSETS + 1];
 575        u16 rspq_map[RSS_TABLE_SIZE + 1];
 576
 577        for (i = 0; i < SGE_QSETS; ++i)
 578                cpus[i] = i;
 579        cpus[SGE_QSETS] = 0xff; /* terminator */
 580
 581        for (i = 0; i < RSS_TABLE_SIZE / 2; ++i) {
 582                rspq_map[i] = i % nq0;
 583                rspq_map[i + RSS_TABLE_SIZE / 2] = (i % nq1) + nq0;
 584        }
 585        rspq_map[RSS_TABLE_SIZE] = 0xffff; /* terminator */
 586
 587        t3_config_rss(adap, F_RQFEEDBACKENABLE | F_TNLLKPEN | F_TNLMAPEN |
 588                      F_TNLPRTEN | F_TNL2TUPEN | F_TNL4TUPEN |
 589                      V_RRCPLCPUSIZE(6) | F_HASHTOEPLITZ, cpus, rspq_map);
 590}
 591
 592static void ring_dbs(struct adapter *adap)
 593{
 594        int i, j;
 595
 596        for (i = 0; i < SGE_QSETS; i++) {
 597                struct sge_qset *qs = &adap->sge.qs[i];
 598
 599                if (qs->adap)
 600                        for (j = 0; j < SGE_TXQ_PER_SET; j++)
 601                                t3_write_reg(adap, A_SG_KDOORBELL, F_SELEGRCNTX | V_EGRCNTX(qs->txq[j].cntxt_id));
 602        }
 603}
 604
 605static void init_napi(struct adapter *adap)
 606{
 607        int i;
 608
 609        for (i = 0; i < SGE_QSETS; i++) {
 610                struct sge_qset *qs = &adap->sge.qs[i];
 611
 612                if (qs->adap)
 613                        netif_napi_add(qs->netdev, &qs->napi, qs->napi.poll,
 614                                       64);
 615        }
 616
 617        /*
 618         * netif_napi_add() can be called only once per napi_struct because it
 619         * adds each new napi_struct to a list.  Be careful not to call it a
 620         * second time, e.g., during EEH recovery, by making a note of it.
 621         */
 622        adap->flags |= NAPI_INIT;
 623}
 624
 625/*
 626 * Wait until all NAPI handlers are descheduled.  This includes the handlers of
 627 * both netdevices representing interfaces and the dummy ones for the extra
 628 * queues.
 629 */
 630static void quiesce_rx(struct adapter *adap)
 631{
 632        int i;
 633
 634        for (i = 0; i < SGE_QSETS; i++)
 635                if (adap->sge.qs[i].adap)
 636                        napi_disable(&adap->sge.qs[i].napi);
 637}
 638
 639static void enable_all_napi(struct adapter *adap)
 640{
 641        int i;
 642        for (i = 0; i < SGE_QSETS; i++)
 643                if (adap->sge.qs[i].adap)
 644                        napi_enable(&adap->sge.qs[i].napi);
 645}
 646
 647/**
 648 *      setup_sge_qsets - configure SGE Tx/Rx/response queues
 649 *      @adap: the adapter
 650 *
 651 *      Determines how many sets of SGE queues to use and initializes them.
 652 *      We support multiple queue sets per port if we have MSI-X, otherwise
 653 *      just one queue set per port.
 654 */
 655static int setup_sge_qsets(struct adapter *adap)
 656{
 657        int i, j, err, irq_idx = 0, qset_idx = 0;
 658        unsigned int ntxq = SGE_TXQ_PER_SET;
 659
 660        if (adap->params.rev > 0 && !(adap->flags & USING_MSI))
 661                irq_idx = -1;
 662
 663        for_each_port(adap, i) {
 664                struct net_device *dev = adap->port[i];
 665                struct port_info *pi = netdev_priv(dev);
 666
 667                pi->qs = &adap->sge.qs[pi->first_qset];
 668                for (j = 0; j < pi->nqsets; ++j, ++qset_idx) {
 669                        err = t3_sge_alloc_qset(adap, qset_idx, 1,
 670                                (adap->flags & USING_MSIX) ? qset_idx + 1 :
 671                                                             irq_idx,
 672                                &adap->params.sge.qset[qset_idx], ntxq, dev,
 673                                netdev_get_tx_queue(dev, j));
 674                        if (err) {
 675                                t3_free_sge_resources(adap);
 676                                return err;
 677                        }
 678                }
 679        }
 680
 681        return 0;
 682}
 683
 684static ssize_t attr_show(struct device *d, char *buf,
 685                         ssize_t(*format) (struct net_device *, char *))
 686{
 687        ssize_t len;
 688
 689        /* Synchronize with ioctls that may shut down the device */
 690        rtnl_lock();
 691        len = (*format) (to_net_dev(d), buf);
 692        rtnl_unlock();
 693        return len;
 694}
 695
 696static ssize_t attr_store(struct device *d,
 697                          const char *buf, size_t len,
 698                          ssize_t(*set) (struct net_device *, unsigned int),
 699                          unsigned int min_val, unsigned int max_val)
 700{
 701        ssize_t ret;
 702        unsigned int val;
 703
 704        if (!capable(CAP_NET_ADMIN))
 705                return -EPERM;
 706
 707        ret = kstrtouint(buf, 0, &val);
 708        if (ret)
 709                return ret;
 710        if (val < min_val || val > max_val)
 711                return -EINVAL;
 712
 713        rtnl_lock();
 714        ret = (*set) (to_net_dev(d), val);
 715        if (!ret)
 716                ret = len;
 717        rtnl_unlock();
 718        return ret;
 719}
 720
 721#define CXGB3_SHOW(name, val_expr) \
 722static ssize_t format_##name(struct net_device *dev, char *buf) \
 723{ \
 724        struct port_info *pi = netdev_priv(dev); \
 725        struct adapter *adap = pi->adapter; \
 726        return sprintf(buf, "%u\n", val_expr); \
 727} \
 728static ssize_t show_##name(struct device *d, struct device_attribute *attr, \
 729                           char *buf) \
 730{ \
 731        return attr_show(d, buf, format_##name); \
 732}
 733
 734static ssize_t set_nfilters(struct net_device *dev, unsigned int val)
 735{
 736        struct port_info *pi = netdev_priv(dev);
 737        struct adapter *adap = pi->adapter;
 738        int min_tids = is_offload(adap) ? MC5_MIN_TIDS : 0;
 739
 740        if (adap->flags & FULL_INIT_DONE)
 741                return -EBUSY;
 742        if (val && adap->params.rev == 0)
 743                return -EINVAL;
 744        if (val > t3_mc5_size(&adap->mc5) - adap->params.mc5.nservers -
 745            min_tids)
 746                return -EINVAL;
 747        adap->params.mc5.nfilters = val;
 748        return 0;
 749}
 750
 751static ssize_t store_nfilters(struct device *d, struct device_attribute *attr,
 752                              const char *buf, size_t len)
 753{
 754        return attr_store(d, buf, len, set_nfilters, 0, ~0);
 755}
 756
 757static ssize_t set_nservers(struct net_device *dev, unsigned int val)
 758{
 759        struct port_info *pi = netdev_priv(dev);
 760        struct adapter *adap = pi->adapter;
 761
 762        if (adap->flags & FULL_INIT_DONE)
 763                return -EBUSY;
 764        if (val > t3_mc5_size(&adap->mc5) - adap->params.mc5.nfilters -
 765            MC5_MIN_TIDS)
 766                return -EINVAL;
 767        adap->params.mc5.nservers = val;
 768        return 0;
 769}
 770
 771static ssize_t store_nservers(struct device *d, struct device_attribute *attr,
 772                              const char *buf, size_t len)
 773{
 774        return attr_store(d, buf, len, set_nservers, 0, ~0);
 775}
 776
 777#define CXGB3_ATTR_R(name, val_expr) \
 778CXGB3_SHOW(name, val_expr) \
 779static DEVICE_ATTR(name, 0444, show_##name, NULL)
 780
 781#define CXGB3_ATTR_RW(name, val_expr, store_method) \
 782CXGB3_SHOW(name, val_expr) \
 783static DEVICE_ATTR(name, 0644, show_##name, store_method)
 784
 785CXGB3_ATTR_R(cam_size, t3_mc5_size(&adap->mc5));
 786CXGB3_ATTR_RW(nfilters, adap->params.mc5.nfilters, store_nfilters);
 787CXGB3_ATTR_RW(nservers, adap->params.mc5.nservers, store_nservers);
 788
 789static struct attribute *cxgb3_attrs[] = {
 790        &dev_attr_cam_size.attr,
 791        &dev_attr_nfilters.attr,
 792        &dev_attr_nservers.attr,
 793        NULL
 794};
 795
 796static const struct attribute_group cxgb3_attr_group = {
 797        .attrs = cxgb3_attrs,
 798};
 799
 800static ssize_t tm_attr_show(struct device *d,
 801                            char *buf, int sched)
 802{
 803        struct port_info *pi = netdev_priv(to_net_dev(d));
 804        struct adapter *adap = pi->adapter;
 805        unsigned int v, addr, bpt, cpt;
 806        ssize_t len;
 807
 808        addr = A_TP_TX_MOD_Q1_Q0_RATE_LIMIT - sched / 2;
 809        rtnl_lock();
 810        t3_write_reg(adap, A_TP_TM_PIO_ADDR, addr);
 811        v = t3_read_reg(adap, A_TP_TM_PIO_DATA);
 812        if (sched & 1)
 813                v >>= 16;
 814        bpt = (v >> 8) & 0xff;
 815        cpt = v & 0xff;
 816        if (!cpt)
 817                len = sprintf(buf, "disabled\n");
 818        else {
 819                v = (adap->params.vpd.cclk * 1000) / cpt;
 820                len = sprintf(buf, "%u Kbps\n", (v * bpt) / 125);
 821        }
 822        rtnl_unlock();
 823        return len;
 824}
 825
 826static ssize_t tm_attr_store(struct device *d,
 827                             const char *buf, size_t len, int sched)
 828{
 829        struct port_info *pi = netdev_priv(to_net_dev(d));
 830        struct adapter *adap = pi->adapter;
 831        unsigned int val;
 832        ssize_t ret;
 833
 834        if (!capable(CAP_NET_ADMIN))
 835                return -EPERM;
 836
 837        ret = kstrtouint(buf, 0, &val);
 838        if (ret)
 839                return ret;
 840        if (val > 10000000)
 841                return -EINVAL;
 842
 843        rtnl_lock();
 844        ret = t3_config_sched(adap, val, sched);
 845        if (!ret)
 846                ret = len;
 847        rtnl_unlock();
 848        return ret;
 849}
 850
 851#define TM_ATTR(name, sched) \
 852static ssize_t show_##name(struct device *d, struct device_attribute *attr, \
 853                           char *buf) \
 854{ \
 855        return tm_attr_show(d, buf, sched); \
 856} \
 857static ssize_t store_##name(struct device *d, struct device_attribute *attr, \
 858                            const char *buf, size_t len) \
 859{ \
 860        return tm_attr_store(d, buf, len, sched); \
 861} \
 862static DEVICE_ATTR(name, 0644, show_##name, store_##name)
 863
 864TM_ATTR(sched0, 0);
 865TM_ATTR(sched1, 1);
 866TM_ATTR(sched2, 2);
 867TM_ATTR(sched3, 3);
 868TM_ATTR(sched4, 4);
 869TM_ATTR(sched5, 5);
 870TM_ATTR(sched6, 6);
 871TM_ATTR(sched7, 7);
 872
 873static struct attribute *offload_attrs[] = {
 874        &dev_attr_sched0.attr,
 875        &dev_attr_sched1.attr,
 876        &dev_attr_sched2.attr,
 877        &dev_attr_sched3.attr,
 878        &dev_attr_sched4.attr,
 879        &dev_attr_sched5.attr,
 880        &dev_attr_sched6.attr,
 881        &dev_attr_sched7.attr,
 882        NULL
 883};
 884
 885static const struct attribute_group offload_attr_group = {
 886        .attrs = offload_attrs,
 887};
 888
 889/*
 890 * Sends an sk_buff to an offload queue driver
 891 * after dealing with any active network taps.
 892 */
 893static inline int offload_tx(struct t3cdev *tdev, struct sk_buff *skb)
 894{
 895        int ret;
 896
 897        local_bh_disable();
 898        ret = t3_offload_tx(tdev, skb);
 899        local_bh_enable();
 900        return ret;
 901}
 902
 903static int write_smt_entry(struct adapter *adapter, int idx)
 904{
 905        struct cpl_smt_write_req *req;
 906        struct port_info *pi = netdev_priv(adapter->port[idx]);
 907        struct sk_buff *skb = alloc_skb(sizeof(*req), GFP_KERNEL);
 908
 909        if (!skb)
 910                return -ENOMEM;
 911
 912        req = __skb_put(skb, sizeof(*req));
 913        req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
 914        OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SMT_WRITE_REQ, idx));
 915        req->mtu_idx = NMTUS - 1;       /* should be 0 but there's a T3 bug */
 916        req->iff = idx;
 917        memcpy(req->src_mac0, adapter->port[idx]->dev_addr, ETH_ALEN);
 918        memcpy(req->src_mac1, pi->iscsic.mac_addr, ETH_ALEN);
 919        skb->priority = 1;
 920        offload_tx(&adapter->tdev, skb);
 921        return 0;
 922}
 923
 924static int init_smt(struct adapter *adapter)
 925{
 926        int i;
 927
 928        for_each_port(adapter, i)
 929            write_smt_entry(adapter, i);
 930        return 0;
 931}
 932
 933static void init_port_mtus(struct adapter *adapter)
 934{
 935        unsigned int mtus = adapter->port[0]->mtu;
 936
 937        if (adapter->port[1])
 938                mtus |= adapter->port[1]->mtu << 16;
 939        t3_write_reg(adapter, A_TP_MTU_PORT_TABLE, mtus);
 940}
 941
 942static int send_pktsched_cmd(struct adapter *adap, int sched, int qidx, int lo,
 943                              int hi, int port)
 944{
 945        struct sk_buff *skb;
 946        struct mngt_pktsched_wr *req;
 947        int ret;
 948
 949        skb = alloc_skb(sizeof(*req), GFP_KERNEL);
 950        if (!skb)
 951                skb = adap->nofail_skb;
 952        if (!skb)
 953                return -ENOMEM;
 954
 955        req = skb_put(skb, sizeof(*req));
 956        req->wr_hi = htonl(V_WR_OP(FW_WROPCODE_MNGT));
 957        req->mngt_opcode = FW_MNGTOPCODE_PKTSCHED_SET;
 958        req->sched = sched;
 959        req->idx = qidx;
 960        req->min = lo;
 961        req->max = hi;
 962        req->binding = port;
 963        ret = t3_mgmt_tx(adap, skb);
 964        if (skb == adap->nofail_skb) {
 965                adap->nofail_skb = alloc_skb(sizeof(struct cpl_set_tcb_field),
 966                                             GFP_KERNEL);
 967                if (!adap->nofail_skb)
 968                        ret = -ENOMEM;
 969        }
 970
 971        return ret;
 972}
 973
 974static int bind_qsets(struct adapter *adap)
 975{
 976        int i, j, err = 0;
 977
 978        for_each_port(adap, i) {
 979                const struct port_info *pi = adap2pinfo(adap, i);
 980
 981                for (j = 0; j < pi->nqsets; ++j) {
 982                        int ret = send_pktsched_cmd(adap, 1,
 983                                                    pi->first_qset + j, -1,
 984                                                    -1, i);
 985                        if (ret)
 986                                err = ret;
 987                }
 988        }
 989
 990        return err;
 991}
 992
 993#define FW_VERSION __stringify(FW_VERSION_MAJOR) "."                    \
 994        __stringify(FW_VERSION_MINOR) "." __stringify(FW_VERSION_MICRO)
 995#define FW_FNAME "cxgb3/t3fw-" FW_VERSION ".bin"
 996#define TPSRAM_VERSION __stringify(TP_VERSION_MAJOR) "."                \
 997        __stringify(TP_VERSION_MINOR) "." __stringify(TP_VERSION_MICRO)
 998#define TPSRAM_NAME "cxgb3/t3%c_psram-" TPSRAM_VERSION ".bin"
 999#define AEL2005_OPT_EDC_NAME "cxgb3/ael2005_opt_edc.bin"
1000#define AEL2005_TWX_EDC_NAME "cxgb3/ael2005_twx_edc.bin"
1001#define AEL2020_TWX_EDC_NAME "cxgb3/ael2020_twx_edc.bin"
1002MODULE_FIRMWARE(FW_FNAME);
1003MODULE_FIRMWARE("cxgb3/t3b_psram-" TPSRAM_VERSION ".bin");
1004MODULE_FIRMWARE("cxgb3/t3c_psram-" TPSRAM_VERSION ".bin");
1005MODULE_FIRMWARE(AEL2005_OPT_EDC_NAME);
1006MODULE_FIRMWARE(AEL2005_TWX_EDC_NAME);
1007MODULE_FIRMWARE(AEL2020_TWX_EDC_NAME);
1008
1009static inline const char *get_edc_fw_name(int edc_idx)
1010{
1011        const char *fw_name = NULL;
1012
1013        switch (edc_idx) {
1014        case EDC_OPT_AEL2005:
1015                fw_name = AEL2005_OPT_EDC_NAME;
1016                break;
1017        case EDC_TWX_AEL2005:
1018                fw_name = AEL2005_TWX_EDC_NAME;
1019                break;
1020        case EDC_TWX_AEL2020:
1021                fw_name = AEL2020_TWX_EDC_NAME;
1022                break;
1023        }
1024        return fw_name;
1025}
1026
1027int t3_get_edc_fw(struct cphy *phy, int edc_idx, int size)
1028{
1029        struct adapter *adapter = phy->adapter;
1030        const struct firmware *fw;
1031        const char *fw_name;
1032        u32 csum;
1033        const __be32 *p;
1034        u16 *cache = phy->phy_cache;
1035        int i, ret = -EINVAL;
1036
1037        fw_name = get_edc_fw_name(edc_idx);
1038        if (fw_name)
1039                ret = request_firmware(&fw, fw_name, &adapter->pdev->dev);
1040        if (ret < 0) {
1041                dev_err(&adapter->pdev->dev,
1042                        "could not upgrade firmware: unable to load %s\n",
1043                        fw_name);
1044                return ret;
1045        }
1046
1047        /* check size, take checksum in account */
1048        if (fw->size > size + 4) {
1049                CH_ERR(adapter, "firmware image too large %u, expected %d\n",
1050                       (unsigned int)fw->size, size + 4);
1051                ret = -EINVAL;
1052        }
1053
1054        /* compute checksum */
1055        p = (const __be32 *)fw->data;
1056        for (csum = 0, i = 0; i < fw->size / sizeof(csum); i++)
1057                csum += ntohl(p[i]);
1058
1059        if (csum != 0xffffffff) {
1060                CH_ERR(adapter, "corrupted firmware image, checksum %u\n",
1061                       csum);
1062                ret = -EINVAL;
1063        }
1064
1065        for (i = 0; i < size / 4 ; i++) {
1066                *cache++ = (be32_to_cpu(p[i]) & 0xffff0000) >> 16;
1067                *cache++ = be32_to_cpu(p[i]) & 0xffff;
1068        }
1069
1070        release_firmware(fw);
1071
1072        return ret;
1073}
1074
1075static int upgrade_fw(struct adapter *adap)
1076{
1077        int ret;
1078        const struct firmware *fw;
1079        struct device *dev = &adap->pdev->dev;
1080
1081        ret = request_firmware(&fw, FW_FNAME, dev);
1082        if (ret < 0) {
1083                dev_err(dev, "could not upgrade firmware: unable to load %s\n",
1084                        FW_FNAME);
1085                return ret;
1086        }
1087        ret = t3_load_fw(adap, fw->data, fw->size);
1088        release_firmware(fw);
1089
1090        if (ret == 0)
1091                dev_info(dev, "successful upgrade to firmware %d.%d.%d\n",
1092                         FW_VERSION_MAJOR, FW_VERSION_MINOR, FW_VERSION_MICRO);
1093        else
1094                dev_err(dev, "failed to upgrade to firmware %d.%d.%d\n",
1095                        FW_VERSION_MAJOR, FW_VERSION_MINOR, FW_VERSION_MICRO);
1096
1097        return ret;
1098}
1099
1100static inline char t3rev2char(struct adapter *adapter)
1101{
1102        char rev = 0;
1103
1104        switch(adapter->params.rev) {
1105        case T3_REV_B:
1106        case T3_REV_B2:
1107                rev = 'b';
1108                break;
1109        case T3_REV_C:
1110                rev = 'c';
1111                break;
1112        }
1113        return rev;
1114}
1115
1116static int update_tpsram(struct adapter *adap)
1117{
1118        const struct firmware *tpsram;
1119        char buf[64];
1120        struct device *dev = &adap->pdev->dev;
1121        int ret;
1122        char rev;
1123
1124        rev = t3rev2char(adap);
1125        if (!rev)
1126                return 0;
1127
1128        snprintf(buf, sizeof(buf), TPSRAM_NAME, rev);
1129
1130        ret = request_firmware(&tpsram, buf, dev);
1131        if (ret < 0) {
1132                dev_err(dev, "could not load TP SRAM: unable to load %s\n",
1133                        buf);
1134                return ret;
1135        }
1136
1137        ret = t3_check_tpsram(adap, tpsram->data, tpsram->size);
1138        if (ret)
1139                goto release_tpsram;
1140
1141        ret = t3_set_proto_sram(adap, tpsram->data);
1142        if (ret == 0)
1143                dev_info(dev,
1144                         "successful update of protocol engine "
1145                         "to %d.%d.%d\n",
1146                         TP_VERSION_MAJOR, TP_VERSION_MINOR, TP_VERSION_MICRO);
1147        else
1148                dev_err(dev, "failed to update of protocol engine %d.%d.%d\n",
1149                        TP_VERSION_MAJOR, TP_VERSION_MINOR, TP_VERSION_MICRO);
1150        if (ret)
1151                dev_err(dev, "loading protocol SRAM failed\n");
1152
1153release_tpsram:
1154        release_firmware(tpsram);
1155
1156        return ret;
1157}
1158
1159/**
1160 * t3_synchronize_rx - wait for current Rx processing on a port to complete
1161 * @adap: the adapter
1162 * @p: the port
1163 *
1164 * Ensures that current Rx processing on any of the queues associated with
1165 * the given port completes before returning.  We do this by acquiring and
1166 * releasing the locks of the response queues associated with the port.
1167 */
1168static void t3_synchronize_rx(struct adapter *adap, const struct port_info *p)
1169{
1170        int i;
1171
1172        for (i = p->first_qset; i < p->first_qset + p->nqsets; i++) {
1173                struct sge_rspq *q = &adap->sge.qs[i].rspq;
1174
1175                spin_lock_irq(&q->lock);
1176                spin_unlock_irq(&q->lock);
1177        }
1178}
1179
1180static void cxgb_vlan_mode(struct net_device *dev, netdev_features_t features)
1181{
1182        struct port_info *pi = netdev_priv(dev);
1183        struct adapter *adapter = pi->adapter;
1184
1185        if (adapter->params.rev > 0) {
1186                t3_set_vlan_accel(adapter, 1 << pi->port_id,
1187                                  features & NETIF_F_HW_VLAN_CTAG_RX);
1188        } else {
1189                /* single control for all ports */
1190                unsigned int i, have_vlans = features & NETIF_F_HW_VLAN_CTAG_RX;
1191
1192                for_each_port(adapter, i)
1193                        have_vlans |=
1194                                adapter->port[i]->features &
1195                                NETIF_F_HW_VLAN_CTAG_RX;
1196
1197                t3_set_vlan_accel(adapter, 1, have_vlans);
1198        }
1199        t3_synchronize_rx(adapter, pi);
1200}
1201
1202/**
1203 *      cxgb_up - enable the adapter
1204 *      @adapter: adapter being enabled
1205 *
1206 *      Called when the first port is enabled, this function performs the
1207 *      actions necessary to make an adapter operational, such as completing
1208 *      the initialization of HW modules, and enabling interrupts.
1209 *
1210 *      Must be called with the rtnl lock held.
1211 */
1212static int cxgb_up(struct adapter *adap)
1213{
1214        int i, err;
1215
1216        if (!(adap->flags & FULL_INIT_DONE)) {
1217                err = t3_check_fw_version(adap);
1218                if (err == -EINVAL) {
1219                        err = upgrade_fw(adap);
1220                        CH_WARN(adap, "FW upgrade to %d.%d.%d %s\n",
1221                                FW_VERSION_MAJOR, FW_VERSION_MINOR,
1222                                FW_VERSION_MICRO, err ? "failed" : "succeeded");
1223                }
1224
1225                err = t3_check_tpsram_version(adap);
1226                if (err == -EINVAL) {
1227                        err = update_tpsram(adap);
1228                        CH_WARN(adap, "TP upgrade to %d.%d.%d %s\n",
1229                                TP_VERSION_MAJOR, TP_VERSION_MINOR,
1230                                TP_VERSION_MICRO, err ? "failed" : "succeeded");
1231                }
1232
1233                /*
1234                 * Clear interrupts now to catch errors if t3_init_hw fails.
1235                 * We clear them again later as initialization may trigger
1236                 * conditions that can interrupt.
1237                 */
1238                t3_intr_clear(adap);
1239
1240                err = t3_init_hw(adap, 0);
1241                if (err)
1242                        goto out;
1243
1244                t3_set_reg_field(adap, A_TP_PARA_REG5, 0, F_RXDDPOFFINIT);
1245                t3_write_reg(adap, A_ULPRX_TDDP_PSZ, V_HPZ0(PAGE_SHIFT - 12));
1246
1247                err = setup_sge_qsets(adap);
1248                if (err)
1249                        goto out;
1250
1251                for_each_port(adap, i)
1252                        cxgb_vlan_mode(adap->port[i], adap->port[i]->features);
1253
1254                setup_rss(adap);
1255                if (!(adap->flags & NAPI_INIT))
1256                        init_napi(adap);
1257
1258                t3_start_sge_timers(adap);
1259                adap->flags |= FULL_INIT_DONE;
1260        }
1261
1262        t3_intr_clear(adap);
1263
1264        if (adap->flags & USING_MSIX) {
1265                name_msix_vecs(adap);
1266                err = request_irq(adap->msix_info[0].vec,
1267                                  t3_async_intr_handler, 0,
1268                                  adap->msix_info[0].desc, adap);
1269                if (err)
1270                        goto irq_err;
1271
1272                err = request_msix_data_irqs(adap);
1273                if (err) {
1274                        free_irq(adap->msix_info[0].vec, adap);
1275                        goto irq_err;
1276                }
1277        } else if ((err = request_irq(adap->pdev->irq,
1278                                      t3_intr_handler(adap,
1279                                                      adap->sge.qs[0].rspq.
1280                                                      polling),
1281                                      (adap->flags & USING_MSI) ?
1282                                       0 : IRQF_SHARED,
1283                                      adap->name, adap)))
1284                goto irq_err;
1285
1286        enable_all_napi(adap);
1287        t3_sge_start(adap);
1288        t3_intr_enable(adap);
1289
1290        if (adap->params.rev >= T3_REV_C && !(adap->flags & TP_PARITY_INIT) &&
1291            is_offload(adap) && init_tp_parity(adap) == 0)
1292                adap->flags |= TP_PARITY_INIT;
1293
1294        if (adap->flags & TP_PARITY_INIT) {
1295                t3_write_reg(adap, A_TP_INT_CAUSE,
1296                             F_CMCACHEPERR | F_ARPLUTPERR);
1297                t3_write_reg(adap, A_TP_INT_ENABLE, 0x7fbfffff);
1298        }
1299
1300        if (!(adap->flags & QUEUES_BOUND)) {
1301                int ret = bind_qsets(adap);
1302
1303                if (ret < 0) {
1304                        CH_ERR(adap, "failed to bind qsets, err %d\n", ret);
1305                        t3_intr_disable(adap);
1306                        free_irq_resources(adap);
1307                        err = ret;
1308                        goto out;
1309                }
1310                adap->flags |= QUEUES_BOUND;
1311        }
1312
1313out:
1314        return err;
1315irq_err:
1316        CH_ERR(adap, "request_irq failed, err %d\n", err);
1317        goto out;
1318}
1319
1320/*
1321 * Release resources when all the ports and offloading have been stopped.
1322 */
1323static void cxgb_down(struct adapter *adapter, int on_wq)
1324{
1325        t3_sge_stop(adapter);
1326        spin_lock_irq(&adapter->work_lock);     /* sync with PHY intr task */
1327        t3_intr_disable(adapter);
1328        spin_unlock_irq(&adapter->work_lock);
1329
1330        free_irq_resources(adapter);
1331        quiesce_rx(adapter);
1332        t3_sge_stop(adapter);
1333        if (!on_wq)
1334                flush_workqueue(cxgb3_wq);/* wait for external IRQ handler */
1335}
1336
1337static void schedule_chk_task(struct adapter *adap)
1338{
1339        unsigned int timeo;
1340
1341        timeo = adap->params.linkpoll_period ?
1342            (HZ * adap->params.linkpoll_period) / 10 :
1343            adap->params.stats_update_period * HZ;
1344        if (timeo)
1345                queue_delayed_work(cxgb3_wq, &adap->adap_check_task, timeo);
1346}
1347
1348static int offload_open(struct net_device *dev)
1349{
1350        struct port_info *pi = netdev_priv(dev);
1351        struct adapter *adapter = pi->adapter;
1352        struct t3cdev *tdev = dev2t3cdev(dev);
1353        int adap_up = adapter->open_device_map & PORT_MASK;
1354        int err;
1355
1356        if (test_and_set_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map))
1357                return 0;
1358
1359        if (!adap_up && (err = cxgb_up(adapter)) < 0)
1360                goto out;
1361
1362        t3_tp_set_offload_mode(adapter, 1);
1363        tdev->lldev = adapter->port[0];
1364        err = cxgb3_offload_activate(adapter);
1365        if (err)
1366                goto out;
1367
1368        init_port_mtus(adapter);
1369        t3_load_mtus(adapter, adapter->params.mtus, adapter->params.a_wnd,
1370                     adapter->params.b_wnd,
1371                     adapter->params.rev == 0 ?
1372                     adapter->port[0]->mtu : 0xffff);
1373        init_smt(adapter);
1374
1375        if (sysfs_create_group(&tdev->lldev->dev.kobj, &offload_attr_group))
1376                dev_dbg(&dev->dev, "cannot create sysfs group\n");
1377
1378        /* Call back all registered clients */
1379        cxgb3_add_clients(tdev);
1380
1381out:
1382        /* restore them in case the offload module has changed them */
1383        if (err) {
1384                t3_tp_set_offload_mode(adapter, 0);
1385                clear_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map);
1386                cxgb3_set_dummy_ops(tdev);
1387        }
1388        return err;
1389}
1390
1391static int offload_close(struct t3cdev *tdev)
1392{
1393        struct adapter *adapter = tdev2adap(tdev);
1394        struct t3c_data *td = T3C_DATA(tdev);
1395
1396        if (!test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map))
1397                return 0;
1398
1399        /* Call back all registered clients */
1400        cxgb3_remove_clients(tdev);
1401
1402        sysfs_remove_group(&tdev->lldev->dev.kobj, &offload_attr_group);
1403
1404        /* Flush work scheduled while releasing TIDs */
1405        flush_work(&td->tid_release_task);
1406
1407        tdev->lldev = NULL;
1408        cxgb3_set_dummy_ops(tdev);
1409        t3_tp_set_offload_mode(adapter, 0);
1410        clear_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map);
1411
1412        if (!adapter->open_device_map)
1413                cxgb_down(adapter, 0);
1414
1415        cxgb3_offload_deactivate(adapter);
1416        return 0;
1417}
1418
1419static int cxgb_open(struct net_device *dev)
1420{
1421        struct port_info *pi = netdev_priv(dev);
1422        struct adapter *adapter = pi->adapter;
1423        int other_ports = adapter->open_device_map & PORT_MASK;
1424        int err;
1425
1426        if (!adapter->open_device_map && (err = cxgb_up(adapter)) < 0)
1427                return err;
1428
1429        set_bit(pi->port_id, &adapter->open_device_map);
1430        if (is_offload(adapter) && !ofld_disable) {
1431                err = offload_open(dev);
1432                if (err)
1433                        pr_warn("Could not initialize offload capabilities\n");
1434        }
1435
1436        netif_set_real_num_tx_queues(dev, pi->nqsets);
1437        err = netif_set_real_num_rx_queues(dev, pi->nqsets);
1438        if (err)
1439                return err;
1440        link_start(dev);
1441        t3_port_intr_enable(adapter, pi->port_id);
1442        netif_tx_start_all_queues(dev);
1443        if (!other_ports)
1444                schedule_chk_task(adapter);
1445
1446        cxgb3_event_notify(&adapter->tdev, OFFLOAD_PORT_UP, pi->port_id);
1447        return 0;
1448}
1449
1450static int __cxgb_close(struct net_device *dev, int on_wq)
1451{
1452        struct port_info *pi = netdev_priv(dev);
1453        struct adapter *adapter = pi->adapter;
1454
1455        
1456        if (!adapter->open_device_map)
1457                return 0;
1458
1459        /* Stop link fault interrupts */
1460        t3_xgm_intr_disable(adapter, pi->port_id);
1461        t3_read_reg(adapter, A_XGM_INT_STATUS + pi->mac.offset);
1462
1463        t3_port_intr_disable(adapter, pi->port_id);
1464        netif_tx_stop_all_queues(dev);
1465        pi->phy.ops->power_down(&pi->phy, 1);
1466        netif_carrier_off(dev);
1467        t3_mac_disable(&pi->mac, MAC_DIRECTION_TX | MAC_DIRECTION_RX);
1468
1469        spin_lock_irq(&adapter->work_lock);     /* sync with update task */
1470        clear_bit(pi->port_id, &adapter->open_device_map);
1471        spin_unlock_irq(&adapter->work_lock);
1472
1473        if (!(adapter->open_device_map & PORT_MASK))
1474                cancel_delayed_work_sync(&adapter->adap_check_task);
1475
1476        if (!adapter->open_device_map)
1477                cxgb_down(adapter, on_wq);
1478
1479        cxgb3_event_notify(&adapter->tdev, OFFLOAD_PORT_DOWN, pi->port_id);
1480        return 0;
1481}
1482
1483static int cxgb_close(struct net_device *dev)
1484{
1485        return __cxgb_close(dev, 0);
1486}
1487
1488static struct net_device_stats *cxgb_get_stats(struct net_device *dev)
1489{
1490        struct port_info *pi = netdev_priv(dev);
1491        struct adapter *adapter = pi->adapter;
1492        struct net_device_stats *ns = &dev->stats;
1493        const struct mac_stats *pstats;
1494
1495        spin_lock(&adapter->stats_lock);
1496        pstats = t3_mac_update_stats(&pi->mac);
1497        spin_unlock(&adapter->stats_lock);
1498
1499        ns->tx_bytes = pstats->tx_octets;
1500        ns->tx_packets = pstats->tx_frames;
1501        ns->rx_bytes = pstats->rx_octets;
1502        ns->rx_packets = pstats->rx_frames;
1503        ns->multicast = pstats->rx_mcast_frames;
1504
1505        ns->tx_errors = pstats->tx_underrun;
1506        ns->rx_errors = pstats->rx_symbol_errs + pstats->rx_fcs_errs +
1507            pstats->rx_too_long + pstats->rx_jabber + pstats->rx_short +
1508            pstats->rx_fifo_ovfl;
1509
1510        /* detailed rx_errors */
1511        ns->rx_length_errors = pstats->rx_jabber + pstats->rx_too_long;
1512        ns->rx_over_errors = 0;
1513        ns->rx_crc_errors = pstats->rx_fcs_errs;
1514        ns->rx_frame_errors = pstats->rx_symbol_errs;
1515        ns->rx_fifo_errors = pstats->rx_fifo_ovfl;
1516        ns->rx_missed_errors = pstats->rx_cong_drops;
1517
1518        /* detailed tx_errors */
1519        ns->tx_aborted_errors = 0;
1520        ns->tx_carrier_errors = 0;
1521        ns->tx_fifo_errors = pstats->tx_underrun;
1522        ns->tx_heartbeat_errors = 0;
1523        ns->tx_window_errors = 0;
1524        return ns;
1525}
1526
1527static u32 get_msglevel(struct net_device *dev)
1528{
1529        struct port_info *pi = netdev_priv(dev);
1530        struct adapter *adapter = pi->adapter;
1531
1532        return adapter->msg_enable;
1533}
1534
1535static void set_msglevel(struct net_device *dev, u32 val)
1536{
1537        struct port_info *pi = netdev_priv(dev);
1538        struct adapter *adapter = pi->adapter;
1539
1540        adapter->msg_enable = val;
1541}
1542
1543static const char stats_strings[][ETH_GSTRING_LEN] = {
1544        "TxOctetsOK         ",
1545        "TxFramesOK         ",
1546        "TxMulticastFramesOK",
1547        "TxBroadcastFramesOK",
1548        "TxPauseFrames      ",
1549        "TxUnderrun         ",
1550        "TxExtUnderrun      ",
1551
1552        "TxFrames64         ",
1553        "TxFrames65To127    ",
1554        "TxFrames128To255   ",
1555        "TxFrames256To511   ",
1556        "TxFrames512To1023  ",
1557        "TxFrames1024To1518 ",
1558        "TxFrames1519ToMax  ",
1559
1560        "RxOctetsOK         ",
1561        "RxFramesOK         ",
1562        "RxMulticastFramesOK",
1563        "RxBroadcastFramesOK",
1564        "RxPauseFrames      ",
1565        "RxFCSErrors        ",
1566        "RxSymbolErrors     ",
1567        "RxShortErrors      ",
1568        "RxJabberErrors     ",
1569        "RxLengthErrors     ",
1570        "RxFIFOoverflow     ",
1571
1572        "RxFrames64         ",
1573        "RxFrames65To127    ",
1574        "RxFrames128To255   ",
1575        "RxFrames256To511   ",
1576        "RxFrames512To1023  ",
1577        "RxFrames1024To1518 ",
1578        "RxFrames1519ToMax  ",
1579
1580        "PhyFIFOErrors      ",
1581        "TSO                ",
1582        "VLANextractions    ",
1583        "VLANinsertions     ",
1584        "TxCsumOffload      ",
1585        "RxCsumGood         ",
1586        "LroAggregated      ",
1587        "LroFlushed         ",
1588        "LroNoDesc          ",
1589        "RxDrops            ",
1590
1591        "CheckTXEnToggled   ",
1592        "CheckResets        ",
1593
1594        "LinkFaults         ",
1595};
1596
1597static int get_sset_count(struct net_device *dev, int sset)
1598{
1599        switch (sset) {
1600        case ETH_SS_STATS:
1601                return ARRAY_SIZE(stats_strings);
1602        default:
1603                return -EOPNOTSUPP;
1604        }
1605}
1606
1607#define T3_REGMAP_SIZE (3 * 1024)
1608
1609static int get_regs_len(struct net_device *dev)
1610{
1611        return T3_REGMAP_SIZE;
1612}
1613
1614static int get_eeprom_len(struct net_device *dev)
1615{
1616        return EEPROMSIZE;
1617}
1618
1619static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1620{
1621        struct port_info *pi = netdev_priv(dev);
1622        struct adapter *adapter = pi->adapter;
1623        u32 fw_vers = 0;
1624        u32 tp_vers = 0;
1625
1626        spin_lock(&adapter->stats_lock);
1627        t3_get_fw_version(adapter, &fw_vers);
1628        t3_get_tp_version(adapter, &tp_vers);
1629        spin_unlock(&adapter->stats_lock);
1630
1631        strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
1632        strlcpy(info->bus_info, pci_name(adapter->pdev),
1633                sizeof(info->bus_info));
1634        if (fw_vers)
1635                snprintf(info->fw_version, sizeof(info->fw_version),
1636                         "%s %u.%u.%u TP %u.%u.%u",
1637                         G_FW_VERSION_TYPE(fw_vers) ? "T" : "N",
1638                         G_FW_VERSION_MAJOR(fw_vers),
1639                         G_FW_VERSION_MINOR(fw_vers),
1640                         G_FW_VERSION_MICRO(fw_vers),
1641                         G_TP_VERSION_MAJOR(tp_vers),
1642                         G_TP_VERSION_MINOR(tp_vers),
1643                         G_TP_VERSION_MICRO(tp_vers));
1644}
1645
1646static void get_strings(struct net_device *dev, u32 stringset, u8 * data)
1647{
1648        if (stringset == ETH_SS_STATS)
1649                memcpy(data, stats_strings, sizeof(stats_strings));
1650}
1651
1652static unsigned long collect_sge_port_stats(struct adapter *adapter,
1653                                            struct port_info *p, int idx)
1654{
1655        int i;
1656        unsigned long tot = 0;
1657
1658        for (i = p->first_qset; i < p->first_qset + p->nqsets; ++i)
1659                tot += adapter->sge.qs[i].port_stats[idx];
1660        return tot;
1661}
1662
1663static void get_stats(struct net_device *dev, struct ethtool_stats *stats,
1664                      u64 *data)
1665{
1666        struct port_info *pi = netdev_priv(dev);
1667        struct adapter *adapter = pi->adapter;
1668        const struct mac_stats *s;
1669
1670        spin_lock(&adapter->stats_lock);
1671        s = t3_mac_update_stats(&pi->mac);
1672        spin_unlock(&adapter->stats_lock);
1673
1674        *data++ = s->tx_octets;
1675        *data++ = s->tx_frames;
1676        *data++ = s->tx_mcast_frames;
1677        *data++ = s->tx_bcast_frames;
1678        *data++ = s->tx_pause;
1679        *data++ = s->tx_underrun;
1680        *data++ = s->tx_fifo_urun;
1681
1682        *data++ = s->tx_frames_64;
1683        *data++ = s->tx_frames_65_127;
1684        *data++ = s->tx_frames_128_255;
1685        *data++ = s->tx_frames_256_511;
1686        *data++ = s->tx_frames_512_1023;
1687        *data++ = s->tx_frames_1024_1518;
1688        *data++ = s->tx_frames_1519_max;
1689
1690        *data++ = s->rx_octets;
1691        *data++ = s->rx_frames;
1692        *data++ = s->rx_mcast_frames;
1693        *data++ = s->rx_bcast_frames;
1694        *data++ = s->rx_pause;
1695        *data++ = s->rx_fcs_errs;
1696        *data++ = s->rx_symbol_errs;
1697        *data++ = s->rx_short;
1698        *data++ = s->rx_jabber;
1699        *data++ = s->rx_too_long;
1700        *data++ = s->rx_fifo_ovfl;
1701
1702        *data++ = s->rx_frames_64;
1703        *data++ = s->rx_frames_65_127;
1704        *data++ = s->rx_frames_128_255;
1705        *data++ = s->rx_frames_256_511;
1706        *data++ = s->rx_frames_512_1023;
1707        *data++ = s->rx_frames_1024_1518;
1708        *data++ = s->rx_frames_1519_max;
1709
1710        *data++ = pi->phy.fifo_errors;
1711
1712        *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_TSO);
1713        *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_VLANEX);
1714        *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_VLANINS);
1715        *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_TX_CSUM);
1716        *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_RX_CSUM_GOOD);
1717        *data++ = 0;
1718        *data++ = 0;
1719        *data++ = 0;
1720        *data++ = s->rx_cong_drops;
1721
1722        *data++ = s->num_toggled;
1723        *data++ = s->num_resets;
1724
1725        *data++ = s->link_faults;
1726}
1727
1728static inline void reg_block_dump(struct adapter *ap, void *buf,
1729                                  unsigned int start, unsigned int end)
1730{
1731        u32 *p = buf + start;
1732
1733        for (; start <= end; start += sizeof(u32))
1734                *p++ = t3_read_reg(ap, start);
1735}
1736
1737static void get_regs(struct net_device *dev, struct ethtool_regs *regs,
1738                     void *buf)
1739{
1740        struct port_info *pi = netdev_priv(dev);
1741        struct adapter *ap = pi->adapter;
1742
1743        /*
1744         * Version scheme:
1745         * bits 0..9: chip version
1746         * bits 10..15: chip revision
1747         * bit 31: set for PCIe cards
1748         */
1749        regs->version = 3 | (ap->params.rev << 10) | (is_pcie(ap) << 31);
1750
1751        /*
1752         * We skip the MAC statistics registers because they are clear-on-read.
1753         * Also reading multi-register stats would need to synchronize with the
1754         * periodic mac stats accumulation.  Hard to justify the complexity.
1755         */
1756        memset(buf, 0, T3_REGMAP_SIZE);
1757        reg_block_dump(ap, buf, 0, A_SG_RSPQ_CREDIT_RETURN);
1758        reg_block_dump(ap, buf, A_SG_HI_DRB_HI_THRSH, A_ULPRX_PBL_ULIMIT);
1759        reg_block_dump(ap, buf, A_ULPTX_CONFIG, A_MPS_INT_CAUSE);
1760        reg_block_dump(ap, buf, A_CPL_SWITCH_CNTRL, A_CPL_MAP_TBL_DATA);
1761        reg_block_dump(ap, buf, A_SMB_GLOBAL_TIME_CFG, A_XGM_SERDES_STAT3);
1762        reg_block_dump(ap, buf, A_XGM_SERDES_STATUS0,
1763                       XGM_REG(A_XGM_SERDES_STAT3, 1));
1764        reg_block_dump(ap, buf, XGM_REG(A_XGM_SERDES_STATUS0, 1),
1765                       XGM_REG(A_XGM_RX_SPI4_SOP_EOP_CNT, 1));
1766}
1767
1768static int restart_autoneg(struct net_device *dev)
1769{
1770        struct port_info *p = netdev_priv(dev);
1771
1772        if (!netif_running(dev))
1773                return -EAGAIN;
1774        if (p->link_config.autoneg != AUTONEG_ENABLE)
1775                return -EINVAL;
1776        p->phy.ops->autoneg_restart(&p->phy);
1777        return 0;
1778}
1779
1780static int set_phys_id(struct net_device *dev,
1781                       enum ethtool_phys_id_state state)
1782{
1783        struct port_info *pi = netdev_priv(dev);
1784        struct adapter *adapter = pi->adapter;
1785
1786        switch (state) {
1787        case ETHTOOL_ID_ACTIVE:
1788                return 1;       /* cycle on/off once per second */
1789
1790        case ETHTOOL_ID_OFF:
1791                t3_set_reg_field(adapter, A_T3DBG_GPIO_EN, F_GPIO0_OUT_VAL, 0);
1792                break;
1793
1794        case ETHTOOL_ID_ON:
1795        case ETHTOOL_ID_INACTIVE:
1796                t3_set_reg_field(adapter, A_T3DBG_GPIO_EN, F_GPIO0_OUT_VAL,
1797                         F_GPIO0_OUT_VAL);
1798        }
1799
1800        return 0;
1801}
1802
1803static int get_link_ksettings(struct net_device *dev,
1804                              struct ethtool_link_ksettings *cmd)
1805{
1806        struct port_info *p = netdev_priv(dev);
1807        u32 supported;
1808
1809        ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
1810                                                p->link_config.supported);
1811        ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
1812                                                p->link_config.advertising);
1813
1814        if (netif_carrier_ok(dev)) {
1815                cmd->base.speed = p->link_config.speed;
1816                cmd->base.duplex = p->link_config.duplex;
1817        } else {
1818                cmd->base.speed = SPEED_UNKNOWN;
1819                cmd->base.duplex = DUPLEX_UNKNOWN;
1820        }
1821
1822        ethtool_convert_link_mode_to_legacy_u32(&supported,
1823                                                cmd->link_modes.supported);
1824
1825        cmd->base.port = (supported & SUPPORTED_TP) ? PORT_TP : PORT_FIBRE;
1826        cmd->base.phy_address = p->phy.mdio.prtad;
1827        cmd->base.autoneg = p->link_config.autoneg;
1828        return 0;
1829}
1830
1831static int speed_duplex_to_caps(int speed, int duplex)
1832{
1833        int cap = 0;
1834
1835        switch (speed) {
1836        case SPEED_10:
1837                if (duplex == DUPLEX_FULL)
1838                        cap = SUPPORTED_10baseT_Full;
1839                else
1840                        cap = SUPPORTED_10baseT_Half;
1841                break;
1842        case SPEED_100:
1843                if (duplex == DUPLEX_FULL)
1844                        cap = SUPPORTED_100baseT_Full;
1845                else
1846                        cap = SUPPORTED_100baseT_Half;
1847                break;
1848        case SPEED_1000:
1849                if (duplex == DUPLEX_FULL)
1850                        cap = SUPPORTED_1000baseT_Full;
1851                else
1852                        cap = SUPPORTED_1000baseT_Half;
1853                break;
1854        case SPEED_10000:
1855                if (duplex == DUPLEX_FULL)
1856                        cap = SUPPORTED_10000baseT_Full;
1857        }
1858        return cap;
1859}
1860
1861#define ADVERTISED_MASK (ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full | \
1862                      ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full | \
1863                      ADVERTISED_1000baseT_Half | ADVERTISED_1000baseT_Full | \
1864                      ADVERTISED_10000baseT_Full)
1865
1866static int set_link_ksettings(struct net_device *dev,
1867                              const struct ethtool_link_ksettings *cmd)
1868{
1869        struct port_info *p = netdev_priv(dev);
1870        struct link_config *lc = &p->link_config;
1871        u32 advertising;
1872
1873        ethtool_convert_link_mode_to_legacy_u32(&advertising,
1874                                                cmd->link_modes.advertising);
1875
1876        if (!(lc->supported & SUPPORTED_Autoneg)) {
1877                /*
1878                 * PHY offers a single speed/duplex.  See if that's what's
1879                 * being requested.
1880                 */
1881                if (cmd->base.autoneg == AUTONEG_DISABLE) {
1882                        u32 speed = cmd->base.speed;
1883                        int cap = speed_duplex_to_caps(speed, cmd->base.duplex);
1884                        if (lc->supported & cap)
1885                                return 0;
1886                }
1887                return -EINVAL;
1888        }
1889
1890        if (cmd->base.autoneg == AUTONEG_DISABLE) {
1891                u32 speed = cmd->base.speed;
1892                int cap = speed_duplex_to_caps(speed, cmd->base.duplex);
1893
1894                if (!(lc->supported & cap) || (speed == SPEED_1000))
1895                        return -EINVAL;
1896                lc->requested_speed = speed;
1897                lc->requested_duplex = cmd->base.duplex;
1898                lc->advertising = 0;
1899        } else {
1900                advertising &= ADVERTISED_MASK;
1901                advertising &= lc->supported;
1902                if (!advertising)
1903                        return -EINVAL;
1904                lc->requested_speed = SPEED_INVALID;
1905                lc->requested_duplex = DUPLEX_INVALID;
1906                lc->advertising = advertising | ADVERTISED_Autoneg;
1907        }
1908        lc->autoneg = cmd->base.autoneg;
1909        if (netif_running(dev))
1910                t3_link_start(&p->phy, &p->mac, lc);
1911        return 0;
1912}
1913
1914static void get_pauseparam(struct net_device *dev,
1915                           struct ethtool_pauseparam *epause)
1916{
1917        struct port_info *p = netdev_priv(dev);
1918
1919        epause->autoneg = (p->link_config.requested_fc & PAUSE_AUTONEG) != 0;
1920        epause->rx_pause = (p->link_config.fc & PAUSE_RX) != 0;
1921        epause->tx_pause = (p->link_config.fc & PAUSE_TX) != 0;
1922}
1923
1924static int set_pauseparam(struct net_device *dev,
1925                          struct ethtool_pauseparam *epause)
1926{
1927        struct port_info *p = netdev_priv(dev);
1928        struct link_config *lc = &p->link_config;
1929
1930        if (epause->autoneg == AUTONEG_DISABLE)
1931                lc->requested_fc = 0;
1932        else if (lc->supported & SUPPORTED_Autoneg)
1933                lc->requested_fc = PAUSE_AUTONEG;
1934        else
1935                return -EINVAL;
1936
1937        if (epause->rx_pause)
1938                lc->requested_fc |= PAUSE_RX;
1939        if (epause->tx_pause)
1940                lc->requested_fc |= PAUSE_TX;
1941        if (lc->autoneg == AUTONEG_ENABLE) {
1942                if (netif_running(dev))
1943                        t3_link_start(&p->phy, &p->mac, lc);
1944        } else {
1945                lc->fc = lc->requested_fc & (PAUSE_RX | PAUSE_TX);
1946                if (netif_running(dev))
1947                        t3_mac_set_speed_duplex_fc(&p->mac, -1, -1, lc->fc);
1948        }
1949        return 0;
1950}
1951
1952static void get_sge_param(struct net_device *dev, struct ethtool_ringparam *e)
1953{
1954        struct port_info *pi = netdev_priv(dev);
1955        struct adapter *adapter = pi->adapter;
1956        const struct qset_params *q = &adapter->params.sge.qset[pi->first_qset];
1957
1958        e->rx_max_pending = MAX_RX_BUFFERS;
1959        e->rx_jumbo_max_pending = MAX_RX_JUMBO_BUFFERS;
1960        e->tx_max_pending = MAX_TXQ_ENTRIES;
1961
1962        e->rx_pending = q->fl_size;
1963        e->rx_mini_pending = q->rspq_size;
1964        e->rx_jumbo_pending = q->jumbo_size;
1965        e->tx_pending = q->txq_size[0];
1966}
1967
1968static int set_sge_param(struct net_device *dev, struct ethtool_ringparam *e)
1969{
1970        struct port_info *pi = netdev_priv(dev);
1971        struct adapter *adapter = pi->adapter;
1972        struct qset_params *q;
1973        int i;
1974
1975        if (e->rx_pending > MAX_RX_BUFFERS ||
1976            e->rx_jumbo_pending > MAX_RX_JUMBO_BUFFERS ||
1977            e->tx_pending > MAX_TXQ_ENTRIES ||
1978            e->rx_mini_pending > MAX_RSPQ_ENTRIES ||
1979            e->rx_mini_pending < MIN_RSPQ_ENTRIES ||
1980            e->rx_pending < MIN_FL_ENTRIES ||
1981            e->rx_jumbo_pending < MIN_FL_ENTRIES ||
1982            e->tx_pending < adapter->params.nports * MIN_TXQ_ENTRIES)
1983                return -EINVAL;
1984
1985        if (adapter->flags & FULL_INIT_DONE)
1986                return -EBUSY;
1987
1988        q = &adapter->params.sge.qset[pi->first_qset];
1989        for (i = 0; i < pi->nqsets; ++i, ++q) {
1990                q->rspq_size = e->rx_mini_pending;
1991                q->fl_size = e->rx_pending;
1992                q->jumbo_size = e->rx_jumbo_pending;
1993                q->txq_size[0] = e->tx_pending;
1994                q->txq_size[1] = e->tx_pending;
1995                q->txq_size[2] = e->tx_pending;
1996        }
1997        return 0;
1998}
1999
2000static int set_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
2001{
2002        struct port_info *pi = netdev_priv(dev);
2003        struct adapter *adapter = pi->adapter;
2004        struct qset_params *qsp;
2005        struct sge_qset *qs;
2006        int i;
2007
2008        if (c->rx_coalesce_usecs * 10 > M_NEWTIMER)
2009                return -EINVAL;
2010
2011        for (i = 0; i < pi->nqsets; i++) {
2012                qsp = &adapter->params.sge.qset[i];
2013                qs = &adapter->sge.qs[i];
2014                qsp->coalesce_usecs = c->rx_coalesce_usecs;
2015                t3_update_qset_coalesce(qs, qsp);
2016        }
2017
2018        return 0;
2019}
2020
2021static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
2022{
2023        struct port_info *pi = netdev_priv(dev);
2024        struct adapter *adapter = pi->adapter;
2025        struct qset_params *q = adapter->params.sge.qset;
2026
2027        c->rx_coalesce_usecs = q->coalesce_usecs;
2028        return 0;
2029}
2030
2031static int get_eeprom(struct net_device *dev, struct ethtool_eeprom *e,
2032                      u8 * data)
2033{
2034        struct port_info *pi = netdev_priv(dev);
2035        struct adapter *adapter = pi->adapter;
2036        int i, err = 0;
2037
2038        u8 *buf = kmalloc(EEPROMSIZE, GFP_KERNEL);
2039        if (!buf)
2040                return -ENOMEM;
2041
2042        e->magic = EEPROM_MAGIC;
2043        for (i = e->offset & ~3; !err && i < e->offset + e->len; i += 4)
2044                err = t3_seeprom_read(adapter, i, (__le32 *) & buf[i]);
2045
2046        if (!err)
2047                memcpy(data, buf + e->offset, e->len);
2048        kfree(buf);
2049        return err;
2050}
2051
2052static int set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
2053                      u8 * data)
2054{
2055        struct port_info *pi = netdev_priv(dev);
2056        struct adapter *adapter = pi->adapter;
2057        u32 aligned_offset, aligned_len;
2058        __le32 *p;
2059        u8 *buf;
2060        int err;
2061
2062        if (eeprom->magic != EEPROM_MAGIC)
2063                return -EINVAL;
2064
2065        aligned_offset = eeprom->offset & ~3;
2066        aligned_len = (eeprom->len + (eeprom->offset & 3) + 3) & ~3;
2067
2068        if (aligned_offset != eeprom->offset || aligned_len != eeprom->len) {
2069                buf = kmalloc(aligned_len, GFP_KERNEL);
2070                if (!buf)
2071                        return -ENOMEM;
2072                err = t3_seeprom_read(adapter, aligned_offset, (__le32 *) buf);
2073                if (!err && aligned_len > 4)
2074                        err = t3_seeprom_read(adapter,
2075                                              aligned_offset + aligned_len - 4,
2076                                              (__le32 *) & buf[aligned_len - 4]);
2077                if (err)
2078                        goto out;
2079                memcpy(buf + (eeprom->offset & 3), data, eeprom->len);
2080        } else
2081                buf = data;
2082
2083        err = t3_seeprom_wp(adapter, 0);
2084        if (err)
2085                goto out;
2086
2087        for (p = (__le32 *) buf; !err && aligned_len; aligned_len -= 4, p++) {
2088                err = t3_seeprom_write(adapter, aligned_offset, *p);
2089                aligned_offset += 4;
2090        }
2091
2092        if (!err)
2093                err = t3_seeprom_wp(adapter, 1);
2094out:
2095        if (buf != data)
2096                kfree(buf);
2097        return err;
2098}
2099
2100static void get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2101{
2102        wol->supported = 0;
2103        wol->wolopts = 0;
2104        memset(&wol->sopass, 0, sizeof(wol->sopass));
2105}
2106
2107static const struct ethtool_ops cxgb_ethtool_ops = {
2108        .get_drvinfo = get_drvinfo,
2109        .get_msglevel = get_msglevel,
2110        .set_msglevel = set_msglevel,
2111        .get_ringparam = get_sge_param,
2112        .set_ringparam = set_sge_param,
2113        .get_coalesce = get_coalesce,
2114        .set_coalesce = set_coalesce,
2115        .get_eeprom_len = get_eeprom_len,
2116        .get_eeprom = get_eeprom,
2117        .set_eeprom = set_eeprom,
2118        .get_pauseparam = get_pauseparam,
2119        .set_pauseparam = set_pauseparam,
2120        .get_link = ethtool_op_get_link,
2121        .get_strings = get_strings,
2122        .set_phys_id = set_phys_id,
2123        .nway_reset = restart_autoneg,
2124        .get_sset_count = get_sset_count,
2125        .get_ethtool_stats = get_stats,
2126        .get_regs_len = get_regs_len,
2127        .get_regs = get_regs,
2128        .get_wol = get_wol,
2129        .get_link_ksettings = get_link_ksettings,
2130        .set_link_ksettings = set_link_ksettings,
2131};
2132
2133static int in_range(int val, int lo, int hi)
2134{
2135        return val < 0 || (val <= hi && val >= lo);
2136}
2137
2138static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr)
2139{
2140        struct port_info *pi = netdev_priv(dev);
2141        struct adapter *adapter = pi->adapter;
2142        u32 cmd;
2143        int ret;
2144
2145        if (copy_from_user(&cmd, useraddr, sizeof(cmd)))
2146                return -EFAULT;
2147
2148        switch (cmd) {
2149        case CHELSIO_SET_QSET_PARAMS:{
2150                int i;
2151                struct qset_params *q;
2152                struct ch_qset_params t;
2153                int q1 = pi->first_qset;
2154                int nqsets = pi->nqsets;
2155
2156                if (!capable(CAP_NET_ADMIN))
2157                        return -EPERM;
2158                if (copy_from_user(&t, useraddr, sizeof(t)))
2159                        return -EFAULT;
2160                if (t.qset_idx >= SGE_QSETS)
2161                        return -EINVAL;
2162                if (!in_range(t.intr_lat, 0, M_NEWTIMER) ||
2163                    !in_range(t.cong_thres, 0, 255) ||
2164                    !in_range(t.txq_size[0], MIN_TXQ_ENTRIES,
2165                              MAX_TXQ_ENTRIES) ||
2166                    !in_range(t.txq_size[1], MIN_TXQ_ENTRIES,
2167                              MAX_TXQ_ENTRIES) ||
2168                    !in_range(t.txq_size[2], MIN_CTRL_TXQ_ENTRIES,
2169                              MAX_CTRL_TXQ_ENTRIES) ||
2170                    !in_range(t.fl_size[0], MIN_FL_ENTRIES,
2171                              MAX_RX_BUFFERS) ||
2172                    !in_range(t.fl_size[1], MIN_FL_ENTRIES,
2173                              MAX_RX_JUMBO_BUFFERS) ||
2174                    !in_range(t.rspq_size, MIN_RSPQ_ENTRIES,
2175                              MAX_RSPQ_ENTRIES))
2176                        return -EINVAL;
2177
2178                if ((adapter->flags & FULL_INIT_DONE) &&
2179                        (t.rspq_size >= 0 || t.fl_size[0] >= 0 ||
2180                        t.fl_size[1] >= 0 || t.txq_size[0] >= 0 ||
2181                        t.txq_size[1] >= 0 || t.txq_size[2] >= 0 ||
2182                        t.polling >= 0 || t.cong_thres >= 0))
2183                        return -EBUSY;
2184
2185                /* Allow setting of any available qset when offload enabled */
2186                if (test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map)) {
2187                        q1 = 0;
2188                        for_each_port(adapter, i) {
2189                                pi = adap2pinfo(adapter, i);
2190                                nqsets += pi->first_qset + pi->nqsets;
2191                        }
2192                }
2193
2194                if (t.qset_idx < q1)
2195                        return -EINVAL;
2196                if (t.qset_idx > q1 + nqsets - 1)
2197                        return -EINVAL;
2198
2199                q = &adapter->params.sge.qset[t.qset_idx];
2200
2201                if (t.rspq_size >= 0)
2202                        q->rspq_size = t.rspq_size;
2203                if (t.fl_size[0] >= 0)
2204                        q->fl_size = t.fl_size[0];
2205                if (t.fl_size[1] >= 0)
2206                        q->jumbo_size = t.fl_size[1];
2207                if (t.txq_size[0] >= 0)
2208                        q->txq_size[0] = t.txq_size[0];
2209                if (t.txq_size[1] >= 0)
2210                        q->txq_size[1] = t.txq_size[1];
2211                if (t.txq_size[2] >= 0)
2212                        q->txq_size[2] = t.txq_size[2];
2213                if (t.cong_thres >= 0)
2214                        q->cong_thres = t.cong_thres;
2215                if (t.intr_lat >= 0) {
2216                        struct sge_qset *qs =
2217                                &adapter->sge.qs[t.qset_idx];
2218
2219                        q->coalesce_usecs = t.intr_lat;
2220                        t3_update_qset_coalesce(qs, q);
2221                }
2222                if (t.polling >= 0) {
2223                        if (adapter->flags & USING_MSIX)
2224                                q->polling = t.polling;
2225                        else {
2226                                /* No polling with INTx for T3A */
2227                                if (adapter->params.rev == 0 &&
2228                                        !(adapter->flags & USING_MSI))
2229                                        t.polling = 0;
2230
2231                                for (i = 0; i < SGE_QSETS; i++) {
2232                                        q = &adapter->params.sge.
2233                                                qset[i];
2234                                        q->polling = t.polling;
2235                                }
2236                        }
2237                }
2238
2239                if (t.lro >= 0) {
2240                        if (t.lro)
2241                                dev->wanted_features |= NETIF_F_GRO;
2242                        else
2243                                dev->wanted_features &= ~NETIF_F_GRO;
2244                        netdev_update_features(dev);
2245                }
2246
2247                break;
2248        }
2249        case CHELSIO_GET_QSET_PARAMS:{
2250                struct qset_params *q;
2251                struct ch_qset_params t;
2252                int q1 = pi->first_qset;
2253                int nqsets = pi->nqsets;
2254                int i;
2255
2256                if (copy_from_user(&t, useraddr, sizeof(t)))
2257                        return -EFAULT;
2258
2259                /* Display qsets for all ports when offload enabled */
2260                if (test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map)) {
2261                        q1 = 0;
2262                        for_each_port(adapter, i) {
2263                                pi = adap2pinfo(adapter, i);
2264                                nqsets = pi->first_qset + pi->nqsets;
2265                        }
2266                }
2267
2268                if (t.qset_idx >= nqsets)
2269                        return -EINVAL;
2270                t.qset_idx = array_index_nospec(t.qset_idx, nqsets);
2271
2272                q = &adapter->params.sge.qset[q1 + t.qset_idx];
2273                t.rspq_size = q->rspq_size;
2274                t.txq_size[0] = q->txq_size[0];
2275                t.txq_size[1] = q->txq_size[1];
2276                t.txq_size[2] = q->txq_size[2];
2277                t.fl_size[0] = q->fl_size;
2278                t.fl_size[1] = q->jumbo_size;
2279                t.polling = q->polling;
2280                t.lro = !!(dev->features & NETIF_F_GRO);
2281                t.intr_lat = q->coalesce_usecs;
2282                t.cong_thres = q->cong_thres;
2283                t.qnum = q1;
2284
2285                if (adapter->flags & USING_MSIX)
2286                        t.vector = adapter->msix_info[q1 + t.qset_idx + 1].vec;
2287                else
2288                        t.vector = adapter->pdev->irq;
2289
2290                if (copy_to_user(useraddr, &t, sizeof(t)))
2291                        return -EFAULT;
2292                break;
2293        }
2294        case CHELSIO_SET_QSET_NUM:{
2295                struct ch_reg edata;
2296                unsigned int i, first_qset = 0, other_qsets = 0;
2297
2298                if (!capable(CAP_NET_ADMIN))
2299                        return -EPERM;
2300                if (adapter->flags & FULL_INIT_DONE)
2301                        return -EBUSY;
2302                if (copy_from_user(&edata, useraddr, sizeof(edata)))
2303                        return -EFAULT;
2304                if (edata.val < 1 ||
2305                        (edata.val > 1 && !(adapter->flags & USING_MSIX)))
2306                        return -EINVAL;
2307
2308                for_each_port(adapter, i)
2309                        if (adapter->port[i] && adapter->port[i] != dev)
2310                                other_qsets += adap2pinfo(adapter, i)->nqsets;
2311
2312                if (edata.val + other_qsets > SGE_QSETS)
2313                        return -EINVAL;
2314
2315                pi->nqsets = edata.val;
2316
2317                for_each_port(adapter, i)
2318                        if (adapter->port[i]) {
2319                                pi = adap2pinfo(adapter, i);
2320                                pi->first_qset = first_qset;
2321                                first_qset += pi->nqsets;
2322                        }
2323                break;
2324        }
2325        case CHELSIO_GET_QSET_NUM:{
2326                struct ch_reg edata;
2327
2328                memset(&edata, 0, sizeof(struct ch_reg));
2329
2330                edata.cmd = CHELSIO_GET_QSET_NUM;
2331                edata.val = pi->nqsets;
2332                if (copy_to_user(useraddr, &edata, sizeof(edata)))
2333                        return -EFAULT;
2334                break;
2335        }
2336        case CHELSIO_LOAD_FW:{
2337                u8 *fw_data;
2338                struct ch_mem_range t;
2339
2340                if (!capable(CAP_SYS_RAWIO))
2341                        return -EPERM;
2342                if (copy_from_user(&t, useraddr, sizeof(t)))
2343                        return -EFAULT;
2344                /* Check t.len sanity ? */
2345                fw_data = memdup_user(useraddr + sizeof(t), t.len);
2346                if (IS_ERR(fw_data))
2347                        return PTR_ERR(fw_data);
2348
2349                ret = t3_load_fw(adapter, fw_data, t.len);
2350                kfree(fw_data);
2351                if (ret)
2352                        return ret;
2353                break;
2354        }
2355        case CHELSIO_SETMTUTAB:{
2356                struct ch_mtus m;
2357                int i;
2358
2359                if (!is_offload(adapter))
2360                        return -EOPNOTSUPP;
2361                if (!capable(CAP_NET_ADMIN))
2362                        return -EPERM;
2363                if (offload_running(adapter))
2364                        return -EBUSY;
2365                if (copy_from_user(&m, useraddr, sizeof(m)))
2366                        return -EFAULT;
2367                if (m.nmtus != NMTUS)
2368                        return -EINVAL;
2369                if (m.mtus[0] < 81)     /* accommodate SACK */
2370                        return -EINVAL;
2371
2372                /* MTUs must be in ascending order */
2373                for (i = 1; i < NMTUS; ++i)
2374                        if (m.mtus[i] < m.mtus[i - 1])
2375                                return -EINVAL;
2376
2377                memcpy(adapter->params.mtus, m.mtus,
2378                        sizeof(adapter->params.mtus));
2379                break;
2380        }
2381        case CHELSIO_GET_PM:{
2382                struct tp_params *p = &adapter->params.tp;
2383                struct ch_pm m = {.cmd = CHELSIO_GET_PM };
2384
2385                if (!is_offload(adapter))
2386                        return -EOPNOTSUPP;
2387                m.tx_pg_sz = p->tx_pg_size;
2388                m.tx_num_pg = p->tx_num_pgs;
2389                m.rx_pg_sz = p->rx_pg_size;
2390                m.rx_num_pg = p->rx_num_pgs;
2391                m.pm_total = p->pmtx_size + p->chan_rx_size * p->nchan;
2392                if (copy_to_user(useraddr, &m, sizeof(m)))
2393                        return -EFAULT;
2394                break;
2395        }
2396        case CHELSIO_SET_PM:{
2397                struct ch_pm m;
2398                struct tp_params *p = &adapter->params.tp;
2399
2400                if (!is_offload(adapter))
2401                        return -EOPNOTSUPP;
2402                if (!capable(CAP_NET_ADMIN))
2403                        return -EPERM;
2404                if (adapter->flags & FULL_INIT_DONE)
2405                        return -EBUSY;
2406                if (copy_from_user(&m, useraddr, sizeof(m)))
2407                        return -EFAULT;
2408                if (!is_power_of_2(m.rx_pg_sz) ||
2409                        !is_power_of_2(m.tx_pg_sz))
2410                        return -EINVAL; /* not power of 2 */
2411                if (!(m.rx_pg_sz & 0x14000))
2412                        return -EINVAL; /* not 16KB or 64KB */
2413                if (!(m.tx_pg_sz & 0x1554000))
2414                        return -EINVAL;
2415                if (m.tx_num_pg == -1)
2416                        m.tx_num_pg = p->tx_num_pgs;
2417                if (m.rx_num_pg == -1)
2418                        m.rx_num_pg = p->rx_num_pgs;
2419                if (m.tx_num_pg % 24 || m.rx_num_pg % 24)
2420                        return -EINVAL;
2421                if (m.rx_num_pg * m.rx_pg_sz > p->chan_rx_size ||
2422                        m.tx_num_pg * m.tx_pg_sz > p->chan_tx_size)
2423                        return -EINVAL;
2424                p->rx_pg_size = m.rx_pg_sz;
2425                p->tx_pg_size = m.tx_pg_sz;
2426                p->rx_num_pgs = m.rx_num_pg;
2427                p->tx_num_pgs = m.tx_num_pg;
2428                break;
2429        }
2430        case CHELSIO_GET_MEM:{
2431                struct ch_mem_range t;
2432                struct mc7 *mem;
2433                u64 buf[32];
2434
2435                if (!is_offload(adapter))
2436                        return -EOPNOTSUPP;
2437                if (!(adapter->flags & FULL_INIT_DONE))
2438                        return -EIO;    /* need the memory controllers */
2439                if (copy_from_user(&t, useraddr, sizeof(t)))
2440                        return -EFAULT;
2441                if ((t.addr & 7) || (t.len & 7))
2442                        return -EINVAL;
2443                if (t.mem_id == MEM_CM)
2444                        mem = &adapter->cm;
2445                else if (t.mem_id == MEM_PMRX)
2446                        mem = &adapter->pmrx;
2447                else if (t.mem_id == MEM_PMTX)
2448                        mem = &adapter->pmtx;
2449                else
2450                        return -EINVAL;
2451
2452                /*
2453                 * Version scheme:
2454                 * bits 0..9: chip version
2455                 * bits 10..15: chip revision
2456                 */
2457                t.version = 3 | (adapter->params.rev << 10);
2458                if (copy_to_user(useraddr, &t, sizeof(t)))
2459                        return -EFAULT;
2460
2461                /*
2462                 * Read 256 bytes at a time as len can be large and we don't
2463                 * want to use huge intermediate buffers.
2464                 */
2465                useraddr += sizeof(t);  /* advance to start of buffer */
2466                while (t.len) {
2467                        unsigned int chunk =
2468                                min_t(unsigned int, t.len, sizeof(buf));
2469
2470                        ret =
2471                                t3_mc7_bd_read(mem, t.addr / 8, chunk / 8,
2472                                                buf);
2473                        if (ret)
2474                                return ret;
2475                        if (copy_to_user(useraddr, buf, chunk))
2476                                return -EFAULT;
2477                        useraddr += chunk;
2478                        t.addr += chunk;
2479                        t.len -= chunk;
2480                }
2481                break;
2482        }
2483        case CHELSIO_SET_TRACE_FILTER:{
2484                struct ch_trace t;
2485                const struct trace_params *tp;
2486
2487                if (!capable(CAP_NET_ADMIN))
2488                        return -EPERM;
2489                if (!offload_running(adapter))
2490                        return -EAGAIN;
2491                if (copy_from_user(&t, useraddr, sizeof(t)))
2492                        return -EFAULT;
2493
2494                tp = (const struct trace_params *)&t.sip;
2495                if (t.config_tx)
2496                        t3_config_trace_filter(adapter, tp, 0,
2497                                                t.invert_match,
2498                                                t.trace_tx);
2499                if (t.config_rx)
2500                        t3_config_trace_filter(adapter, tp, 1,
2501                                                t.invert_match,
2502                                                t.trace_rx);
2503                break;
2504        }
2505        default:
2506                return -EOPNOTSUPP;
2507        }
2508        return 0;
2509}
2510
2511static int cxgb_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
2512{
2513        struct mii_ioctl_data *data = if_mii(req);
2514        struct port_info *pi = netdev_priv(dev);
2515        struct adapter *adapter = pi->adapter;
2516
2517        switch (cmd) {
2518        case SIOCGMIIREG:
2519        case SIOCSMIIREG:
2520                /* Convert phy_id from older PRTAD/DEVAD format */
2521                if (is_10G(adapter) &&
2522                    !mdio_phy_id_is_c45(data->phy_id) &&
2523                    (data->phy_id & 0x1f00) &&
2524                    !(data->phy_id & 0xe0e0))
2525                        data->phy_id = mdio_phy_id_c45(data->phy_id >> 8,
2526                                                       data->phy_id & 0x1f);
2527                /* FALLTHRU */
2528        case SIOCGMIIPHY:
2529                return mdio_mii_ioctl(&pi->phy.mdio, data, cmd);
2530        case SIOCCHIOCTL:
2531                return cxgb_extension_ioctl(dev, req->ifr_data);
2532        default:
2533                return -EOPNOTSUPP;
2534        }
2535}
2536
2537static int cxgb_change_mtu(struct net_device *dev, int new_mtu)
2538{
2539        struct port_info *pi = netdev_priv(dev);
2540        struct adapter *adapter = pi->adapter;
2541        int ret;
2542
2543        if ((ret = t3_mac_set_mtu(&pi->mac, new_mtu)))
2544                return ret;
2545        dev->mtu = new_mtu;
2546        init_port_mtus(adapter);
2547        if (adapter->params.rev == 0 && offload_running(adapter))
2548                t3_load_mtus(adapter, adapter->params.mtus,
2549                             adapter->params.a_wnd, adapter->params.b_wnd,
2550                             adapter->port[0]->mtu);
2551        return 0;
2552}
2553
2554static int cxgb_set_mac_addr(struct net_device *dev, void *p)
2555{
2556        struct port_info *pi = netdev_priv(dev);
2557        struct adapter *adapter = pi->adapter;
2558        struct sockaddr *addr = p;
2559
2560        if (!is_valid_ether_addr(addr->sa_data))
2561                return -EADDRNOTAVAIL;
2562
2563        memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
2564        t3_mac_set_address(&pi->mac, LAN_MAC_IDX, dev->dev_addr);
2565        if (offload_running(adapter))
2566                write_smt_entry(adapter, pi->port_id);
2567        return 0;
2568}
2569
2570static netdev_features_t cxgb_fix_features(struct net_device *dev,
2571        netdev_features_t features)
2572{
2573        /*
2574         * Since there is no support for separate rx/tx vlan accel
2575         * enable/disable make sure tx flag is always in same state as rx.
2576         */
2577        if (features & NETIF_F_HW_VLAN_CTAG_RX)
2578                features |= NETIF_F_HW_VLAN_CTAG_TX;
2579        else
2580                features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2581
2582        return features;
2583}
2584
2585static int cxgb_set_features(struct net_device *dev, netdev_features_t features)
2586{
2587        netdev_features_t changed = dev->features ^ features;
2588
2589        if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2590                cxgb_vlan_mode(dev, features);
2591
2592        return 0;
2593}
2594
2595#ifdef CONFIG_NET_POLL_CONTROLLER
2596static void cxgb_netpoll(struct net_device *dev)
2597{
2598        struct port_info *pi = netdev_priv(dev);
2599        struct adapter *adapter = pi->adapter;
2600        int qidx;
2601
2602        for (qidx = pi->first_qset; qidx < pi->first_qset + pi->nqsets; qidx++) {
2603                struct sge_qset *qs = &adapter->sge.qs[qidx];
2604                void *source;
2605
2606                if (adapter->flags & USING_MSIX)
2607                        source = qs;
2608                else
2609                        source = adapter;
2610
2611                t3_intr_handler(adapter, qs->rspq.polling) (0, source);
2612        }
2613}
2614#endif
2615
2616/*
2617 * Periodic accumulation of MAC statistics.
2618 */
2619static void mac_stats_update(struct adapter *adapter)
2620{
2621        int i;
2622
2623        for_each_port(adapter, i) {
2624                struct net_device *dev = adapter->port[i];
2625                struct port_info *p = netdev_priv(dev);
2626
2627                if (netif_running(dev)) {
2628                        spin_lock(&adapter->stats_lock);
2629                        t3_mac_update_stats(&p->mac);
2630                        spin_unlock(&adapter->stats_lock);
2631                }
2632        }
2633}
2634
2635static void check_link_status(struct adapter *adapter)
2636{
2637        int i;
2638
2639        for_each_port(adapter, i) {
2640                struct net_device *dev = adapter->port[i];
2641                struct port_info *p = netdev_priv(dev);
2642                int link_fault;
2643
2644                spin_lock_irq(&adapter->work_lock);
2645                link_fault = p->link_fault;
2646                spin_unlock_irq(&adapter->work_lock);
2647
2648                if (link_fault) {
2649                        t3_link_fault(adapter, i);
2650                        continue;
2651                }
2652
2653                if (!(p->phy.caps & SUPPORTED_IRQ) && netif_running(dev)) {
2654                        t3_xgm_intr_disable(adapter, i);
2655                        t3_read_reg(adapter, A_XGM_INT_STATUS + p->mac.offset);
2656
2657                        t3_link_changed(adapter, i);
2658                        t3_xgm_intr_enable(adapter, i);
2659                }
2660        }
2661}
2662
2663static void check_t3b2_mac(struct adapter *adapter)
2664{
2665        int i;
2666
2667        if (!rtnl_trylock())    /* synchronize with ifdown */
2668                return;
2669
2670        for_each_port(adapter, i) {
2671                struct net_device *dev = adapter->port[i];
2672                struct port_info *p = netdev_priv(dev);
2673                int status;
2674
2675                if (!netif_running(dev))
2676                        continue;
2677
2678                status = 0;
2679                if (netif_running(dev) && netif_carrier_ok(dev))
2680                        status = t3b2_mac_watchdog_task(&p->mac);
2681                if (status == 1)
2682                        p->mac.stats.num_toggled++;
2683                else if (status == 2) {
2684                        struct cmac *mac = &p->mac;
2685
2686                        t3_mac_set_mtu(mac, dev->mtu);
2687                        t3_mac_set_address(mac, LAN_MAC_IDX, dev->dev_addr);
2688                        cxgb_set_rxmode(dev);
2689                        t3_link_start(&p->phy, mac, &p->link_config);
2690                        t3_mac_enable(mac, MAC_DIRECTION_RX | MAC_DIRECTION_TX);
2691                        t3_port_intr_enable(adapter, p->port_id);
2692                        p->mac.stats.num_resets++;
2693                }
2694        }
2695        rtnl_unlock();
2696}
2697
2698
2699static void t3_adap_check_task(struct work_struct *work)
2700{
2701        struct adapter *adapter = container_of(work, struct adapter,
2702                                               adap_check_task.work);
2703        const struct adapter_params *p = &adapter->params;
2704        int port;
2705        unsigned int v, status, reset;
2706
2707        adapter->check_task_cnt++;
2708
2709        check_link_status(adapter);
2710
2711        /* Accumulate MAC stats if needed */
2712        if (!p->linkpoll_period ||
2713            (adapter->check_task_cnt * p->linkpoll_period) / 10 >=
2714            p->stats_update_period) {
2715                mac_stats_update(adapter);
2716                adapter->check_task_cnt = 0;
2717        }
2718
2719        if (p->rev == T3_REV_B2)
2720                check_t3b2_mac(adapter);
2721
2722        /*
2723         * Scan the XGMAC's to check for various conditions which we want to
2724         * monitor in a periodic polling manner rather than via an interrupt
2725         * condition.  This is used for conditions which would otherwise flood
2726         * the system with interrupts and we only really need to know that the
2727         * conditions are "happening" ...  For each condition we count the
2728         * detection of the condition and reset it for the next polling loop.
2729         */
2730        for_each_port(adapter, port) {
2731                struct cmac *mac =  &adap2pinfo(adapter, port)->mac;
2732                u32 cause;
2733
2734                cause = t3_read_reg(adapter, A_XGM_INT_CAUSE + mac->offset);
2735                reset = 0;
2736                if (cause & F_RXFIFO_OVERFLOW) {
2737                        mac->stats.rx_fifo_ovfl++;
2738                        reset |= F_RXFIFO_OVERFLOW;
2739                }
2740
2741                t3_write_reg(adapter, A_XGM_INT_CAUSE + mac->offset, reset);
2742        }
2743
2744        /*
2745         * We do the same as above for FL_EMPTY interrupts.
2746         */
2747        status = t3_read_reg(adapter, A_SG_INT_CAUSE);
2748        reset = 0;
2749
2750        if (status & F_FLEMPTY) {
2751                struct sge_qset *qs = &adapter->sge.qs[0];
2752                int i = 0;
2753
2754                reset |= F_FLEMPTY;
2755
2756                v = (t3_read_reg(adapter, A_SG_RSPQ_FL_STATUS) >> S_FL0EMPTY) &
2757                    0xffff;
2758
2759                while (v) {
2760                        qs->fl[i].empty += (v & 1);
2761                        if (i)
2762                                qs++;
2763                        i ^= 1;
2764                        v >>= 1;
2765                }
2766        }
2767
2768        t3_write_reg(adapter, A_SG_INT_CAUSE, reset);
2769
2770        /* Schedule the next check update if any port is active. */
2771        spin_lock_irq(&adapter->work_lock);
2772        if (adapter->open_device_map & PORT_MASK)
2773                schedule_chk_task(adapter);
2774        spin_unlock_irq(&adapter->work_lock);
2775}
2776
2777static void db_full_task(struct work_struct *work)
2778{
2779        struct adapter *adapter = container_of(work, struct adapter,
2780                                               db_full_task);
2781
2782        cxgb3_event_notify(&adapter->tdev, OFFLOAD_DB_FULL, 0);
2783}
2784
2785static void db_empty_task(struct work_struct *work)
2786{
2787        struct adapter *adapter = container_of(work, struct adapter,
2788                                               db_empty_task);
2789
2790        cxgb3_event_notify(&adapter->tdev, OFFLOAD_DB_EMPTY, 0);
2791}
2792
2793static void db_drop_task(struct work_struct *work)
2794{
2795        struct adapter *adapter = container_of(work, struct adapter,
2796                                               db_drop_task);
2797        unsigned long delay = 1000;
2798        unsigned short r;
2799
2800        cxgb3_event_notify(&adapter->tdev, OFFLOAD_DB_DROP, 0);
2801
2802        /*
2803         * Sleep a while before ringing the driver qset dbs.
2804         * The delay is between 1000-2023 usecs.
2805         */
2806        get_random_bytes(&r, 2);
2807        delay += r & 1023;
2808        set_current_state(TASK_UNINTERRUPTIBLE);
2809        schedule_timeout(usecs_to_jiffies(delay));
2810        ring_dbs(adapter);
2811}
2812
2813/*
2814 * Processes external (PHY) interrupts in process context.
2815 */
2816static void ext_intr_task(struct work_struct *work)
2817{
2818        struct adapter *adapter = container_of(work, struct adapter,
2819                                               ext_intr_handler_task);
2820        int i;
2821
2822        /* Disable link fault interrupts */
2823        for_each_port(adapter, i) {
2824                struct net_device *dev = adapter->port[i];
2825                struct port_info *p = netdev_priv(dev);
2826
2827                t3_xgm_intr_disable(adapter, i);
2828                t3_read_reg(adapter, A_XGM_INT_STATUS + p->mac.offset);
2829        }
2830
2831        /* Re-enable link fault interrupts */
2832        t3_phy_intr_handler(adapter);
2833
2834        for_each_port(adapter, i)
2835                t3_xgm_intr_enable(adapter, i);
2836
2837        /* Now reenable external interrupts */
2838        spin_lock_irq(&adapter->work_lock);
2839        if (adapter->slow_intr_mask) {
2840                adapter->slow_intr_mask |= F_T3DBG;
2841                t3_write_reg(adapter, A_PL_INT_CAUSE0, F_T3DBG);
2842                t3_write_reg(adapter, A_PL_INT_ENABLE0,
2843                             adapter->slow_intr_mask);
2844        }
2845        spin_unlock_irq(&adapter->work_lock);
2846}
2847
2848/*
2849 * Interrupt-context handler for external (PHY) interrupts.
2850 */
2851void t3_os_ext_intr_handler(struct adapter *adapter)
2852{
2853        /*
2854         * Schedule a task to handle external interrupts as they may be slow
2855         * and we use a mutex to protect MDIO registers.  We disable PHY
2856         * interrupts in the meantime and let the task reenable them when
2857         * it's done.
2858         */
2859        spin_lock(&adapter->work_lock);
2860        if (adapter->slow_intr_mask) {
2861                adapter->slow_intr_mask &= ~F_T3DBG;
2862                t3_write_reg(adapter, A_PL_INT_ENABLE0,
2863                             adapter->slow_intr_mask);
2864                queue_work(cxgb3_wq, &adapter->ext_intr_handler_task);
2865        }
2866        spin_unlock(&adapter->work_lock);
2867}
2868
2869void t3_os_link_fault_handler(struct adapter *adapter, int port_id)
2870{
2871        struct net_device *netdev = adapter->port[port_id];
2872        struct port_info *pi = netdev_priv(netdev);
2873
2874        spin_lock(&adapter->work_lock);
2875        pi->link_fault = 1;
2876        spin_unlock(&adapter->work_lock);
2877}
2878
2879static int t3_adapter_error(struct adapter *adapter, int reset, int on_wq)
2880{
2881        int i, ret = 0;
2882
2883        if (is_offload(adapter) &&
2884            test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map)) {
2885                cxgb3_event_notify(&adapter->tdev, OFFLOAD_STATUS_DOWN, 0);
2886                offload_close(&adapter->tdev);
2887        }
2888
2889        /* Stop all ports */
2890        for_each_port(adapter, i) {
2891                struct net_device *netdev = adapter->port[i];
2892
2893                if (netif_running(netdev))
2894                        __cxgb_close(netdev, on_wq);
2895        }
2896
2897        /* Stop SGE timers */
2898        t3_stop_sge_timers(adapter);
2899
2900        adapter->flags &= ~FULL_INIT_DONE;
2901
2902        if (reset)
2903                ret = t3_reset_adapter(adapter);
2904
2905        pci_disable_device(adapter->pdev);
2906
2907        return ret;
2908}
2909
2910static int t3_reenable_adapter(struct adapter *adapter)
2911{
2912        if (pci_enable_device(adapter->pdev)) {
2913                dev_err(&adapter->pdev->dev,
2914                        "Cannot re-enable PCI device after reset.\n");
2915                goto err;
2916        }
2917        pci_set_master(adapter->pdev);
2918        pci_restore_state(adapter->pdev);
2919        pci_save_state(adapter->pdev);
2920
2921        /* Free sge resources */
2922        t3_free_sge_resources(adapter);
2923
2924        if (t3_replay_prep_adapter(adapter))
2925                goto err;
2926
2927        return 0;
2928err:
2929        return -1;
2930}
2931
2932static void t3_resume_ports(struct adapter *adapter)
2933{
2934        int i;
2935
2936        /* Restart the ports */
2937        for_each_port(adapter, i) {
2938                struct net_device *netdev = adapter->port[i];
2939
2940                if (netif_running(netdev)) {
2941                        if (cxgb_open(netdev)) {
2942                                dev_err(&adapter->pdev->dev,
2943                                        "can't bring device back up"
2944                                        " after reset\n");
2945                                continue;
2946                        }
2947                }
2948        }
2949
2950        if (is_offload(adapter) && !ofld_disable)
2951                cxgb3_event_notify(&adapter->tdev, OFFLOAD_STATUS_UP, 0);
2952}
2953
2954/*
2955 * processes a fatal error.
2956 * Bring the ports down, reset the chip, bring the ports back up.
2957 */
2958static void fatal_error_task(struct work_struct *work)
2959{
2960        struct adapter *adapter = container_of(work, struct adapter,
2961                                               fatal_error_handler_task);
2962        int err = 0;
2963
2964        rtnl_lock();
2965        err = t3_adapter_error(adapter, 1, 1);
2966        if (!err)
2967                err = t3_reenable_adapter(adapter);
2968        if (!err)
2969                t3_resume_ports(adapter);
2970
2971        CH_ALERT(adapter, "adapter reset %s\n", err ? "failed" : "succeeded");
2972        rtnl_unlock();
2973}
2974
2975void t3_fatal_err(struct adapter *adapter)
2976{
2977        unsigned int fw_status[4];
2978
2979        if (adapter->flags & FULL_INIT_DONE) {
2980                t3_sge_stop(adapter);
2981                t3_write_reg(adapter, A_XGM_TX_CTRL, 0);
2982                t3_write_reg(adapter, A_XGM_RX_CTRL, 0);
2983                t3_write_reg(adapter, XGM_REG(A_XGM_TX_CTRL, 1), 0);
2984                t3_write_reg(adapter, XGM_REG(A_XGM_RX_CTRL, 1), 0);
2985
2986                spin_lock(&adapter->work_lock);
2987                t3_intr_disable(adapter);
2988                queue_work(cxgb3_wq, &adapter->fatal_error_handler_task);
2989                spin_unlock(&adapter->work_lock);
2990        }
2991        CH_ALERT(adapter, "encountered fatal error, operation suspended\n");
2992        if (!t3_cim_ctl_blk_read(adapter, 0xa0, 4, fw_status))
2993                CH_ALERT(adapter, "FW status: 0x%x, 0x%x, 0x%x, 0x%x\n",
2994                         fw_status[0], fw_status[1],
2995                         fw_status[2], fw_status[3]);
2996}
2997
2998/**
2999 * t3_io_error_detected - called when PCI error is detected
3000 * @pdev: Pointer to PCI device
3001 * @state: The current pci connection state
3002 *
3003 * This function is called after a PCI bus error affecting
3004 * this device has been detected.
3005 */
3006static pci_ers_result_t t3_io_error_detected(struct pci_dev *pdev,
3007                                             pci_channel_state_t state)
3008{
3009        struct adapter *adapter = pci_get_drvdata(pdev);
3010
3011        if (state == pci_channel_io_perm_failure)
3012                return PCI_ERS_RESULT_DISCONNECT;
3013
3014        t3_adapter_error(adapter, 0, 0);
3015
3016        /* Request a slot reset. */
3017        return PCI_ERS_RESULT_NEED_RESET;
3018}
3019
3020/**
3021 * t3_io_slot_reset - called after the pci bus has been reset.
3022 * @pdev: Pointer to PCI device
3023 *
3024 * Restart the card from scratch, as if from a cold-boot.
3025 */
3026static pci_ers_result_t t3_io_slot_reset(struct pci_dev *pdev)
3027{
3028        struct adapter *adapter = pci_get_drvdata(pdev);
3029
3030        if (!t3_reenable_adapter(adapter))
3031                return PCI_ERS_RESULT_RECOVERED;
3032
3033        return PCI_ERS_RESULT_DISCONNECT;
3034}
3035
3036/**
3037 * t3_io_resume - called when traffic can start flowing again.
3038 * @pdev: Pointer to PCI device
3039 *
3040 * This callback is called when the error recovery driver tells us that
3041 * its OK to resume normal operation.
3042 */
3043static void t3_io_resume(struct pci_dev *pdev)
3044{
3045        struct adapter *adapter = pci_get_drvdata(pdev);
3046
3047        CH_ALERT(adapter, "adapter recovering, PEX ERR 0x%x\n",
3048                 t3_read_reg(adapter, A_PCIE_PEX_ERR));
3049
3050        rtnl_lock();
3051        t3_resume_ports(adapter);
3052        rtnl_unlock();
3053}
3054
3055static const struct pci_error_handlers t3_err_handler = {
3056        .error_detected = t3_io_error_detected,
3057        .slot_reset = t3_io_slot_reset,
3058        .resume = t3_io_resume,
3059};
3060
3061/*
3062 * Set the number of qsets based on the number of CPUs and the number of ports,
3063 * not to exceed the number of available qsets, assuming there are enough qsets
3064 * per port in HW.
3065 */
3066static void set_nqsets(struct adapter *adap)
3067{
3068        int i, j = 0;
3069        int num_cpus = netif_get_num_default_rss_queues();
3070        int hwports = adap->params.nports;
3071        int nqsets = adap->msix_nvectors - 1;
3072
3073        if (adap->params.rev > 0 && adap->flags & USING_MSIX) {
3074                if (hwports == 2 &&
3075                    (hwports * nqsets > SGE_QSETS ||
3076                     num_cpus >= nqsets / hwports))
3077                        nqsets /= hwports;
3078                if (nqsets > num_cpus)
3079                        nqsets = num_cpus;
3080                if (nqsets < 1 || hwports == 4)
3081                        nqsets = 1;
3082        } else
3083                nqsets = 1;
3084
3085        for_each_port(adap, i) {
3086                struct port_info *pi = adap2pinfo(adap, i);
3087
3088                pi->first_qset = j;
3089                pi->nqsets = nqsets;
3090                j = pi->first_qset + nqsets;
3091
3092                dev_info(&adap->pdev->dev,
3093                         "Port %d using %d queue sets.\n", i, nqsets);
3094        }
3095}
3096
3097static int cxgb_enable_msix(struct adapter *adap)
3098{
3099        struct msix_entry entries[SGE_QSETS + 1];
3100        int vectors;
3101        int i;
3102
3103        vectors = ARRAY_SIZE(entries);
3104        for (i = 0; i < vectors; ++i)
3105                entries[i].entry = i;
3106
3107        vectors = pci_enable_msix_range(adap->pdev, entries,
3108                                        adap->params.nports + 1, vectors);
3109        if (vectors < 0)
3110                return vectors;
3111
3112        for (i = 0; i < vectors; ++i)
3113                adap->msix_info[i].vec = entries[i].vector;
3114        adap->msix_nvectors = vectors;
3115
3116        return 0;
3117}
3118
3119static void print_port_info(struct adapter *adap, const struct adapter_info *ai)
3120{
3121        static const char *pci_variant[] = {
3122                "PCI", "PCI-X", "PCI-X ECC", "PCI-X 266", "PCI Express"
3123        };
3124
3125        int i;
3126        char buf[80];
3127
3128        if (is_pcie(adap))
3129                snprintf(buf, sizeof(buf), "%s x%d",
3130                         pci_variant[adap->params.pci.variant],
3131                         adap->params.pci.width);
3132        else
3133                snprintf(buf, sizeof(buf), "%s %dMHz/%d-bit",
3134                         pci_variant[adap->params.pci.variant],
3135                         adap->params.pci.speed, adap->params.pci.width);
3136
3137        for_each_port(adap, i) {
3138                struct net_device *dev = adap->port[i];
3139                const struct port_info *pi = netdev_priv(dev);
3140
3141                if (!test_bit(i, &adap->registered_device_map))
3142                        continue;
3143                netdev_info(dev, "%s %s %sNIC (rev %d) %s%s\n",
3144                            ai->desc, pi->phy.desc,
3145                            is_offload(adap) ? "R" : "", adap->params.rev, buf,
3146                            (adap->flags & USING_MSIX) ? " MSI-X" :
3147                            (adap->flags & USING_MSI) ? " MSI" : "");
3148                if (adap->name == dev->name && adap->params.vpd.mclk)
3149                        pr_info("%s: %uMB CM, %uMB PMTX, %uMB PMRX, S/N: %s\n",
3150                               adap->name, t3_mc7_size(&adap->cm) >> 20,
3151                               t3_mc7_size(&adap->pmtx) >> 20,
3152                               t3_mc7_size(&adap->pmrx) >> 20,
3153                               adap->params.vpd.sn);
3154        }
3155}
3156
3157static const struct net_device_ops cxgb_netdev_ops = {
3158        .ndo_open               = cxgb_open,
3159        .ndo_stop               = cxgb_close,
3160        .ndo_start_xmit         = t3_eth_xmit,
3161        .ndo_get_stats          = cxgb_get_stats,
3162        .ndo_validate_addr      = eth_validate_addr,
3163        .ndo_set_rx_mode        = cxgb_set_rxmode,
3164        .ndo_do_ioctl           = cxgb_ioctl,
3165        .ndo_change_mtu         = cxgb_change_mtu,
3166        .ndo_set_mac_address    = cxgb_set_mac_addr,
3167        .ndo_fix_features       = cxgb_fix_features,
3168        .ndo_set_features       = cxgb_set_features,
3169#ifdef CONFIG_NET_POLL_CONTROLLER
3170        .ndo_poll_controller    = cxgb_netpoll,
3171#endif
3172};
3173
3174static void cxgb3_init_iscsi_mac(struct net_device *dev)
3175{
3176        struct port_info *pi = netdev_priv(dev);
3177
3178        memcpy(pi->iscsic.mac_addr, dev->dev_addr, ETH_ALEN);
3179        pi->iscsic.mac_addr[3] |= 0x80;
3180}
3181
3182#define TSO_FLAGS (NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN)
3183#define VLAN_FEAT (NETIF_F_SG | NETIF_F_IP_CSUM | TSO_FLAGS | \
3184                        NETIF_F_IPV6_CSUM | NETIF_F_HIGHDMA)
3185static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
3186{
3187        int i, err, pci_using_dac = 0;
3188        resource_size_t mmio_start, mmio_len;
3189        const struct adapter_info *ai;
3190        struct adapter *adapter = NULL;
3191        struct port_info *pi;
3192
3193        if (!cxgb3_wq) {
3194                cxgb3_wq = create_singlethread_workqueue(DRV_NAME);
3195                if (!cxgb3_wq) {
3196                        pr_err("cannot initialize work queue\n");
3197                        return -ENOMEM;
3198                }
3199        }
3200
3201        err = pci_enable_device(pdev);
3202        if (err) {
3203                dev_err(&pdev->dev, "cannot enable PCI device\n");
3204                goto out;
3205        }
3206
3207        err = pci_request_regions(pdev, DRV_NAME);
3208        if (err) {
3209                /* Just info, some other driver may have claimed the device. */
3210                dev_info(&pdev->dev, "cannot obtain PCI resources\n");
3211                goto out_disable_device;
3212        }
3213
3214        if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
3215                pci_using_dac = 1;
3216                err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
3217                if (err) {
3218                        dev_err(&pdev->dev, "unable to obtain 64-bit DMA for "
3219                               "coherent allocations\n");
3220                        goto out_release_regions;
3221                }
3222        } else if ((err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) != 0) {
3223                dev_err(&pdev->dev, "no usable DMA configuration\n");
3224                goto out_release_regions;
3225        }
3226
3227        pci_set_master(pdev);
3228        pci_save_state(pdev);
3229
3230        mmio_start = pci_resource_start(pdev, 0);
3231        mmio_len = pci_resource_len(pdev, 0);
3232        ai = t3_get_adapter_info(ent->driver_data);
3233
3234        adapter = kzalloc(sizeof(*adapter), GFP_KERNEL);
3235        if (!adapter) {
3236                err = -ENOMEM;
3237                goto out_release_regions;
3238        }
3239
3240        adapter->nofail_skb =
3241                alloc_skb(sizeof(struct cpl_set_tcb_field), GFP_KERNEL);
3242        if (!adapter->nofail_skb) {
3243                dev_err(&pdev->dev, "cannot allocate nofail buffer\n");
3244                err = -ENOMEM;
3245                goto out_free_adapter;
3246        }
3247
3248        adapter->regs = ioremap_nocache(mmio_start, mmio_len);
3249        if (!adapter->regs) {
3250                dev_err(&pdev->dev, "cannot map device registers\n");
3251                err = -ENOMEM;
3252                goto out_free_adapter;
3253        }
3254
3255        adapter->pdev = pdev;
3256        adapter->name = pci_name(pdev);
3257        adapter->msg_enable = dflt_msg_enable;
3258        adapter->mmio_len = mmio_len;
3259
3260        mutex_init(&adapter->mdio_lock);
3261        spin_lock_init(&adapter->work_lock);
3262        spin_lock_init(&adapter->stats_lock);
3263
3264        INIT_LIST_HEAD(&adapter->adapter_list);
3265        INIT_WORK(&adapter->ext_intr_handler_task, ext_intr_task);
3266        INIT_WORK(&adapter->fatal_error_handler_task, fatal_error_task);
3267
3268        INIT_WORK(&adapter->db_full_task, db_full_task);
3269        INIT_WORK(&adapter->db_empty_task, db_empty_task);
3270        INIT_WORK(&adapter->db_drop_task, db_drop_task);
3271
3272        INIT_DELAYED_WORK(&adapter->adap_check_task, t3_adap_check_task);
3273
3274        for (i = 0; i < ai->nports0 + ai->nports1; ++i) {
3275                struct net_device *netdev;
3276
3277                netdev = alloc_etherdev_mq(sizeof(struct port_info), SGE_QSETS);
3278                if (!netdev) {
3279                        err = -ENOMEM;
3280                        goto out_free_dev;
3281                }
3282
3283                SET_NETDEV_DEV(netdev, &pdev->dev);
3284
3285                adapter->port[i] = netdev;
3286                pi = netdev_priv(netdev);
3287                pi->adapter = adapter;
3288                pi->port_id = i;
3289                netif_carrier_off(netdev);
3290                netdev->irq = pdev->irq;
3291                netdev->mem_start = mmio_start;
3292                netdev->mem_end = mmio_start + mmio_len - 1;
3293                netdev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM |
3294                        NETIF_F_TSO | NETIF_F_RXCSUM | NETIF_F_HW_VLAN_CTAG_RX;
3295                netdev->features |= netdev->hw_features |
3296                                    NETIF_F_HW_VLAN_CTAG_TX;
3297                netdev->vlan_features |= netdev->features & VLAN_FEAT;
3298                if (pci_using_dac)
3299                        netdev->features |= NETIF_F_HIGHDMA;
3300
3301                netdev->netdev_ops = &cxgb_netdev_ops;
3302                netdev->ethtool_ops = &cxgb_ethtool_ops;
3303                netdev->min_mtu = 81;
3304                netdev->max_mtu = ETH_MAX_MTU;
3305                netdev->dev_port = pi->port_id;
3306        }
3307
3308        pci_set_drvdata(pdev, adapter);
3309        if (t3_prep_adapter(adapter, ai, 1) < 0) {
3310                err = -ENODEV;
3311                goto out_free_dev;
3312        }
3313
3314        /*
3315         * The card is now ready to go.  If any errors occur during device
3316         * registration we do not fail the whole card but rather proceed only
3317         * with the ports we manage to register successfully.  However we must
3318         * register at least one net device.
3319         */
3320        for_each_port(adapter, i) {
3321                err = register_netdev(adapter->port[i]);
3322                if (err)
3323                        dev_warn(&pdev->dev,
3324                                 "cannot register net device %s, skipping\n",
3325                                 adapter->port[i]->name);
3326                else {
3327                        /*
3328                         * Change the name we use for messages to the name of
3329                         * the first successfully registered interface.
3330                         */
3331                        if (!adapter->registered_device_map)
3332                                adapter->name = adapter->port[i]->name;
3333
3334                        __set_bit(i, &adapter->registered_device_map);
3335                }
3336        }
3337        if (!adapter->registered_device_map) {
3338                dev_err(&pdev->dev, "could not register any net devices\n");
3339                goto out_free_dev;
3340        }
3341
3342        for_each_port(adapter, i)
3343                cxgb3_init_iscsi_mac(adapter->port[i]);
3344
3345        /* Driver's ready. Reflect it on LEDs */
3346        t3_led_ready(adapter);
3347
3348        if (is_offload(adapter)) {
3349                __set_bit(OFFLOAD_DEVMAP_BIT, &adapter->registered_device_map);
3350                cxgb3_adapter_ofld(adapter);
3351        }
3352
3353        /* See what interrupts we'll be using */
3354        if (msi > 1 && cxgb_enable_msix(adapter) == 0)
3355                adapter->flags |= USING_MSIX;
3356        else if (msi > 0 && pci_enable_msi(pdev) == 0)
3357                adapter->flags |= USING_MSI;
3358
3359        set_nqsets(adapter);
3360
3361        err = sysfs_create_group(&adapter->port[0]->dev.kobj,
3362                                 &cxgb3_attr_group);
3363        if (err) {
3364                dev_err(&pdev->dev, "cannot create sysfs group\n");
3365                goto out_close_led;
3366        }
3367
3368        print_port_info(adapter, ai);
3369        return 0;
3370
3371out_close_led:
3372        t3_set_reg_field(adapter, A_T3DBG_GPIO_EN, F_GPIO0_OUT_VAL, 0);
3373
3374out_free_dev:
3375        iounmap(adapter->regs);
3376        for (i = ai->nports0 + ai->nports1 - 1; i >= 0; --i)
3377                if (adapter->port[i])
3378                        free_netdev(adapter->port[i]);
3379
3380out_free_adapter:
3381        kfree(adapter);
3382
3383out_release_regions:
3384        pci_release_regions(pdev);
3385out_disable_device:
3386        pci_disable_device(pdev);
3387out:
3388        return err;
3389}
3390
3391static void remove_one(struct pci_dev *pdev)
3392{
3393        struct adapter *adapter = pci_get_drvdata(pdev);
3394
3395        if (adapter) {
3396                int i;
3397
3398                t3_sge_stop(adapter);
3399                sysfs_remove_group(&adapter->port[0]->dev.kobj,
3400                                   &cxgb3_attr_group);
3401
3402                if (is_offload(adapter)) {
3403                        cxgb3_adapter_unofld(adapter);
3404                        if (test_bit(OFFLOAD_DEVMAP_BIT,
3405                                     &adapter->open_device_map))
3406                                offload_close(&adapter->tdev);
3407                }
3408
3409                for_each_port(adapter, i)
3410                    if (test_bit(i, &adapter->registered_device_map))
3411                        unregister_netdev(adapter->port[i]);
3412
3413                t3_stop_sge_timers(adapter);
3414                t3_free_sge_resources(adapter);
3415                cxgb_disable_msi(adapter);
3416
3417                for_each_port(adapter, i)
3418                        if (adapter->port[i])
3419                                free_netdev(adapter->port[i]);
3420
3421                iounmap(adapter->regs);
3422                if (adapter->nofail_skb)
3423                        kfree_skb(adapter->nofail_skb);
3424                kfree(adapter);
3425                pci_release_regions(pdev);
3426                pci_disable_device(pdev);
3427        }
3428}
3429
3430static struct pci_driver driver = {
3431        .name = DRV_NAME,
3432        .id_table = cxgb3_pci_tbl,
3433        .probe = init_one,
3434        .remove = remove_one,
3435        .err_handler = &t3_err_handler,
3436};
3437
3438static int __init cxgb3_init_module(void)
3439{
3440        int ret;
3441
3442        cxgb3_offload_init();
3443
3444        ret = pci_register_driver(&driver);
3445        return ret;
3446}
3447
3448static void __exit cxgb3_cleanup_module(void)
3449{
3450        pci_unregister_driver(&driver);
3451        if (cxgb3_wq)
3452                destroy_workqueue(cxgb3_wq);
3453}
3454
3455module_init(cxgb3_init_module);
3456module_exit(cxgb3_cleanup_module);
3457