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13#define DRV_NAME "DL2000/TC902x-based linux driver"
14#define DRV_VERSION "v1.19"
15#define DRV_RELDATE "2007/08/12"
16#include "dl2k.h"
17#include <linux/dma-mapping.h>
18
19#define dw32(reg, val) iowrite32(val, ioaddr + (reg))
20#define dw16(reg, val) iowrite16(val, ioaddr + (reg))
21#define dw8(reg, val) iowrite8(val, ioaddr + (reg))
22#define dr32(reg) ioread32(ioaddr + (reg))
23#define dr16(reg) ioread16(ioaddr + (reg))
24#define dr8(reg) ioread8(ioaddr + (reg))
25
26static char version[] =
27 KERN_INFO DRV_NAME " " DRV_VERSION " " DRV_RELDATE "\n";
28#define MAX_UNITS 8
29static int mtu[MAX_UNITS];
30static int vlan[MAX_UNITS];
31static int jumbo[MAX_UNITS];
32static char *media[MAX_UNITS];
33static int tx_flow=-1;
34static int rx_flow=-1;
35static int copy_thresh;
36static int rx_coalesce=10;
37static int rx_timeout=200;
38static int tx_coalesce=16;
39
40
41MODULE_AUTHOR ("Edward Peng");
42MODULE_DESCRIPTION ("D-Link DL2000-based Gigabit Ethernet Adapter");
43MODULE_LICENSE("GPL");
44module_param_array(mtu, int, NULL, 0);
45module_param_array(media, charp, NULL, 0);
46module_param_array(vlan, int, NULL, 0);
47module_param_array(jumbo, int, NULL, 0);
48module_param(tx_flow, int, 0);
49module_param(rx_flow, int, 0);
50module_param(copy_thresh, int, 0);
51module_param(rx_coalesce, int, 0);
52module_param(rx_timeout, int, 0);
53module_param(tx_coalesce, int, 0);
54
55
56
57#define DEFAULT_INTR (RxDMAComplete | HostError | IntRequested | TxDMAComplete| \
58 UpdateStats | LinkEvent)
59
60static void dl2k_enable_int(struct netdev_private *np)
61{
62 void __iomem *ioaddr = np->ioaddr;
63
64 dw16(IntEnable, DEFAULT_INTR);
65}
66
67static const int max_intrloop = 50;
68static const int multicast_filter_limit = 0x40;
69
70static int rio_open (struct net_device *dev);
71static void rio_timer (struct timer_list *t);
72static void rio_tx_timeout (struct net_device *dev, unsigned int txqueue);
73static netdev_tx_t start_xmit (struct sk_buff *skb, struct net_device *dev);
74static irqreturn_t rio_interrupt (int irq, void *dev_instance);
75static void rio_free_tx (struct net_device *dev, int irq);
76static void tx_error (struct net_device *dev, int tx_status);
77static int receive_packet (struct net_device *dev);
78static void rio_error (struct net_device *dev, int int_status);
79static void set_multicast (struct net_device *dev);
80static struct net_device_stats *get_stats (struct net_device *dev);
81static int clear_stats (struct net_device *dev);
82static int rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
83static int rio_close (struct net_device *dev);
84static int find_miiphy (struct net_device *dev);
85static int parse_eeprom (struct net_device *dev);
86static int read_eeprom (struct netdev_private *, int eep_addr);
87static int mii_wait_link (struct net_device *dev, int wait);
88static int mii_set_media (struct net_device *dev);
89static int mii_get_media (struct net_device *dev);
90static int mii_set_media_pcs (struct net_device *dev);
91static int mii_get_media_pcs (struct net_device *dev);
92static int mii_read (struct net_device *dev, int phy_addr, int reg_num);
93static int mii_write (struct net_device *dev, int phy_addr, int reg_num,
94 u16 data);
95
96static const struct ethtool_ops ethtool_ops;
97
98static const struct net_device_ops netdev_ops = {
99 .ndo_open = rio_open,
100 .ndo_start_xmit = start_xmit,
101 .ndo_stop = rio_close,
102 .ndo_get_stats = get_stats,
103 .ndo_validate_addr = eth_validate_addr,
104 .ndo_set_mac_address = eth_mac_addr,
105 .ndo_set_rx_mode = set_multicast,
106 .ndo_do_ioctl = rio_ioctl,
107 .ndo_tx_timeout = rio_tx_timeout,
108};
109
110static int
111rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)
112{
113 struct net_device *dev;
114 struct netdev_private *np;
115 static int card_idx;
116 int chip_idx = ent->driver_data;
117 int err, irq;
118 void __iomem *ioaddr;
119 static int version_printed;
120 void *ring_space;
121 dma_addr_t ring_dma;
122
123 mark_hardware_unsupported(DRV_NAME);
124
125 if (!version_printed++)
126 printk ("%s", version);
127
128 err = pci_enable_device (pdev);
129 if (err)
130 return err;
131
132 irq = pdev->irq;
133 err = pci_request_regions (pdev, "dl2k");
134 if (err)
135 goto err_out_disable;
136
137 pci_set_master (pdev);
138
139 err = -ENOMEM;
140
141 dev = alloc_etherdev (sizeof (*np));
142 if (!dev)
143 goto err_out_res;
144 SET_NETDEV_DEV(dev, &pdev->dev);
145
146 np = netdev_priv(dev);
147
148
149 ioaddr = pci_iomap(pdev, 0, 0);
150 if (!ioaddr)
151 goto err_out_dev;
152 np->eeprom_addr = ioaddr;
153
154#ifdef MEM_MAPPING
155
156 ioaddr = pci_iomap(pdev, 1, 0);
157 if (!ioaddr)
158 goto err_out_iounmap;
159#endif
160 np->ioaddr = ioaddr;
161 np->chip_id = chip_idx;
162 np->pdev = pdev;
163 spin_lock_init (&np->tx_lock);
164 spin_lock_init (&np->rx_lock);
165
166
167 np->an_enable = 1;
168 np->tx_coalesce = 1;
169 if (card_idx < MAX_UNITS) {
170 if (media[card_idx] != NULL) {
171 np->an_enable = 0;
172 if (strcmp (media[card_idx], "auto") == 0 ||
173 strcmp (media[card_idx], "autosense") == 0 ||
174 strcmp (media[card_idx], "0") == 0 ) {
175 np->an_enable = 2;
176 } else if (strcmp (media[card_idx], "100mbps_fd") == 0 ||
177 strcmp (media[card_idx], "4") == 0) {
178 np->speed = 100;
179 np->full_duplex = 1;
180 } else if (strcmp (media[card_idx], "100mbps_hd") == 0 ||
181 strcmp (media[card_idx], "3") == 0) {
182 np->speed = 100;
183 np->full_duplex = 0;
184 } else if (strcmp (media[card_idx], "10mbps_fd") == 0 ||
185 strcmp (media[card_idx], "2") == 0) {
186 np->speed = 10;
187 np->full_duplex = 1;
188 } else if (strcmp (media[card_idx], "10mbps_hd") == 0 ||
189 strcmp (media[card_idx], "1") == 0) {
190 np->speed = 10;
191 np->full_duplex = 0;
192 } else if (strcmp (media[card_idx], "1000mbps_fd") == 0 ||
193 strcmp (media[card_idx], "6") == 0) {
194 np->speed=1000;
195 np->full_duplex=1;
196 } else if (strcmp (media[card_idx], "1000mbps_hd") == 0 ||
197 strcmp (media[card_idx], "5") == 0) {
198 np->speed = 1000;
199 np->full_duplex = 0;
200 } else {
201 np->an_enable = 1;
202 }
203 }
204 if (jumbo[card_idx] != 0) {
205 np->jumbo = 1;
206 dev->mtu = MAX_JUMBO;
207 } else {
208 np->jumbo = 0;
209 if (mtu[card_idx] > 0 && mtu[card_idx] < PACKET_SIZE)
210 dev->mtu = mtu[card_idx];
211 }
212 np->vlan = (vlan[card_idx] > 0 && vlan[card_idx] < 4096) ?
213 vlan[card_idx] : 0;
214 if (rx_coalesce > 0 && rx_timeout > 0) {
215 np->rx_coalesce = rx_coalesce;
216 np->rx_timeout = rx_timeout;
217 np->coalesce = 1;
218 }
219 np->tx_flow = (tx_flow == 0) ? 0 : 1;
220 np->rx_flow = (rx_flow == 0) ? 0 : 1;
221
222 if (tx_coalesce < 1)
223 tx_coalesce = 1;
224 else if (tx_coalesce > TX_RING_SIZE-1)
225 tx_coalesce = TX_RING_SIZE - 1;
226 }
227 dev->netdev_ops = &netdev_ops;
228 dev->watchdog_timeo = TX_TIMEOUT;
229 dev->ethtool_ops = ðtool_ops;
230#if 0
231 dev->features = NETIF_F_IP_CSUM;
232#endif
233
234 dev->min_mtu = ETH_MIN_MTU;
235 dev->max_mtu = np->jumbo ? MAX_JUMBO : PACKET_SIZE;
236
237 pci_set_drvdata (pdev, dev);
238
239 ring_space = pci_alloc_consistent (pdev, TX_TOTAL_SIZE, &ring_dma);
240 if (!ring_space)
241 goto err_out_iounmap;
242 np->tx_ring = ring_space;
243 np->tx_ring_dma = ring_dma;
244
245 ring_space = pci_alloc_consistent (pdev, RX_TOTAL_SIZE, &ring_dma);
246 if (!ring_space)
247 goto err_out_unmap_tx;
248 np->rx_ring = ring_space;
249 np->rx_ring_dma = ring_dma;
250
251
252 parse_eeprom (dev);
253
254
255 err = find_miiphy (dev);
256 if (err)
257 goto err_out_unmap_rx;
258
259
260 np->phy_media = (dr16(ASICCtrl) & PhyMedia) ? 1 : 0;
261 np->link_status = 0;
262
263 if (np->phy_media) {
264
265 if (np->an_enable == 2) {
266 np->an_enable = 1;
267 }
268 } else {
269
270
271 if (np->speed == 1000)
272 np->an_enable = 1;
273 }
274
275 err = register_netdev (dev);
276 if (err)
277 goto err_out_unmap_rx;
278
279 card_idx++;
280
281 printk (KERN_INFO "%s: %s, %pM, IRQ %d\n",
282 dev->name, np->name, dev->dev_addr, irq);
283 if (tx_coalesce > 1)
284 printk(KERN_INFO "tx_coalesce:\t%d packets\n",
285 tx_coalesce);
286 if (np->coalesce)
287 printk(KERN_INFO
288 "rx_coalesce:\t%d packets\n"
289 "rx_timeout: \t%d ns\n",
290 np->rx_coalesce, np->rx_timeout*640);
291 if (np->vlan)
292 printk(KERN_INFO "vlan(id):\t%d\n", np->vlan);
293 return 0;
294
295err_out_unmap_rx:
296 pci_free_consistent (pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma);
297err_out_unmap_tx:
298 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma);
299err_out_iounmap:
300#ifdef MEM_MAPPING
301 pci_iounmap(pdev, np->ioaddr);
302#endif
303 pci_iounmap(pdev, np->eeprom_addr);
304err_out_dev:
305 free_netdev (dev);
306err_out_res:
307 pci_release_regions (pdev);
308err_out_disable:
309 pci_disable_device (pdev);
310 return err;
311}
312
313static int
314find_miiphy (struct net_device *dev)
315{
316 struct netdev_private *np = netdev_priv(dev);
317 int i, phy_found = 0;
318
319 np->phy_addr = 1;
320
321 for (i = 31; i >= 0; i--) {
322 int mii_status = mii_read (dev, i, 1);
323 if (mii_status != 0xffff && mii_status != 0x0000) {
324 np->phy_addr = i;
325 phy_found++;
326 }
327 }
328 if (!phy_found) {
329 printk (KERN_ERR "%s: No MII PHY found!\n", dev->name);
330 return -ENODEV;
331 }
332 return 0;
333}
334
335static int
336parse_eeprom (struct net_device *dev)
337{
338 struct netdev_private *np = netdev_priv(dev);
339 void __iomem *ioaddr = np->ioaddr;
340 int i, j;
341 u8 sromdata[256];
342 u8 *psib;
343 u32 crc;
344 PSROM_t psrom = (PSROM_t) sromdata;
345
346 int cid, next;
347
348 for (i = 0; i < 128; i++)
349 ((__le16 *) sromdata)[i] = cpu_to_le16(read_eeprom(np, i));
350
351 if (np->pdev->vendor == PCI_VENDOR_ID_DLINK) {
352
353 crc = ~ether_crc_le (256 - 4, sromdata);
354 if (psrom->crc != cpu_to_le32(crc)) {
355 printk (KERN_ERR "%s: EEPROM data CRC error.\n",
356 dev->name);
357 return -1;
358 }
359 }
360
361
362 for (i = 0; i < 6; i++)
363 dev->dev_addr[i] = psrom->mac_addr[i];
364
365 if (np->chip_id == CHIP_IP1000A) {
366 np->led_mode = psrom->led_mode;
367 return 0;
368 }
369
370 if (np->pdev->vendor != PCI_VENDOR_ID_DLINK) {
371 return 0;
372 }
373
374
375 i = 0x30;
376 psib = (u8 *) sromdata;
377 do {
378 cid = psib[i++];
379 next = psib[i++];
380 if ((cid == 0 && next == 0) || (cid == 0xff && next == 0xff)) {
381 printk (KERN_ERR "Cell data error\n");
382 return -1;
383 }
384 switch (cid) {
385 case 0:
386 break;
387 case 1:
388 return 0;
389 case 2:
390 np->duplex_polarity = psib[i];
391 dw8(PhyCtrl, dr8(PhyCtrl) | psib[i]);
392 break;
393 case 3:
394 np->wake_polarity = psib[i];
395 break;
396 case 9:
397 j = (next - i > 255) ? 255 : next - i;
398 memcpy (np->name, &(psib[i]), j);
399 break;
400 case 4:
401 case 5:
402 case 6:
403 case 7:
404 case 8:
405 break;
406 default:
407 return -1;
408 }
409 i = next;
410 } while (1);
411
412 return 0;
413}
414
415static void rio_set_led_mode(struct net_device *dev)
416{
417 struct netdev_private *np = netdev_priv(dev);
418 void __iomem *ioaddr = np->ioaddr;
419 u32 mode;
420
421 if (np->chip_id != CHIP_IP1000A)
422 return;
423
424 mode = dr32(ASICCtrl);
425 mode &= ~(IPG_AC_LED_MODE_BIT_1 | IPG_AC_LED_MODE | IPG_AC_LED_SPEED);
426
427 if (np->led_mode & 0x01)
428 mode |= IPG_AC_LED_MODE;
429 if (np->led_mode & 0x02)
430 mode |= IPG_AC_LED_MODE_BIT_1;
431 if (np->led_mode & 0x08)
432 mode |= IPG_AC_LED_SPEED;
433
434 dw32(ASICCtrl, mode);
435}
436
437static inline dma_addr_t desc_to_dma(struct netdev_desc *desc)
438{
439 return le64_to_cpu(desc->fraginfo) & DMA_BIT_MASK(48);
440}
441
442static void free_list(struct net_device *dev)
443{
444 struct netdev_private *np = netdev_priv(dev);
445 struct sk_buff *skb;
446 int i;
447
448
449 for (i = 0; i < RX_RING_SIZE; i++) {
450 skb = np->rx_skbuff[i];
451 if (skb) {
452 pci_unmap_single(np->pdev, desc_to_dma(&np->rx_ring[i]),
453 skb->len, PCI_DMA_FROMDEVICE);
454 dev_kfree_skb(skb);
455 np->rx_skbuff[i] = NULL;
456 }
457 np->rx_ring[i].status = 0;
458 np->rx_ring[i].fraginfo = 0;
459 }
460 for (i = 0; i < TX_RING_SIZE; i++) {
461 skb = np->tx_skbuff[i];
462 if (skb) {
463 pci_unmap_single(np->pdev, desc_to_dma(&np->tx_ring[i]),
464 skb->len, PCI_DMA_TODEVICE);
465 dev_kfree_skb(skb);
466 np->tx_skbuff[i] = NULL;
467 }
468 }
469}
470
471static void rio_reset_ring(struct netdev_private *np)
472{
473 int i;
474
475 np->cur_rx = 0;
476 np->cur_tx = 0;
477 np->old_rx = 0;
478 np->old_tx = 0;
479
480 for (i = 0; i < TX_RING_SIZE; i++)
481 np->tx_ring[i].status = cpu_to_le64(TFDDone);
482
483 for (i = 0; i < RX_RING_SIZE; i++)
484 np->rx_ring[i].status = 0;
485}
486
487
488static int alloc_list(struct net_device *dev)
489{
490 struct netdev_private *np = netdev_priv(dev);
491 int i;
492
493 rio_reset_ring(np);
494 np->rx_buf_sz = (dev->mtu <= 1500 ? PACKET_SIZE : dev->mtu + 32);
495
496
497 for (i = 0; i < TX_RING_SIZE; i++) {
498 np->tx_skbuff[i] = NULL;
499 np->tx_ring[i].next_desc = cpu_to_le64(np->tx_ring_dma +
500 ((i + 1) % TX_RING_SIZE) *
501 sizeof(struct netdev_desc));
502 }
503
504
505 for (i = 0; i < RX_RING_SIZE; i++) {
506
507 struct sk_buff *skb;
508
509 skb = netdev_alloc_skb_ip_align(dev, np->rx_buf_sz);
510 np->rx_skbuff[i] = skb;
511 if (!skb) {
512 free_list(dev);
513 return -ENOMEM;
514 }
515
516 np->rx_ring[i].next_desc = cpu_to_le64(np->rx_ring_dma +
517 ((i + 1) % RX_RING_SIZE) *
518 sizeof(struct netdev_desc));
519
520 np->rx_ring[i].fraginfo =
521 cpu_to_le64(pci_map_single(
522 np->pdev, skb->data, np->rx_buf_sz,
523 PCI_DMA_FROMDEVICE));
524 np->rx_ring[i].fraginfo |= cpu_to_le64((u64)np->rx_buf_sz << 48);
525 }
526
527 return 0;
528}
529
530static void rio_hw_init(struct net_device *dev)
531{
532 struct netdev_private *np = netdev_priv(dev);
533 void __iomem *ioaddr = np->ioaddr;
534 int i;
535 u16 macctrl;
536
537
538 dw16(ASICCtrl + 2,
539 GlobalReset | DMAReset | FIFOReset | NetworkReset | HostReset);
540 mdelay(10);
541
542 rio_set_led_mode(dev);
543
544
545 dw32(DebugCtrl, dr32(DebugCtrl) | 0x0230);
546
547 if (np->chip_id == CHIP_IP1000A &&
548 (np->pdev->revision == 0x40 || np->pdev->revision == 0x41)) {
549
550 mii_write(dev, np->phy_addr, 31, 0x0001);
551 mii_write(dev, np->phy_addr, 27, 0x01e0);
552 mii_write(dev, np->phy_addr, 31, 0x0002);
553 mii_write(dev, np->phy_addr, 27, 0xeb8e);
554 mii_write(dev, np->phy_addr, 31, 0x0000);
555 mii_write(dev, np->phy_addr, 30, 0x005e);
556
557 mii_write(dev, np->phy_addr, MII_CTRL1000, 0x0700);
558 }
559
560 if (np->phy_media)
561 mii_set_media_pcs(dev);
562 else
563 mii_set_media(dev);
564
565
566 if (np->jumbo != 0)
567 dw16(MaxFrameSize, MAX_JUMBO+14);
568
569
570 dw32(RFDListPtr0, np->rx_ring_dma);
571 dw32(RFDListPtr1, 0);
572
573
574
575
576
577 for (i = 0; i < 3; i++)
578 dw16(StationAddr0 + 2 * i,
579 cpu_to_le16(((u16 *)dev->dev_addr)[i]));
580
581 set_multicast (dev);
582 if (np->coalesce) {
583 dw32(RxDMAIntCtrl, np->rx_coalesce | np->rx_timeout << 16);
584 }
585
586 dw8(RxDMAPollPeriod, 0x20);
587 dw8(TxDMAPollPeriod, 0xff);
588 dw8(RxDMABurstThresh, 0x30);
589 dw8(RxDMAUrgentThresh, 0x30);
590 dw32(RmonStatMask, 0x0007ffff);
591
592 clear_stats (dev);
593
594
595 if (np->vlan) {
596
597 dw32(RxDMAIntCtrl, dr32(RxDMAIntCtrl) | 0x7 << 10);
598
599 dw16(VLANId, np->vlan);
600
601 dw32(VLANTag, 0x8100 << 16 | np->vlan);
602
603
604 dw32(MACCtrl, dr32(MACCtrl) | AutoVLANuntagging);
605 }
606
607
608 dw32(MACCtrl, dr32(MACCtrl) | StatsEnable | RxEnable | TxEnable);
609
610 macctrl = 0;
611 macctrl |= (np->vlan) ? AutoVLANuntagging : 0;
612 macctrl |= (np->full_duplex) ? DuplexSelect : 0;
613 macctrl |= (np->tx_flow) ? TxFlowControlEnable : 0;
614 macctrl |= (np->rx_flow) ? RxFlowControlEnable : 0;
615 dw16(MACCtrl, macctrl);
616}
617
618static void rio_hw_stop(struct net_device *dev)
619{
620 struct netdev_private *np = netdev_priv(dev);
621 void __iomem *ioaddr = np->ioaddr;
622
623
624 dw16(IntEnable, 0);
625
626
627 dw32(MACCtrl, TxDisable | RxDisable | StatsDisable);
628}
629
630static int rio_open(struct net_device *dev)
631{
632 struct netdev_private *np = netdev_priv(dev);
633 const int irq = np->pdev->irq;
634 int i;
635
636 i = alloc_list(dev);
637 if (i)
638 return i;
639
640 rio_hw_init(dev);
641
642 i = request_irq(irq, rio_interrupt, IRQF_SHARED, dev->name, dev);
643 if (i) {
644 rio_hw_stop(dev);
645 free_list(dev);
646 return i;
647 }
648
649 timer_setup(&np->timer, rio_timer, 0);
650 np->timer.expires = jiffies + 1 * HZ;
651 add_timer(&np->timer);
652
653 netif_start_queue (dev);
654
655 dl2k_enable_int(np);
656 return 0;
657}
658
659static void
660rio_timer (struct timer_list *t)
661{
662 struct netdev_private *np = from_timer(np, t, timer);
663 struct net_device *dev = pci_get_drvdata(np->pdev);
664 unsigned int entry;
665 int next_tick = 1*HZ;
666 unsigned long flags;
667
668 spin_lock_irqsave(&np->rx_lock, flags);
669
670 if (np->cur_rx - np->old_rx >= RX_RING_SIZE) {
671 printk(KERN_INFO "Try to recover rx ring exhausted...\n");
672
673 for (; np->cur_rx - np->old_rx > 0; np->old_rx++) {
674 struct sk_buff *skb;
675 entry = np->old_rx % RX_RING_SIZE;
676
677 if (np->rx_skbuff[entry] == NULL) {
678 skb = netdev_alloc_skb_ip_align(dev,
679 np->rx_buf_sz);
680 if (skb == NULL) {
681 np->rx_ring[entry].fraginfo = 0;
682 printk (KERN_INFO
683 "%s: Still unable to re-allocate Rx skbuff.#%d\n",
684 dev->name, entry);
685 break;
686 }
687 np->rx_skbuff[entry] = skb;
688 np->rx_ring[entry].fraginfo =
689 cpu_to_le64 (pci_map_single
690 (np->pdev, skb->data, np->rx_buf_sz,
691 PCI_DMA_FROMDEVICE));
692 }
693 np->rx_ring[entry].fraginfo |=
694 cpu_to_le64((u64)np->rx_buf_sz << 48);
695 np->rx_ring[entry].status = 0;
696 }
697 }
698 spin_unlock_irqrestore (&np->rx_lock, flags);
699 np->timer.expires = jiffies + next_tick;
700 add_timer(&np->timer);
701}
702
703static void
704rio_tx_timeout (struct net_device *dev, unsigned int txqueue)
705{
706 struct netdev_private *np = netdev_priv(dev);
707 void __iomem *ioaddr = np->ioaddr;
708
709 printk (KERN_INFO "%s: Tx timed out (%4.4x), is buffer full?\n",
710 dev->name, dr32(TxStatus));
711 rio_free_tx(dev, 0);
712 dev->if_port = 0;
713 netif_trans_update(dev);
714}
715
716static netdev_tx_t
717start_xmit (struct sk_buff *skb, struct net_device *dev)
718{
719 struct netdev_private *np = netdev_priv(dev);
720 void __iomem *ioaddr = np->ioaddr;
721 struct netdev_desc *txdesc;
722 unsigned entry;
723 u64 tfc_vlan_tag = 0;
724
725 if (np->link_status == 0) {
726 dev_kfree_skb(skb);
727 return NETDEV_TX_OK;
728 }
729 entry = np->cur_tx % TX_RING_SIZE;
730 np->tx_skbuff[entry] = skb;
731 txdesc = &np->tx_ring[entry];
732
733#if 0
734 if (skb->ip_summed == CHECKSUM_PARTIAL) {
735 txdesc->status |=
736 cpu_to_le64 (TCPChecksumEnable | UDPChecksumEnable |
737 IPChecksumEnable);
738 }
739#endif
740 if (np->vlan) {
741 tfc_vlan_tag = VLANTagInsert |
742 ((u64)np->vlan << 32) |
743 ((u64)skb->priority << 45);
744 }
745 txdesc->fraginfo = cpu_to_le64 (pci_map_single (np->pdev, skb->data,
746 skb->len,
747 PCI_DMA_TODEVICE));
748 txdesc->fraginfo |= cpu_to_le64((u64)skb->len << 48);
749
750
751
752 if (entry % np->tx_coalesce == 0 || np->speed == 10)
753 txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag |
754 WordAlignDisable |
755 TxDMAIndicate |
756 (1 << FragCountShift));
757 else
758 txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag |
759 WordAlignDisable |
760 (1 << FragCountShift));
761
762
763 dw32(DMACtrl, dr32(DMACtrl) | 0x00001000);
764
765 dw32(CountDown, 10000);
766 np->cur_tx = (np->cur_tx + 1) % TX_RING_SIZE;
767 if ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE
768 < TX_QUEUE_LEN - 1 && np->speed != 10) {
769
770 } else if (!netif_queue_stopped(dev)) {
771 netif_stop_queue (dev);
772 }
773
774
775 if (!dr32(TFDListPtr0)) {
776 dw32(TFDListPtr0, np->tx_ring_dma +
777 entry * sizeof (struct netdev_desc));
778 dw32(TFDListPtr1, 0);
779 }
780
781 return NETDEV_TX_OK;
782}
783
784static irqreturn_t
785rio_interrupt (int irq, void *dev_instance)
786{
787 struct net_device *dev = dev_instance;
788 struct netdev_private *np = netdev_priv(dev);
789 void __iomem *ioaddr = np->ioaddr;
790 unsigned int_status;
791 int cnt = max_intrloop;
792 int handled = 0;
793
794 while (1) {
795 int_status = dr16(IntStatus);
796 dw16(IntStatus, int_status);
797 int_status &= DEFAULT_INTR;
798 if (int_status == 0 || --cnt < 0)
799 break;
800 handled = 1;
801
802 if (int_status & RxDMAComplete)
803 receive_packet (dev);
804
805 if ((int_status & (TxDMAComplete|IntRequested))) {
806 int tx_status;
807 tx_status = dr32(TxStatus);
808 if (tx_status & 0x01)
809 tx_error (dev, tx_status);
810
811 rio_free_tx (dev, 1);
812 }
813
814
815 if (int_status &
816 (HostError | LinkEvent | UpdateStats))
817 rio_error (dev, int_status);
818 }
819 if (np->cur_tx != np->old_tx)
820 dw32(CountDown, 100);
821 return IRQ_RETVAL(handled);
822}
823
824static void
825rio_free_tx (struct net_device *dev, int irq)
826{
827 struct netdev_private *np = netdev_priv(dev);
828 int entry = np->old_tx % TX_RING_SIZE;
829 int tx_use = 0;
830 unsigned long flag = 0;
831
832 if (irq)
833 spin_lock(&np->tx_lock);
834 else
835 spin_lock_irqsave(&np->tx_lock, flag);
836
837
838 while (entry != np->cur_tx) {
839 struct sk_buff *skb;
840
841 if (!(np->tx_ring[entry].status & cpu_to_le64(TFDDone)))
842 break;
843 skb = np->tx_skbuff[entry];
844 pci_unmap_single (np->pdev,
845 desc_to_dma(&np->tx_ring[entry]),
846 skb->len, PCI_DMA_TODEVICE);
847 if (irq)
848 dev_kfree_skb_irq (skb);
849 else
850 dev_kfree_skb (skb);
851
852 np->tx_skbuff[entry] = NULL;
853 entry = (entry + 1) % TX_RING_SIZE;
854 tx_use++;
855 }
856 if (irq)
857 spin_unlock(&np->tx_lock);
858 else
859 spin_unlock_irqrestore(&np->tx_lock, flag);
860 np->old_tx = entry;
861
862
863
864
865 if (netif_queue_stopped(dev) &&
866 ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE
867 < TX_QUEUE_LEN - 1 || np->speed == 10)) {
868 netif_wake_queue (dev);
869 }
870}
871
872static void
873tx_error (struct net_device *dev, int tx_status)
874{
875 struct netdev_private *np = netdev_priv(dev);
876 void __iomem *ioaddr = np->ioaddr;
877 int frame_id;
878 int i;
879
880 frame_id = (tx_status & 0xffff0000);
881 printk (KERN_ERR "%s: Transmit error, TxStatus %4.4x, FrameId %d.\n",
882 dev->name, tx_status, frame_id);
883 dev->stats.tx_errors++;
884
885 if (tx_status & 0x10) {
886 dev->stats.tx_fifo_errors++;
887 dw16(TxStartThresh, dr16(TxStartThresh) + 0x10);
888
889 dw16(ASICCtrl + 2,
890 TxReset | DMAReset | FIFOReset | NetworkReset);
891
892 for (i = 50; i > 0; i--) {
893 if (!(dr16(ASICCtrl + 2) & ResetBusy))
894 break;
895 mdelay (1);
896 }
897 rio_set_led_mode(dev);
898 rio_free_tx (dev, 1);
899
900 dw32(TFDListPtr0, np->tx_ring_dma +
901 np->old_tx * sizeof (struct netdev_desc));
902 dw32(TFDListPtr1, 0);
903
904
905 }
906
907 if (tx_status & 0x04) {
908 dev->stats.tx_fifo_errors++;
909
910 dw16(ASICCtrl + 2, TxReset | FIFOReset);
911
912 for (i = 50; i > 0; i--) {
913 if (!(dr16(ASICCtrl + 2) & ResetBusy))
914 break;
915 mdelay (1);
916 }
917 rio_set_led_mode(dev);
918
919 }
920
921 if (tx_status & 0x08)
922 dev->stats.collisions++;
923
924 dw32(MACCtrl, dr16(MACCtrl) | TxEnable);
925}
926
927static int
928receive_packet (struct net_device *dev)
929{
930 struct netdev_private *np = netdev_priv(dev);
931 int entry = np->cur_rx % RX_RING_SIZE;
932 int cnt = 30;
933
934
935 while (1) {
936 struct netdev_desc *desc = &np->rx_ring[entry];
937 int pkt_len;
938 u64 frame_status;
939
940 if (!(desc->status & cpu_to_le64(RFDDone)) ||
941 !(desc->status & cpu_to_le64(FrameStart)) ||
942 !(desc->status & cpu_to_le64(FrameEnd)))
943 break;
944
945
946 frame_status = le64_to_cpu(desc->status);
947 pkt_len = frame_status & 0xffff;
948 if (--cnt < 0)
949 break;
950
951 if (frame_status & RFS_Errors) {
952 dev->stats.rx_errors++;
953 if (frame_status & (RxRuntFrame | RxLengthError))
954 dev->stats.rx_length_errors++;
955 if (frame_status & RxFCSError)
956 dev->stats.rx_crc_errors++;
957 if (frame_status & RxAlignmentError && np->speed != 1000)
958 dev->stats.rx_frame_errors++;
959 if (frame_status & RxFIFOOverrun)
960 dev->stats.rx_fifo_errors++;
961 } else {
962 struct sk_buff *skb;
963
964
965 if (pkt_len > copy_thresh) {
966 pci_unmap_single (np->pdev,
967 desc_to_dma(desc),
968 np->rx_buf_sz,
969 PCI_DMA_FROMDEVICE);
970 skb_put (skb = np->rx_skbuff[entry], pkt_len);
971 np->rx_skbuff[entry] = NULL;
972 } else if ((skb = netdev_alloc_skb_ip_align(dev, pkt_len))) {
973 pci_dma_sync_single_for_cpu(np->pdev,
974 desc_to_dma(desc),
975 np->rx_buf_sz,
976 PCI_DMA_FROMDEVICE);
977 skb_copy_to_linear_data (skb,
978 np->rx_skbuff[entry]->data,
979 pkt_len);
980 skb_put (skb, pkt_len);
981 pci_dma_sync_single_for_device(np->pdev,
982 desc_to_dma(desc),
983 np->rx_buf_sz,
984 PCI_DMA_FROMDEVICE);
985 }
986 skb->protocol = eth_type_trans (skb, dev);
987#if 0
988
989 if (np->pdev->pci_rev_id >= 0x0c &&
990 !(frame_status & (TCPError | UDPError | IPError))) {
991 skb->ip_summed = CHECKSUM_UNNECESSARY;
992 }
993#endif
994 netif_rx (skb);
995 }
996 entry = (entry + 1) % RX_RING_SIZE;
997 }
998 spin_lock(&np->rx_lock);
999 np->cur_rx = entry;
1000
1001 entry = np->old_rx;
1002 while (entry != np->cur_rx) {
1003 struct sk_buff *skb;
1004
1005 if (np->rx_skbuff[entry] == NULL) {
1006 skb = netdev_alloc_skb_ip_align(dev, np->rx_buf_sz);
1007 if (skb == NULL) {
1008 np->rx_ring[entry].fraginfo = 0;
1009 printk (KERN_INFO
1010 "%s: receive_packet: "
1011 "Unable to re-allocate Rx skbuff.#%d\n",
1012 dev->name, entry);
1013 break;
1014 }
1015 np->rx_skbuff[entry] = skb;
1016 np->rx_ring[entry].fraginfo =
1017 cpu_to_le64 (pci_map_single
1018 (np->pdev, skb->data, np->rx_buf_sz,
1019 PCI_DMA_FROMDEVICE));
1020 }
1021 np->rx_ring[entry].fraginfo |=
1022 cpu_to_le64((u64)np->rx_buf_sz << 48);
1023 np->rx_ring[entry].status = 0;
1024 entry = (entry + 1) % RX_RING_SIZE;
1025 }
1026 np->old_rx = entry;
1027 spin_unlock(&np->rx_lock);
1028 return 0;
1029}
1030
1031static void
1032rio_error (struct net_device *dev, int int_status)
1033{
1034 struct netdev_private *np = netdev_priv(dev);
1035 void __iomem *ioaddr = np->ioaddr;
1036 u16 macctrl;
1037
1038
1039 if (int_status & LinkEvent) {
1040 if (mii_wait_link (dev, 10) == 0) {
1041 printk (KERN_INFO "%s: Link up\n", dev->name);
1042 if (np->phy_media)
1043 mii_get_media_pcs (dev);
1044 else
1045 mii_get_media (dev);
1046 if (np->speed == 1000)
1047 np->tx_coalesce = tx_coalesce;
1048 else
1049 np->tx_coalesce = 1;
1050 macctrl = 0;
1051 macctrl |= (np->vlan) ? AutoVLANuntagging : 0;
1052 macctrl |= (np->full_duplex) ? DuplexSelect : 0;
1053 macctrl |= (np->tx_flow) ?
1054 TxFlowControlEnable : 0;
1055 macctrl |= (np->rx_flow) ?
1056 RxFlowControlEnable : 0;
1057 dw16(MACCtrl, macctrl);
1058 np->link_status = 1;
1059 netif_carrier_on(dev);
1060 } else {
1061 printk (KERN_INFO "%s: Link off\n", dev->name);
1062 np->link_status = 0;
1063 netif_carrier_off(dev);
1064 }
1065 }
1066
1067
1068 if (int_status & UpdateStats) {
1069 get_stats (dev);
1070 }
1071
1072
1073
1074 if (int_status & HostError) {
1075 printk (KERN_ERR "%s: HostError! IntStatus %4.4x.\n",
1076 dev->name, int_status);
1077 dw16(ASICCtrl + 2, GlobalReset | HostReset);
1078 mdelay (500);
1079 rio_set_led_mode(dev);
1080 }
1081}
1082
1083static struct net_device_stats *
1084get_stats (struct net_device *dev)
1085{
1086 struct netdev_private *np = netdev_priv(dev);
1087 void __iomem *ioaddr = np->ioaddr;
1088#ifdef MEM_MAPPING
1089 int i;
1090#endif
1091 unsigned int stat_reg;
1092
1093
1094
1095
1096 dev->stats.rx_packets += dr32(FramesRcvOk);
1097 dev->stats.tx_packets += dr32(FramesXmtOk);
1098 dev->stats.rx_bytes += dr32(OctetRcvOk);
1099 dev->stats.tx_bytes += dr32(OctetXmtOk);
1100
1101 dev->stats.multicast = dr32(McstFramesRcvdOk);
1102 dev->stats.collisions += dr32(SingleColFrames)
1103 + dr32(MultiColFrames);
1104
1105
1106 stat_reg = dr16(FramesAbortXSColls);
1107 dev->stats.tx_aborted_errors += stat_reg;
1108 dev->stats.tx_errors += stat_reg;
1109
1110 stat_reg = dr16(CarrierSenseErrors);
1111 dev->stats.tx_carrier_errors += stat_reg;
1112 dev->stats.tx_errors += stat_reg;
1113
1114
1115 dr32(McstOctetXmtOk);
1116 dr16(BcstFramesXmtdOk);
1117 dr32(McstFramesXmtdOk);
1118 dr16(BcstFramesRcvdOk);
1119 dr16(MacControlFramesRcvd);
1120 dr16(FrameTooLongErrors);
1121 dr16(InRangeLengthErrors);
1122 dr16(FramesCheckSeqErrors);
1123 dr16(FramesLostRxErrors);
1124 dr32(McstOctetXmtOk);
1125 dr32(BcstOctetXmtOk);
1126 dr32(McstFramesXmtdOk);
1127 dr32(FramesWDeferredXmt);
1128 dr32(LateCollisions);
1129 dr16(BcstFramesXmtdOk);
1130 dr16(MacControlFramesXmtd);
1131 dr16(FramesWEXDeferal);
1132
1133#ifdef MEM_MAPPING
1134 for (i = 0x100; i <= 0x150; i += 4)
1135 dr32(i);
1136#endif
1137 dr16(TxJumboFrames);
1138 dr16(RxJumboFrames);
1139 dr16(TCPCheckSumErrors);
1140 dr16(UDPCheckSumErrors);
1141 dr16(IPCheckSumErrors);
1142 return &dev->stats;
1143}
1144
1145static int
1146clear_stats (struct net_device *dev)
1147{
1148 struct netdev_private *np = netdev_priv(dev);
1149 void __iomem *ioaddr = np->ioaddr;
1150#ifdef MEM_MAPPING
1151 int i;
1152#endif
1153
1154
1155
1156 dr32(FramesRcvOk);
1157 dr32(FramesXmtOk);
1158 dr32(OctetRcvOk);
1159 dr32(OctetXmtOk);
1160
1161 dr32(McstFramesRcvdOk);
1162 dr32(SingleColFrames);
1163 dr32(MultiColFrames);
1164 dr32(LateCollisions);
1165
1166 dr16(FrameTooLongErrors);
1167 dr16(InRangeLengthErrors);
1168 dr16(FramesCheckSeqErrors);
1169 dr16(FramesLostRxErrors);
1170
1171
1172 dr16(FramesAbortXSColls);
1173 dr16(CarrierSenseErrors);
1174
1175
1176 dr32(McstOctetXmtOk);
1177 dr16(BcstFramesXmtdOk);
1178 dr32(McstFramesXmtdOk);
1179 dr16(BcstFramesRcvdOk);
1180 dr16(MacControlFramesRcvd);
1181 dr32(McstOctetXmtOk);
1182 dr32(BcstOctetXmtOk);
1183 dr32(McstFramesXmtdOk);
1184 dr32(FramesWDeferredXmt);
1185 dr16(BcstFramesXmtdOk);
1186 dr16(MacControlFramesXmtd);
1187 dr16(FramesWEXDeferal);
1188#ifdef MEM_MAPPING
1189 for (i = 0x100; i <= 0x150; i += 4)
1190 dr32(i);
1191#endif
1192 dr16(TxJumboFrames);
1193 dr16(RxJumboFrames);
1194 dr16(TCPCheckSumErrors);
1195 dr16(UDPCheckSumErrors);
1196 dr16(IPCheckSumErrors);
1197 return 0;
1198}
1199
1200static void
1201set_multicast (struct net_device *dev)
1202{
1203 struct netdev_private *np = netdev_priv(dev);
1204 void __iomem *ioaddr = np->ioaddr;
1205 u32 hash_table[2];
1206 u16 rx_mode = 0;
1207
1208 hash_table[0] = hash_table[1] = 0;
1209
1210 hash_table[1] |= 0x02000000;
1211 if (dev->flags & IFF_PROMISC) {
1212
1213 rx_mode = ReceiveAllFrames;
1214 } else if ((dev->flags & IFF_ALLMULTI) ||
1215 (netdev_mc_count(dev) > multicast_filter_limit)) {
1216
1217 rx_mode = ReceiveBroadcast | ReceiveMulticast | ReceiveUnicast;
1218 } else if (!netdev_mc_empty(dev)) {
1219 struct netdev_hw_addr *ha;
1220
1221
1222 rx_mode =
1223 ReceiveBroadcast | ReceiveMulticastHash | ReceiveUnicast;
1224 netdev_for_each_mc_addr(ha, dev) {
1225 int bit, index = 0;
1226 int crc = ether_crc_le(ETH_ALEN, ha->addr);
1227
1228
1229 for (bit = 0; bit < 6; bit++)
1230 if (crc & (1 << (31 - bit)))
1231 index |= (1 << bit);
1232 hash_table[index / 32] |= (1 << (index % 32));
1233 }
1234 } else {
1235 rx_mode = ReceiveBroadcast | ReceiveUnicast;
1236 }
1237 if (np->vlan) {
1238
1239 rx_mode |= ReceiveVLANMatch;
1240 }
1241
1242 dw32(HashTable0, hash_table[0]);
1243 dw32(HashTable1, hash_table[1]);
1244 dw16(ReceiveMode, rx_mode);
1245}
1246
1247static void rio_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1248{
1249 struct netdev_private *np = netdev_priv(dev);
1250
1251 strlcpy(info->driver, "dl2k", sizeof(info->driver));
1252 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
1253 strlcpy(info->bus_info, pci_name(np->pdev), sizeof(info->bus_info));
1254}
1255
1256static int rio_get_link_ksettings(struct net_device *dev,
1257 struct ethtool_link_ksettings *cmd)
1258{
1259 struct netdev_private *np = netdev_priv(dev);
1260 u32 supported, advertising;
1261
1262 if (np->phy_media) {
1263
1264 supported = SUPPORTED_Autoneg | SUPPORTED_FIBRE;
1265 advertising = ADVERTISED_Autoneg | ADVERTISED_FIBRE;
1266 cmd->base.port = PORT_FIBRE;
1267 } else {
1268
1269 supported = SUPPORTED_10baseT_Half |
1270 SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half
1271 | SUPPORTED_100baseT_Full | SUPPORTED_1000baseT_Full |
1272 SUPPORTED_Autoneg | SUPPORTED_MII;
1273 advertising = ADVERTISED_10baseT_Half |
1274 ADVERTISED_10baseT_Full | ADVERTISED_100baseT_Half |
1275 ADVERTISED_100baseT_Full | ADVERTISED_1000baseT_Full |
1276 ADVERTISED_Autoneg | ADVERTISED_MII;
1277 cmd->base.port = PORT_MII;
1278 }
1279 if (np->link_status) {
1280 cmd->base.speed = np->speed;
1281 cmd->base.duplex = np->full_duplex ? DUPLEX_FULL : DUPLEX_HALF;
1282 } else {
1283 cmd->base.speed = SPEED_UNKNOWN;
1284 cmd->base.duplex = DUPLEX_UNKNOWN;
1285 }
1286 if (np->an_enable)
1287 cmd->base.autoneg = AUTONEG_ENABLE;
1288 else
1289 cmd->base.autoneg = AUTONEG_DISABLE;
1290
1291 cmd->base.phy_address = np->phy_addr;
1292
1293 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
1294 supported);
1295 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
1296 advertising);
1297
1298 return 0;
1299}
1300
1301static int rio_set_link_ksettings(struct net_device *dev,
1302 const struct ethtool_link_ksettings *cmd)
1303{
1304 struct netdev_private *np = netdev_priv(dev);
1305 u32 speed = cmd->base.speed;
1306 u8 duplex = cmd->base.duplex;
1307
1308 netif_carrier_off(dev);
1309 if (cmd->base.autoneg == AUTONEG_ENABLE) {
1310 if (np->an_enable) {
1311 return 0;
1312 } else {
1313 np->an_enable = 1;
1314 mii_set_media(dev);
1315 return 0;
1316 }
1317 } else {
1318 np->an_enable = 0;
1319 if (np->speed == 1000) {
1320 speed = SPEED_100;
1321 duplex = DUPLEX_FULL;
1322 printk("Warning!! Can't disable Auto negotiation in 1000Mbps, change to Manual 100Mbps, Full duplex.\n");
1323 }
1324 switch (speed) {
1325 case SPEED_10:
1326 np->speed = 10;
1327 np->full_duplex = (duplex == DUPLEX_FULL);
1328 break;
1329 case SPEED_100:
1330 np->speed = 100;
1331 np->full_duplex = (duplex == DUPLEX_FULL);
1332 break;
1333 case SPEED_1000:
1334 default:
1335 return -EINVAL;
1336 }
1337 mii_set_media(dev);
1338 }
1339 return 0;
1340}
1341
1342static u32 rio_get_link(struct net_device *dev)
1343{
1344 struct netdev_private *np = netdev_priv(dev);
1345 return np->link_status;
1346}
1347
1348static const struct ethtool_ops ethtool_ops = {
1349 .get_drvinfo = rio_get_drvinfo,
1350 .get_link = rio_get_link,
1351 .get_link_ksettings = rio_get_link_ksettings,
1352 .set_link_ksettings = rio_set_link_ksettings,
1353};
1354
1355static int
1356rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
1357{
1358 int phy_addr;
1359 struct netdev_private *np = netdev_priv(dev);
1360 struct mii_ioctl_data *miidata = if_mii(rq);
1361
1362 phy_addr = np->phy_addr;
1363 switch (cmd) {
1364 case SIOCGMIIPHY:
1365 miidata->phy_id = phy_addr;
1366 break;
1367 case SIOCGMIIREG:
1368 miidata->val_out = mii_read (dev, phy_addr, miidata->reg_num);
1369 break;
1370 case SIOCSMIIREG:
1371 if (!capable(CAP_NET_ADMIN))
1372 return -EPERM;
1373 mii_write (dev, phy_addr, miidata->reg_num, miidata->val_in);
1374 break;
1375 default:
1376 return -EOPNOTSUPP;
1377 }
1378 return 0;
1379}
1380
1381#define EEP_READ 0x0200
1382#define EEP_BUSY 0x8000
1383
1384
1385static int read_eeprom(struct netdev_private *np, int eep_addr)
1386{
1387 void __iomem *ioaddr = np->eeprom_addr;
1388 int i = 1000;
1389
1390 dw16(EepromCtrl, EEP_READ | (eep_addr & 0xff));
1391 while (i-- > 0) {
1392 if (!(dr16(EepromCtrl) & EEP_BUSY))
1393 return dr16(EepromData);
1394 }
1395 return 0;
1396}
1397
1398enum phy_ctrl_bits {
1399 MII_READ = 0x00, MII_CLK = 0x01, MII_DATA1 = 0x02, MII_WRITE = 0x04,
1400 MII_DUPLEX = 0x08,
1401};
1402
1403#define mii_delay() dr8(PhyCtrl)
1404static void
1405mii_sendbit (struct net_device *dev, u32 data)
1406{
1407 struct netdev_private *np = netdev_priv(dev);
1408 void __iomem *ioaddr = np->ioaddr;
1409
1410 data = ((data) ? MII_DATA1 : 0) | (dr8(PhyCtrl) & 0xf8) | MII_WRITE;
1411 dw8(PhyCtrl, data);
1412 mii_delay ();
1413 dw8(PhyCtrl, data | MII_CLK);
1414 mii_delay ();
1415}
1416
1417static int
1418mii_getbit (struct net_device *dev)
1419{
1420 struct netdev_private *np = netdev_priv(dev);
1421 void __iomem *ioaddr = np->ioaddr;
1422 u8 data;
1423
1424 data = (dr8(PhyCtrl) & 0xf8) | MII_READ;
1425 dw8(PhyCtrl, data);
1426 mii_delay ();
1427 dw8(PhyCtrl, data | MII_CLK);
1428 mii_delay ();
1429 return (dr8(PhyCtrl) >> 1) & 1;
1430}
1431
1432static void
1433mii_send_bits (struct net_device *dev, u32 data, int len)
1434{
1435 int i;
1436
1437 for (i = len - 1; i >= 0; i--) {
1438 mii_sendbit (dev, data & (1 << i));
1439 }
1440}
1441
1442static int
1443mii_read (struct net_device *dev, int phy_addr, int reg_num)
1444{
1445 u32 cmd;
1446 int i;
1447 u32 retval = 0;
1448
1449
1450 mii_send_bits (dev, 0xffffffff, 32);
1451
1452
1453 cmd = (0x06 << 10 | phy_addr << 5 | reg_num);
1454 mii_send_bits (dev, cmd, 14);
1455
1456 if (mii_getbit (dev))
1457 goto err_out;
1458
1459 for (i = 0; i < 16; i++) {
1460 retval |= mii_getbit (dev);
1461 retval <<= 1;
1462 }
1463
1464 mii_getbit (dev);
1465 return (retval >> 1) & 0xffff;
1466
1467 err_out:
1468 return 0;
1469}
1470static int
1471mii_write (struct net_device *dev, int phy_addr, int reg_num, u16 data)
1472{
1473 u32 cmd;
1474
1475
1476 mii_send_bits (dev, 0xffffffff, 32);
1477
1478
1479 cmd = (0x5002 << 16) | (phy_addr << 23) | (reg_num << 18) | data;
1480 mii_send_bits (dev, cmd, 32);
1481
1482 mii_getbit (dev);
1483 return 0;
1484}
1485static int
1486mii_wait_link (struct net_device *dev, int wait)
1487{
1488 __u16 bmsr;
1489 int phy_addr;
1490 struct netdev_private *np;
1491
1492 np = netdev_priv(dev);
1493 phy_addr = np->phy_addr;
1494
1495 do {
1496 bmsr = mii_read (dev, phy_addr, MII_BMSR);
1497 if (bmsr & BMSR_LSTATUS)
1498 return 0;
1499 mdelay (1);
1500 } while (--wait > 0);
1501 return -1;
1502}
1503static int
1504mii_get_media (struct net_device *dev)
1505{
1506 __u16 negotiate;
1507 __u16 bmsr;
1508 __u16 mscr;
1509 __u16 mssr;
1510 int phy_addr;
1511 struct netdev_private *np;
1512
1513 np = netdev_priv(dev);
1514 phy_addr = np->phy_addr;
1515
1516 bmsr = mii_read (dev, phy_addr, MII_BMSR);
1517 if (np->an_enable) {
1518 if (!(bmsr & BMSR_ANEGCOMPLETE)) {
1519
1520 return -1;
1521 }
1522 negotiate = mii_read (dev, phy_addr, MII_ADVERTISE) &
1523 mii_read (dev, phy_addr, MII_LPA);
1524 mscr = mii_read (dev, phy_addr, MII_CTRL1000);
1525 mssr = mii_read (dev, phy_addr, MII_STAT1000);
1526 if (mscr & ADVERTISE_1000FULL && mssr & LPA_1000FULL) {
1527 np->speed = 1000;
1528 np->full_duplex = 1;
1529 printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n");
1530 } else if (mscr & ADVERTISE_1000HALF && mssr & LPA_1000HALF) {
1531 np->speed = 1000;
1532 np->full_duplex = 0;
1533 printk (KERN_INFO "Auto 1000 Mbps, Half duplex\n");
1534 } else if (negotiate & ADVERTISE_100FULL) {
1535 np->speed = 100;
1536 np->full_duplex = 1;
1537 printk (KERN_INFO "Auto 100 Mbps, Full duplex\n");
1538 } else if (negotiate & ADVERTISE_100HALF) {
1539 np->speed = 100;
1540 np->full_duplex = 0;
1541 printk (KERN_INFO "Auto 100 Mbps, Half duplex\n");
1542 } else if (negotiate & ADVERTISE_10FULL) {
1543 np->speed = 10;
1544 np->full_duplex = 1;
1545 printk (KERN_INFO "Auto 10 Mbps, Full duplex\n");
1546 } else if (negotiate & ADVERTISE_10HALF) {
1547 np->speed = 10;
1548 np->full_duplex = 0;
1549 printk (KERN_INFO "Auto 10 Mbps, Half duplex\n");
1550 }
1551 if (negotiate & ADVERTISE_PAUSE_CAP) {
1552 np->tx_flow &= 1;
1553 np->rx_flow &= 1;
1554 } else if (negotiate & ADVERTISE_PAUSE_ASYM) {
1555 np->tx_flow = 0;
1556 np->rx_flow &= 1;
1557 }
1558
1559 } else {
1560 __u16 bmcr = mii_read (dev, phy_addr, MII_BMCR);
1561 switch (bmcr & (BMCR_SPEED100 | BMCR_SPEED1000)) {
1562 case BMCR_SPEED1000:
1563 printk (KERN_INFO "Operating at 1000 Mbps, ");
1564 break;
1565 case BMCR_SPEED100:
1566 printk (KERN_INFO "Operating at 100 Mbps, ");
1567 break;
1568 case 0:
1569 printk (KERN_INFO "Operating at 10 Mbps, ");
1570 }
1571 if (bmcr & BMCR_FULLDPLX) {
1572 printk (KERN_CONT "Full duplex\n");
1573 } else {
1574 printk (KERN_CONT "Half duplex\n");
1575 }
1576 }
1577 if (np->tx_flow)
1578 printk(KERN_INFO "Enable Tx Flow Control\n");
1579 else
1580 printk(KERN_INFO "Disable Tx Flow Control\n");
1581 if (np->rx_flow)
1582 printk(KERN_INFO "Enable Rx Flow Control\n");
1583 else
1584 printk(KERN_INFO "Disable Rx Flow Control\n");
1585
1586 return 0;
1587}
1588
1589static int
1590mii_set_media (struct net_device *dev)
1591{
1592 __u16 pscr;
1593 __u16 bmcr;
1594 __u16 bmsr;
1595 __u16 anar;
1596 int phy_addr;
1597 struct netdev_private *np;
1598 np = netdev_priv(dev);
1599 phy_addr = np->phy_addr;
1600
1601
1602 if (np->an_enable) {
1603
1604 bmsr = mii_read (dev, phy_addr, MII_BMSR);
1605 anar = mii_read (dev, phy_addr, MII_ADVERTISE) &
1606 ~(ADVERTISE_100FULL | ADVERTISE_10FULL |
1607 ADVERTISE_100HALF | ADVERTISE_10HALF |
1608 ADVERTISE_100BASE4);
1609 if (bmsr & BMSR_100FULL)
1610 anar |= ADVERTISE_100FULL;
1611 if (bmsr & BMSR_100HALF)
1612 anar |= ADVERTISE_100HALF;
1613 if (bmsr & BMSR_100BASE4)
1614 anar |= ADVERTISE_100BASE4;
1615 if (bmsr & BMSR_10FULL)
1616 anar |= ADVERTISE_10FULL;
1617 if (bmsr & BMSR_10HALF)
1618 anar |= ADVERTISE_10HALF;
1619 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
1620 mii_write (dev, phy_addr, MII_ADVERTISE, anar);
1621
1622
1623 pscr = mii_read (dev, phy_addr, MII_PHY_SCR);
1624 pscr |= 3 << 5;
1625 mii_write (dev, phy_addr, MII_PHY_SCR, pscr);
1626
1627
1628 mii_write (dev, phy_addr, MII_BMCR, BMCR_RESET);
1629 bmcr = BMCR_ANENABLE | BMCR_ANRESTART | BMCR_RESET;
1630 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1631 mdelay(1);
1632 } else {
1633
1634
1635 pscr = mii_read (dev, phy_addr, MII_PHY_SCR);
1636 pscr &= ~(3 << 5);
1637 mii_write (dev, phy_addr, MII_PHY_SCR, pscr);
1638
1639
1640 bmcr = mii_read (dev, phy_addr, MII_BMCR);
1641 bmcr |= BMCR_RESET;
1642 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1643
1644
1645 bmcr = 0x1940;
1646 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1647 mdelay (100);
1648
1649
1650 mii_write (dev, phy_addr, MII_ADVERTISE, 0);
1651
1652
1653 bmcr = BMCR_PDOWN;
1654 if (np->speed == 100) {
1655 bmcr |= BMCR_SPEED100;
1656 printk (KERN_INFO "Manual 100 Mbps, ");
1657 } else if (np->speed == 10) {
1658 printk (KERN_INFO "Manual 10 Mbps, ");
1659 }
1660 if (np->full_duplex) {
1661 bmcr |= BMCR_FULLDPLX;
1662 printk (KERN_CONT "Full duplex\n");
1663 } else {
1664 printk (KERN_CONT "Half duplex\n");
1665 }
1666#if 0
1667
1668 mscr = mii_read (dev, phy_addr, MII_CTRL1000);
1669 mscr |= MII_MSCR_CFG_ENABLE;
1670 mscr &= ~MII_MSCR_CFG_VALUE = 0;
1671#endif
1672 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1673 mdelay(10);
1674 }
1675 return 0;
1676}
1677
1678static int
1679mii_get_media_pcs (struct net_device *dev)
1680{
1681 __u16 negotiate;
1682 __u16 bmsr;
1683 int phy_addr;
1684 struct netdev_private *np;
1685
1686 np = netdev_priv(dev);
1687 phy_addr = np->phy_addr;
1688
1689 bmsr = mii_read (dev, phy_addr, PCS_BMSR);
1690 if (np->an_enable) {
1691 if (!(bmsr & BMSR_ANEGCOMPLETE)) {
1692
1693 return -1;
1694 }
1695 negotiate = mii_read (dev, phy_addr, PCS_ANAR) &
1696 mii_read (dev, phy_addr, PCS_ANLPAR);
1697 np->speed = 1000;
1698 if (negotiate & PCS_ANAR_FULL_DUPLEX) {
1699 printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n");
1700 np->full_duplex = 1;
1701 } else {
1702 printk (KERN_INFO "Auto 1000 Mbps, half duplex\n");
1703 np->full_duplex = 0;
1704 }
1705 if (negotiate & PCS_ANAR_PAUSE) {
1706 np->tx_flow &= 1;
1707 np->rx_flow &= 1;
1708 } else if (negotiate & PCS_ANAR_ASYMMETRIC) {
1709 np->tx_flow = 0;
1710 np->rx_flow &= 1;
1711 }
1712
1713 } else {
1714 __u16 bmcr = mii_read (dev, phy_addr, PCS_BMCR);
1715 printk (KERN_INFO "Operating at 1000 Mbps, ");
1716 if (bmcr & BMCR_FULLDPLX) {
1717 printk (KERN_CONT "Full duplex\n");
1718 } else {
1719 printk (KERN_CONT "Half duplex\n");
1720 }
1721 }
1722 if (np->tx_flow)
1723 printk(KERN_INFO "Enable Tx Flow Control\n");
1724 else
1725 printk(KERN_INFO "Disable Tx Flow Control\n");
1726 if (np->rx_flow)
1727 printk(KERN_INFO "Enable Rx Flow Control\n");
1728 else
1729 printk(KERN_INFO "Disable Rx Flow Control\n");
1730
1731 return 0;
1732}
1733
1734static int
1735mii_set_media_pcs (struct net_device *dev)
1736{
1737 __u16 bmcr;
1738 __u16 esr;
1739 __u16 anar;
1740 int phy_addr;
1741 struct netdev_private *np;
1742 np = netdev_priv(dev);
1743 phy_addr = np->phy_addr;
1744
1745
1746 if (np->an_enable) {
1747
1748 esr = mii_read (dev, phy_addr, PCS_ESR);
1749 anar = mii_read (dev, phy_addr, MII_ADVERTISE) &
1750 ~PCS_ANAR_HALF_DUPLEX &
1751 ~PCS_ANAR_FULL_DUPLEX;
1752 if (esr & (MII_ESR_1000BT_HD | MII_ESR_1000BX_HD))
1753 anar |= PCS_ANAR_HALF_DUPLEX;
1754 if (esr & (MII_ESR_1000BT_FD | MII_ESR_1000BX_FD))
1755 anar |= PCS_ANAR_FULL_DUPLEX;
1756 anar |= PCS_ANAR_PAUSE | PCS_ANAR_ASYMMETRIC;
1757 mii_write (dev, phy_addr, MII_ADVERTISE, anar);
1758
1759
1760 mii_write (dev, phy_addr, MII_BMCR, BMCR_RESET);
1761 bmcr = BMCR_ANENABLE | BMCR_ANRESTART | BMCR_RESET;
1762 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1763 mdelay(1);
1764 } else {
1765
1766
1767 bmcr = BMCR_RESET;
1768 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1769 mdelay(10);
1770 if (np->full_duplex) {
1771 bmcr = BMCR_FULLDPLX;
1772 printk (KERN_INFO "Manual full duplex\n");
1773 } else {
1774 bmcr = 0;
1775 printk (KERN_INFO "Manual half duplex\n");
1776 }
1777 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1778 mdelay(10);
1779
1780
1781 mii_write (dev, phy_addr, MII_ADVERTISE, 0);
1782 }
1783 return 0;
1784}
1785
1786
1787static int
1788rio_close (struct net_device *dev)
1789{
1790 struct netdev_private *np = netdev_priv(dev);
1791 struct pci_dev *pdev = np->pdev;
1792
1793 netif_stop_queue (dev);
1794
1795 rio_hw_stop(dev);
1796
1797 free_irq(pdev->irq, dev);
1798 del_timer_sync (&np->timer);
1799
1800 free_list(dev);
1801
1802 return 0;
1803}
1804
1805static void
1806rio_remove1 (struct pci_dev *pdev)
1807{
1808 struct net_device *dev = pci_get_drvdata (pdev);
1809
1810 if (dev) {
1811 struct netdev_private *np = netdev_priv(dev);
1812
1813 unregister_netdev (dev);
1814 pci_free_consistent (pdev, RX_TOTAL_SIZE, np->rx_ring,
1815 np->rx_ring_dma);
1816 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring,
1817 np->tx_ring_dma);
1818#ifdef MEM_MAPPING
1819 pci_iounmap(pdev, np->ioaddr);
1820#endif
1821 pci_iounmap(pdev, np->eeprom_addr);
1822 free_netdev (dev);
1823 pci_release_regions (pdev);
1824 pci_disable_device (pdev);
1825 }
1826}
1827
1828#ifdef CONFIG_PM_SLEEP
1829static int rio_suspend(struct device *device)
1830{
1831 struct net_device *dev = dev_get_drvdata(device);
1832 struct netdev_private *np = netdev_priv(dev);
1833
1834 if (!netif_running(dev))
1835 return 0;
1836
1837 netif_device_detach(dev);
1838 del_timer_sync(&np->timer);
1839 rio_hw_stop(dev);
1840
1841 return 0;
1842}
1843
1844static int rio_resume(struct device *device)
1845{
1846 struct net_device *dev = dev_get_drvdata(device);
1847 struct netdev_private *np = netdev_priv(dev);
1848
1849 if (!netif_running(dev))
1850 return 0;
1851
1852 rio_reset_ring(np);
1853 rio_hw_init(dev);
1854 np->timer.expires = jiffies + 1 * HZ;
1855 add_timer(&np->timer);
1856 netif_device_attach(dev);
1857 dl2k_enable_int(np);
1858
1859 return 0;
1860}
1861
1862static SIMPLE_DEV_PM_OPS(rio_pm_ops, rio_suspend, rio_resume);
1863#define RIO_PM_OPS (&rio_pm_ops)
1864
1865#else
1866
1867#define RIO_PM_OPS NULL
1868
1869#endif
1870
1871static struct pci_driver rio_driver = {
1872 .name = "dl2k",
1873 .id_table = rio_pci_tbl,
1874 .probe = rio_probe1,
1875 .remove = rio_remove1,
1876 .driver.pm = RIO_PM_OPS,
1877};
1878
1879module_pci_driver(rio_driver);
1880
1881
1882
1883
1884
1885
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1890
