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5
6source "drivers/pci/pcie/Kconfig"
7
8config PCI_MSI
9 bool "Message Signaled Interrupts (MSI and MSI-X)"
10 depends on PCI
11 select GENERIC_MSI_IRQ
12 help
13 This allows device drivers to enable MSI (Message Signaled
14 Interrupts). Message Signaled Interrupts enable a device to
15 generate an interrupt using an inbound Memory Write on its
16 PCI bus instead of asserting a device IRQ pin.
17
18 Use of PCI MSI interrupts can be disabled at kernel boot time
19 by using the 'pci=nomsi' option. This disables MSI for the
20 entire system.
21
22 If you don't know what to do here, say Y.
23
24config PCI_MSI_IRQ_DOMAIN
25 def_bool ARC || ARM || ARM64 || X86
26 depends on PCI_MSI
27 select GENERIC_MSI_IRQ_DOMAIN
28
29config PCI_QUIRKS
30 default y
31 bool "Enable PCI quirk workarounds" if EXPERT
32 depends on PCI
33 help
34 This enables workarounds for various PCI chipset bugs/quirks.
35 Disable this only if your target machine is unaffected by PCI
36 quirks.
37
38config PCI_DEBUG
39 bool "PCI Debugging"
40 depends on PCI && DEBUG_KERNEL
41 help
42 Say Y here if you want the PCI core to produce a bunch of debug
43 messages to the system log. Select this if you are having a
44 problem with PCI support and want to see more of what is going on.
45
46 When in doubt, say N.
47
48config PCI_REALLOC_ENABLE_AUTO
49 bool "Enable PCI resource re-allocation detection"
50 depends on PCI
51 depends on PCI_IOV
52 help
53 Say Y here if you want the PCI core to detect if PCI resource
54 re-allocation needs to be enabled. You can always use pci=realloc=on
55 or pci=realloc=off to override it. It will automatically
56 re-allocate PCI resources if SR-IOV BARs have not been allocated by
57 the BIOS.
58
59 When in doubt, say N.
60
61config PCI_STUB
62 tristate "PCI Stub driver"
63 depends on PCI
64 help
65 Say Y or M here if you want be able to reserve a PCI device
66 when it is going to be assigned to a guest operating system.
67
68 When in doubt, say N.
69
70config PCI_PF_STUB
71 tristate "PCI PF Stub driver"
72 depends on PCI
73 depends on PCI_IOV
74 help
75 Say Y or M here if you want to enable support for devices that
76 require SR-IOV support, while at the same time the PF (Physical
77 Function) itself is not providing any actual services on the
78 host itself such as storage or networking.
79
80 When in doubt, say N.
81
82config XEN_PCIDEV_FRONTEND
83 tristate "Xen PCI Frontend"
84 depends on PCI && X86 && XEN
85 select PCI_XEN
86 select XEN_XENBUS_FRONTEND
87 default y
88 help
89 The PCI device frontend driver allows the kernel to import arbitrary
90 PCI devices from a PCI backend to support PCI driver domains.
91
92config PCI_ATS
93 bool
94
95config PCI_ECAM
96 bool
97
98config PCI_LOCKLESS_CONFIG
99 bool
100
101config PCI_IOV
102 bool "PCI IOV support"
103 depends on PCI
104 select PCI_ATS
105 help
106 I/O Virtualization is a PCI feature supported by some devices
107 which allows them to create virtual devices which share their
108 physical resources.
109
110 If unsure, say N.
111
112config PCI_PRI
113 bool "PCI PRI support"
114 depends on PCI
115 select PCI_ATS
116 help
117 PRI is the PCI Page Request Interface. It allows PCI devices that are
118 behind an IOMMU to recover from page faults.
119
120 If unsure, say N.
121
122config PCI_PASID
123 bool "PCI PASID support"
124 depends on PCI
125 select PCI_ATS
126 help
127 Process Address Space Identifiers (PASIDs) can be used by PCI devices
128 to access more than one IO address space at the same time. To make
129 use of this feature an IOMMU is required which also supports PASIDs.
130 Select this option if you have such an IOMMU and want to compile the
131 driver for it into your kernel.
132
133 If unsure, say N.
134
135config PCI_P2PDMA
136 bool "PCI peer-to-peer transfer support"
137 depends on PCI && ZONE_DEVICE
138 select GENERIC_ALLOCATOR
139 help
140 Enableѕ drivers to do PCI peer-to-peer transactions to and from
141 BARs that are exposed in other devices that are the part of
142 the hierarchy where peer-to-peer DMA is guaranteed by the PCI
143 specification to work (ie. anything below a single PCI bridge).
144
145 Many PCIe root complexes do not support P2P transactions and
146 it's hard to tell which support it at all, so at this time,
147 P2P DMA transactions must be between devices behind the same root
148 port.
149
150 If unsure, say N.
151
152config PCI_LABEL
153 def_bool y if (DMI || ACPI)
154 depends on PCI
155 select NLS
156
157config PCI_HYPERV
158 tristate "Hyper-V PCI Frontend"
159 depends on X86 && HYPERV && PCI_MSI && PCI_MSI_IRQ_DOMAIN && X86_64
160 select PCI_HYPERV_INTERFACE
161 help
162 The PCI device frontend driver allows the kernel to import arbitrary
163 PCI devices from a PCI backend to support PCI driver domains.
164
165choice
166 prompt "PCI Express hierarchy optimization setting"
167 default PCIE_BUS_DEFAULT
168 depends on PCI && EXPERT
169 help
170 MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe
171 device parameters that affect performance and the ability to
172 support hotplug and peer-to-peer DMA.
173
174 The following choices set the MPS and MRRS optimization strategy
175 at compile-time. The choices are the same as those offered for
176 the kernel command-line parameter 'pci', i.e.,
177 'pci=pcie_bus_tune_off', 'pci=pcie_bus_safe',
178 'pci=pcie_bus_perf', and 'pci=pcie_bus_peer2peer'.
179
180 This is a compile-time setting and can be overridden by the above
181 command-line parameters. If unsure, choose PCIE_BUS_DEFAULT.
182
183config PCIE_BUS_TUNE_OFF
184 bool "Tune Off"
185 depends on PCI
186 help
187 Use the BIOS defaults; don't touch MPS at all. This is the same
188 as booting with 'pci=pcie_bus_tune_off'.
189
190config PCIE_BUS_DEFAULT
191 bool "Default"
192 depends on PCI
193 help
194 Default choice; ensure that the MPS matches upstream bridge.
195
196config PCIE_BUS_SAFE
197 bool "Safe"
198 depends on PCI
199 help
200 Use largest MPS that boot-time devices support. If you have a
201 closed system with no possibility of adding new devices, this
202 will use the largest MPS that's supported by all devices. This
203 is the same as booting with 'pci=pcie_bus_safe'.
204
205config PCIE_BUS_PERFORMANCE
206 bool "Performance"
207 depends on PCI
208 help
209 Use MPS and MRRS for best performance. Ensure that a given
210 device's MPS is no larger than its parent MPS, which allows us to
211 keep all switches/bridges to the max MPS supported by their
212 parent. This is the same as booting with 'pci=pcie_bus_perf'.
213
214config PCIE_BUS_PEER2PEER
215 bool "Peer2peer"
216 depends on PCI
217 help
218 Set MPS = 128 for all devices. MPS configuration effected by the
219 other options could cause the MPS on one root port to be
220 different than that of the MPS on another, which may cause
221 hot-added devices or peer-to-peer DMA to fail. Set MPS to the
222 smallest possible value (128B) system-wide to avoid these issues.
223 This is the same as booting with 'pci=pcie_bus_peer2peer'.
224
225endchoice
226
227source "drivers/pci/hotplug/Kconfig"
228source "drivers/pci/controller/Kconfig"
229source "drivers/pci/endpoint/Kconfig"
230source "drivers/pci/switch/Kconfig"
231
