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17#include <linux/bcd.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/gfp.h>
21#include <linux/delay.h>
22#include <linux/interrupt.h>
23#include <linux/rtc.h>
24#include <linux/platform_device.h>
25#include <linux/io.h>
26#include <linux/module.h>
27
28enum ds1511reg {
29 DS1511_SEC = 0x0,
30 DS1511_MIN = 0x1,
31 DS1511_HOUR = 0x2,
32 DS1511_DOW = 0x3,
33 DS1511_DOM = 0x4,
34 DS1511_MONTH = 0x5,
35 DS1511_YEAR = 0x6,
36 DS1511_CENTURY = 0x7,
37 DS1511_AM1_SEC = 0x8,
38 DS1511_AM2_MIN = 0x9,
39 DS1511_AM3_HOUR = 0xa,
40 DS1511_AM4_DATE = 0xb,
41 DS1511_WD_MSEC = 0xc,
42 DS1511_WD_SEC = 0xd,
43 DS1511_CONTROL_A = 0xe,
44 DS1511_CONTROL_B = 0xf,
45 DS1511_RAMADDR_LSB = 0x10,
46 DS1511_RAMDATA = 0x13
47};
48
49#define DS1511_BLF1 0x80
50#define DS1511_BLF2 0x40
51#define DS1511_PRS 0x20
52#define DS1511_PAB 0x10
53#define DS1511_TDF 0x08
54#define DS1511_KSF 0x04
55#define DS1511_WDF 0x02
56#define DS1511_IRQF 0x01
57#define DS1511_TE 0x80
58#define DS1511_CS 0x40
59#define DS1511_BME 0x20
60#define DS1511_TPE 0x10
61#define DS1511_TIE 0x08
62#define DS1511_KIE 0x04
63#define DS1511_WDE 0x02
64#define DS1511_WDS 0x01
65#define DS1511_RAM_MAX 0x100
66
67#define RTC_CMD DS1511_CONTROL_B
68#define RTC_CMD1 DS1511_CONTROL_A
69
70#define RTC_ALARM_SEC DS1511_AM1_SEC
71#define RTC_ALARM_MIN DS1511_AM2_MIN
72#define RTC_ALARM_HOUR DS1511_AM3_HOUR
73#define RTC_ALARM_DATE DS1511_AM4_DATE
74
75#define RTC_SEC DS1511_SEC
76#define RTC_MIN DS1511_MIN
77#define RTC_HOUR DS1511_HOUR
78#define RTC_DOW DS1511_DOW
79#define RTC_DOM DS1511_DOM
80#define RTC_MON DS1511_MONTH
81#define RTC_YEAR DS1511_YEAR
82#define RTC_CENTURY DS1511_CENTURY
83
84#define RTC_TIE DS1511_TIE
85#define RTC_TE DS1511_TE
86
87struct rtc_plat_data {
88 struct rtc_device *rtc;
89 void __iomem *ioaddr;
90 int irq;
91 unsigned int irqen;
92 int alrm_sec;
93 int alrm_min;
94 int alrm_hour;
95 int alrm_mday;
96 spinlock_t lock;
97};
98
99static DEFINE_SPINLOCK(ds1511_lock);
100
101static __iomem char *ds1511_base;
102static u32 reg_spacing = 1;
103
104static noinline void
105rtc_write(uint8_t val, uint32_t reg)
106{
107 writeb(val, ds1511_base + (reg * reg_spacing));
108}
109
110static inline void
111rtc_write_alarm(uint8_t val, enum ds1511reg reg)
112{
113 rtc_write((val | 0x80), reg);
114}
115
116static noinline uint8_t
117rtc_read(enum ds1511reg reg)
118{
119 return readb(ds1511_base + (reg * reg_spacing));
120}
121
122static inline void
123rtc_disable_update(void)
124{
125 rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
126}
127
128static void
129rtc_enable_update(void)
130{
131 rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
132}
133
134
135
136
137
138
139
140#ifdef DS1511_WDOG_RESET_SUPPORT
141
142
143
144
145void
146ds1511_wdog_set(unsigned long deciseconds)
147{
148
149
150
151 deciseconds %= 10000;
152
153
154
155 rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC);
156 rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC);
157
158
159
160 rtc_write(rtc_read(RTC_CMD) | DS1511_WDE | DS1511_WDS, RTC_CMD);
161}
162
163void
164ds1511_wdog_disable(void)
165{
166
167
168
169 rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
170
171
172
173 rtc_write(0, DS1511_WD_MSEC);
174 rtc_write(0, DS1511_WD_SEC);
175}
176#endif
177
178
179
180
181
182
183static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
184{
185 u8 mon, day, dow, hrs, min, sec, yrs, cen;
186 unsigned long flags;
187
188
189
190
191 if (rtc_tm->tm_year < 1900)
192 rtc_tm->tm_year += 1900;
193
194 if (rtc_tm->tm_year < 1970)
195 return -EINVAL;
196
197 yrs = rtc_tm->tm_year % 100;
198 cen = rtc_tm->tm_year / 100;
199 mon = rtc_tm->tm_mon + 1;
200 day = rtc_tm->tm_mday;
201 dow = rtc_tm->tm_wday & 0x7;
202 hrs = rtc_tm->tm_hour;
203 min = rtc_tm->tm_min;
204 sec = rtc_tm->tm_sec;
205
206 if ((mon > 12) || (day == 0))
207 return -EINVAL;
208
209 if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year))
210 return -EINVAL;
211
212 if ((hrs >= 24) || (min >= 60) || (sec >= 60))
213 return -EINVAL;
214
215
216
217
218 sec = bin2bcd(sec) & 0x7f;
219 min = bin2bcd(min) & 0x7f;
220 hrs = bin2bcd(hrs) & 0x3f;
221 day = bin2bcd(day) & 0x3f;
222 mon = bin2bcd(mon) & 0x1f;
223 yrs = bin2bcd(yrs) & 0xff;
224 cen = bin2bcd(cen) & 0xff;
225
226 spin_lock_irqsave(&ds1511_lock, flags);
227 rtc_disable_update();
228 rtc_write(cen, RTC_CENTURY);
229 rtc_write(yrs, RTC_YEAR);
230 rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
231 rtc_write(day, RTC_DOM);
232 rtc_write(hrs, RTC_HOUR);
233 rtc_write(min, RTC_MIN);
234 rtc_write(sec, RTC_SEC);
235 rtc_write(dow, RTC_DOW);
236 rtc_enable_update();
237 spin_unlock_irqrestore(&ds1511_lock, flags);
238
239 return 0;
240}
241
242static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
243{
244 unsigned int century;
245 unsigned long flags;
246
247 spin_lock_irqsave(&ds1511_lock, flags);
248 rtc_disable_update();
249
250 rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
251 rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
252 rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
253 rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
254 rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
255 rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
256 rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
257 century = rtc_read(RTC_CENTURY);
258
259 rtc_enable_update();
260 spin_unlock_irqrestore(&ds1511_lock, flags);
261
262 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
263 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
264 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
265 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
266 rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
267 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
268 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
269 century = bcd2bin(century) * 100;
270
271
272
273
274
275 century += rtc_tm->tm_year;
276 rtc_tm->tm_year = century - 1900;
277
278 rtc_tm->tm_mon--;
279
280 return 0;
281}
282
283
284
285
286
287
288
289
290
291static void
292ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
293{
294 unsigned long flags;
295
296 spin_lock_irqsave(&pdata->lock, flags);
297 rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
298 0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
299 RTC_ALARM_DATE);
300 rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
301 0x80 : bin2bcd(pdata->alrm_hour) & 0x3f,
302 RTC_ALARM_HOUR);
303 rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
304 0x80 : bin2bcd(pdata->alrm_min) & 0x7f,
305 RTC_ALARM_MIN);
306 rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
307 0x80 : bin2bcd(pdata->alrm_sec) & 0x7f,
308 RTC_ALARM_SEC);
309 rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
310 rtc_read(RTC_CMD1);
311 spin_unlock_irqrestore(&pdata->lock, flags);
312}
313
314static int
315ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
316{
317 struct rtc_plat_data *pdata = dev_get_drvdata(dev);
318
319 if (pdata->irq <= 0)
320 return -EINVAL;
321
322 pdata->alrm_mday = alrm->time.tm_mday;
323 pdata->alrm_hour = alrm->time.tm_hour;
324 pdata->alrm_min = alrm->time.tm_min;
325 pdata->alrm_sec = alrm->time.tm_sec;
326 if (alrm->enabled)
327 pdata->irqen |= RTC_AF;
328
329 ds1511_rtc_update_alarm(pdata);
330 return 0;
331}
332
333static int
334ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
335{
336 struct rtc_plat_data *pdata = dev_get_drvdata(dev);
337
338 if (pdata->irq <= 0)
339 return -EINVAL;
340
341 alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
342 alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
343 alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
344 alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
345 alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
346 return 0;
347}
348
349static irqreturn_t
350ds1511_interrupt(int irq, void *dev_id)
351{
352 struct platform_device *pdev = dev_id;
353 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
354 unsigned long events = 0;
355
356 spin_lock(&pdata->lock);
357
358
359
360 if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
361 events = RTC_IRQF;
362 if (rtc_read(RTC_ALARM_SEC) & 0x80)
363 events |= RTC_UF;
364 else
365 events |= RTC_AF;
366 rtc_update_irq(pdata->rtc, 1, events);
367 }
368 spin_unlock(&pdata->lock);
369 return events ? IRQ_HANDLED : IRQ_NONE;
370}
371
372static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
373{
374 struct rtc_plat_data *pdata = dev_get_drvdata(dev);
375
376 if (pdata->irq <= 0)
377 return -EINVAL;
378 if (enabled)
379 pdata->irqen |= RTC_AF;
380 else
381 pdata->irqen &= ~RTC_AF;
382 ds1511_rtc_update_alarm(pdata);
383 return 0;
384}
385
386static const struct rtc_class_ops ds1511_rtc_ops = {
387 .read_time = ds1511_rtc_read_time,
388 .set_time = ds1511_rtc_set_time,
389 .read_alarm = ds1511_rtc_read_alarm,
390 .set_alarm = ds1511_rtc_set_alarm,
391 .alarm_irq_enable = ds1511_rtc_alarm_irq_enable,
392};
393
394static int ds1511_nvram_read(void *priv, unsigned int pos, void *buf,
395 size_t size)
396{
397 int i;
398
399 rtc_write(pos, DS1511_RAMADDR_LSB);
400 for (i = 0; i < size; i++)
401 *(char *)buf++ = rtc_read(DS1511_RAMDATA);
402
403 return 0;
404}
405
406static int ds1511_nvram_write(void *priv, unsigned int pos, void *buf,
407 size_t size)
408{
409 int i;
410
411 rtc_write(pos, DS1511_RAMADDR_LSB);
412 for (i = 0; i < size; i++)
413 rtc_write(*(char *)buf++, DS1511_RAMDATA);
414
415 return 0;
416}
417
418static int ds1511_rtc_probe(struct platform_device *pdev)
419{
420 struct resource *res;
421 struct rtc_plat_data *pdata;
422 int ret = 0;
423 struct nvmem_config ds1511_nvmem_cfg = {
424 .name = "ds1511_nvram",
425 .word_size = 1,
426 .stride = 1,
427 .size = DS1511_RAM_MAX,
428 .reg_read = ds1511_nvram_read,
429 .reg_write = ds1511_nvram_write,
430 .priv = &pdev->dev,
431 };
432
433 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
434 if (!pdata)
435 return -ENOMEM;
436
437 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
438 ds1511_base = devm_ioremap_resource(&pdev->dev, res);
439 if (IS_ERR(ds1511_base))
440 return PTR_ERR(ds1511_base);
441 pdata->ioaddr = ds1511_base;
442 pdata->irq = platform_get_irq(pdev, 0);
443
444
445
446
447 rtc_write(DS1511_BME, RTC_CMD);
448 rtc_write(0, RTC_CMD1);
449
450
451
452 rtc_write(0, DS1511_WD_MSEC);
453 rtc_write(0, DS1511_WD_SEC);
454
455
456
457 rtc_enable_update();
458
459
460
461
462 if (rtc_read(RTC_CMD1) & DS1511_BLF1)
463 dev_warn(&pdev->dev, "voltage-low detected.\n");
464
465 spin_lock_init(&pdata->lock);
466 platform_set_drvdata(pdev, pdata);
467
468 pdata->rtc = devm_rtc_allocate_device(&pdev->dev);
469 if (IS_ERR(pdata->rtc))
470 return PTR_ERR(pdata->rtc);
471
472 pdata->rtc->ops = &ds1511_rtc_ops;
473
474 pdata->rtc->nvram_old_abi = true;
475
476 ret = rtc_register_device(pdata->rtc);
477 if (ret)
478 return ret;
479
480 rtc_nvmem_register(pdata->rtc, &ds1511_nvmem_cfg);
481
482
483
484
485
486 if (pdata->irq > 0) {
487 rtc_read(RTC_CMD1);
488 if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
489 IRQF_SHARED, pdev->name, pdev) < 0) {
490
491 dev_warn(&pdev->dev, "interrupt not available.\n");
492 pdata->irq = 0;
493 }
494 }
495
496 return 0;
497}
498
499
500MODULE_ALIAS("platform:ds1511");
501
502static struct platform_driver ds1511_rtc_driver = {
503 .probe = ds1511_rtc_probe,
504 .driver = {
505 .name = "ds1511",
506 },
507};
508
509module_platform_driver(ds1511_rtc_driver);
510
511MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>");
512MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
513MODULE_LICENSE("GPL");
514