linux/drivers/usb/host/ehci-hcd.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Enhanced Host Controller Interface (EHCI) driver for USB.
   4 *
   5 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   6 *
   7 * Copyright (c) 2000-2004 by David Brownell
   8 */
   9
  10#include <linux/module.h>
  11#include <linux/pci.h>
  12#include <linux/dmapool.h>
  13#include <linux/kernel.h>
  14#include <linux/delay.h>
  15#include <linux/ioport.h>
  16#include <linux/sched.h>
  17#include <linux/vmalloc.h>
  18#include <linux/errno.h>
  19#include <linux/init.h>
  20#include <linux/hrtimer.h>
  21#include <linux/list.h>
  22#include <linux/interrupt.h>
  23#include <linux/usb.h>
  24#include <linux/usb/hcd.h>
  25#include <linux/usb/otg.h>
  26#include <linux/moduleparam.h>
  27#include <linux/dma-mapping.h>
  28#include <linux/debugfs.h>
  29#include <linux/slab.h>
  30
  31#include <asm/byteorder.h>
  32#include <asm/io.h>
  33#include <asm/irq.h>
  34#include <asm/unaligned.h>
  35
  36#if defined(CONFIG_PPC_PS3)
  37#include <asm/firmware.h>
  38#endif
  39
  40/*-------------------------------------------------------------------------*/
  41
  42/*
  43 * EHCI hc_driver implementation ... experimental, incomplete.
  44 * Based on the final 1.0 register interface specification.
  45 *
  46 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
  47 * First was PCMCIA, like ISA; then CardBus, which is PCI.
  48 * Next comes "CardBay", using USB 2.0 signals.
  49 *
  50 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
  51 * Special thanks to Intel and VIA for providing host controllers to
  52 * test this driver on, and Cypress (including In-System Design) for
  53 * providing early devices for those host controllers to talk to!
  54 */
  55
  56#define DRIVER_AUTHOR "David Brownell"
  57#define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
  58
  59static const char       hcd_name [] = "ehci_hcd";
  60
  61
  62#undef EHCI_URB_TRACE
  63
  64/* magic numbers that can affect system performance */
  65#define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
  66#define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
  67#define EHCI_TUNE_RL_TT         0
  68#define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
  69#define EHCI_TUNE_MULT_TT       1
  70/*
  71 * Some drivers think it's safe to schedule isochronous transfers more than
  72 * 256 ms into the future (partly as a result of an old bug in the scheduling
  73 * code).  In an attempt to avoid trouble, we will use a minimum scheduling
  74 * length of 512 frames instead of 256.
  75 */
  76#define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
  77
  78/* Initial IRQ latency:  faster than hw default */
  79static int log2_irq_thresh;             // 0 to 6
  80module_param (log2_irq_thresh, int, S_IRUGO);
  81MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
  82
  83/* initial park setting:  slower than hw default */
  84static unsigned park;
  85module_param (park, uint, S_IRUGO);
  86MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
  87
  88/* for flakey hardware, ignore overcurrent indicators */
  89static bool ignore_oc;
  90module_param (ignore_oc, bool, S_IRUGO);
  91MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
  92
  93#define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
  94
  95/*-------------------------------------------------------------------------*/
  96
  97#include "ehci.h"
  98#include "pci-quirks.h"
  99
 100static void compute_tt_budget(u8 budget_table[EHCI_BANDWIDTH_SIZE],
 101                struct ehci_tt *tt);
 102
 103/*
 104 * The MosChip MCS9990 controller updates its microframe counter
 105 * a little before the frame counter, and occasionally we will read
 106 * the invalid intermediate value.  Avoid problems by checking the
 107 * microframe number (the low-order 3 bits); if they are 0 then
 108 * re-read the register to get the correct value.
 109 */
 110static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci)
 111{
 112        unsigned uf;
 113
 114        uf = ehci_readl(ehci, &ehci->regs->frame_index);
 115        if (unlikely((uf & 7) == 0))
 116                uf = ehci_readl(ehci, &ehci->regs->frame_index);
 117        return uf;
 118}
 119
 120static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
 121{
 122        if (ehci->frame_index_bug)
 123                return ehci_moschip_read_frame_index(ehci);
 124        return ehci_readl(ehci, &ehci->regs->frame_index);
 125}
 126
 127#include "ehci-dbg.c"
 128
 129/*-------------------------------------------------------------------------*/
 130
 131/*
 132 * ehci_handshake - spin reading hc until handshake completes or fails
 133 * @ptr: address of hc register to be read
 134 * @mask: bits to look at in result of read
 135 * @done: value of those bits when handshake succeeds
 136 * @usec: timeout in microseconds
 137 *
 138 * Returns negative errno, or zero on success
 139 *
 140 * Success happens when the "mask" bits have the specified value (hardware
 141 * handshake done).  There are two failure modes:  "usec" have passed (major
 142 * hardware flakeout), or the register reads as all-ones (hardware removed).
 143 *
 144 * That last failure should_only happen in cases like physical cardbus eject
 145 * before driver shutdown. But it also seems to be caused by bugs in cardbus
 146 * bridge shutdown:  shutting down the bridge before the devices using it.
 147 */
 148int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr,
 149                   u32 mask, u32 done, int usec)
 150{
 151        u32     result;
 152
 153        do {
 154                result = ehci_readl(ehci, ptr);
 155                if (result == ~(u32)0)          /* card removed */
 156                        return -ENODEV;
 157                result &= mask;
 158                if (result == done)
 159                        return 0;
 160                udelay (1);
 161                usec--;
 162        } while (usec > 0);
 163        return -ETIMEDOUT;
 164}
 165EXPORT_SYMBOL_GPL(ehci_handshake);
 166
 167/* check TDI/ARC silicon is in host mode */
 168static int tdi_in_host_mode (struct ehci_hcd *ehci)
 169{
 170        u32             tmp;
 171
 172        tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 173        return (tmp & 3) == USBMODE_CM_HC;
 174}
 175
 176/*
 177 * Force HC to halt state from unknown (EHCI spec section 2.3).
 178 * Must be called with interrupts enabled and the lock not held.
 179 */
 180static int ehci_halt (struct ehci_hcd *ehci)
 181{
 182        u32     temp;
 183
 184        spin_lock_irq(&ehci->lock);
 185
 186        /* disable any irqs left enabled by previous code */
 187        ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 188
 189        if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
 190                spin_unlock_irq(&ehci->lock);
 191                return 0;
 192        }
 193
 194        /*
 195         * This routine gets called during probe before ehci->command
 196         * has been initialized, so we can't rely on its value.
 197         */
 198        ehci->command &= ~CMD_RUN;
 199        temp = ehci_readl(ehci, &ehci->regs->command);
 200        temp &= ~(CMD_RUN | CMD_IAAD);
 201        ehci_writel(ehci, temp, &ehci->regs->command);
 202
 203        spin_unlock_irq(&ehci->lock);
 204        synchronize_irq(ehci_to_hcd(ehci)->irq);
 205
 206        return ehci_handshake(ehci, &ehci->regs->status,
 207                          STS_HALT, STS_HALT, 16 * 125);
 208}
 209
 210/* put TDI/ARC silicon into EHCI mode */
 211static void tdi_reset (struct ehci_hcd *ehci)
 212{
 213        u32             tmp;
 214
 215        tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 216        tmp |= USBMODE_CM_HC;
 217        /* The default byte access to MMR space is LE after
 218         * controller reset. Set the required endian mode
 219         * for transfer buffers to match the host microprocessor
 220         */
 221        if (ehci_big_endian_mmio(ehci))
 222                tmp |= USBMODE_BE;
 223        ehci_writel(ehci, tmp, &ehci->regs->usbmode);
 224}
 225
 226/*
 227 * Reset a non-running (STS_HALT == 1) controller.
 228 * Must be called with interrupts enabled and the lock not held.
 229 */
 230int ehci_reset(struct ehci_hcd *ehci)
 231{
 232        int     retval;
 233        u32     command = ehci_readl(ehci, &ehci->regs->command);
 234
 235        /* If the EHCI debug controller is active, special care must be
 236         * taken before and after a host controller reset */
 237        if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
 238                ehci->debug = NULL;
 239
 240        command |= CMD_RESET;
 241        dbg_cmd (ehci, "reset", command);
 242        ehci_writel(ehci, command, &ehci->regs->command);
 243        ehci->rh_state = EHCI_RH_HALTED;
 244        ehci->next_statechange = jiffies;
 245        retval = ehci_handshake(ehci, &ehci->regs->command,
 246                            CMD_RESET, 0, 250 * 1000);
 247
 248        if (ehci->has_hostpc) {
 249                ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
 250                                &ehci->regs->usbmode_ex);
 251                ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
 252        }
 253        if (retval)
 254                return retval;
 255
 256        if (ehci_is_TDI(ehci))
 257                tdi_reset (ehci);
 258
 259        if (ehci->debug)
 260                dbgp_external_startup(ehci_to_hcd(ehci));
 261
 262        ehci->port_c_suspend = ehci->suspended_ports =
 263                        ehci->resuming_ports = 0;
 264        return retval;
 265}
 266EXPORT_SYMBOL_GPL(ehci_reset);
 267
 268/*
 269 * Idle the controller (turn off the schedules).
 270 * Must be called with interrupts enabled and the lock not held.
 271 */
 272static void ehci_quiesce (struct ehci_hcd *ehci)
 273{
 274        u32     temp;
 275
 276        if (ehci->rh_state != EHCI_RH_RUNNING)
 277                return;
 278
 279        /* wait for any schedule enables/disables to take effect */
 280        temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
 281        ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp,
 282                        16 * 125);
 283
 284        /* then disable anything that's still active */
 285        spin_lock_irq(&ehci->lock);
 286        ehci->command &= ~(CMD_ASE | CMD_PSE);
 287        ehci_writel(ehci, ehci->command, &ehci->regs->command);
 288        spin_unlock_irq(&ehci->lock);
 289
 290        /* hardware can take 16 microframes to turn off ... */
 291        ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0,
 292                        16 * 125);
 293}
 294
 295/*-------------------------------------------------------------------------*/
 296
 297static void end_iaa_cycle(struct ehci_hcd *ehci);
 298static void end_unlink_async(struct ehci_hcd *ehci);
 299static void unlink_empty_async(struct ehci_hcd *ehci);
 300static void ehci_work(struct ehci_hcd *ehci);
 301static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 302static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 303static int ehci_port_power(struct ehci_hcd *ehci, int portnum, bool enable);
 304
 305#include "ehci-timer.c"
 306#include "ehci-hub.c"
 307#include "ehci-mem.c"
 308#include "ehci-q.c"
 309#include "ehci-sched.c"
 310#include "ehci-sysfs.c"
 311
 312/*-------------------------------------------------------------------------*/
 313
 314/* On some systems, leaving remote wakeup enabled prevents system shutdown.
 315 * The firmware seems to think that powering off is a wakeup event!
 316 * This routine turns off remote wakeup and everything else, on all ports.
 317 */
 318static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
 319{
 320        int     port = HCS_N_PORTS(ehci->hcs_params);
 321
 322        while (port--) {
 323                spin_unlock_irq(&ehci->lock);
 324                ehci_port_power(ehci, port, false);
 325                spin_lock_irq(&ehci->lock);
 326                ehci_writel(ehci, PORT_RWC_BITS,
 327                                &ehci->regs->port_status[port]);
 328        }
 329}
 330
 331/*
 332 * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
 333 * Must be called with interrupts enabled and the lock not held.
 334 */
 335static void ehci_silence_controller(struct ehci_hcd *ehci)
 336{
 337        ehci_halt(ehci);
 338
 339        spin_lock_irq(&ehci->lock);
 340        ehci->rh_state = EHCI_RH_HALTED;
 341        ehci_turn_off_all_ports(ehci);
 342
 343        /* make BIOS/etc use companion controller during reboot */
 344        ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 345
 346        /* unblock posted writes */
 347        ehci_readl(ehci, &ehci->regs->configured_flag);
 348        spin_unlock_irq(&ehci->lock);
 349}
 350
 351/* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
 352 * This forcibly disables dma and IRQs, helping kexec and other cases
 353 * where the next system software may expect clean state.
 354 */
 355static void ehci_shutdown(struct usb_hcd *hcd)
 356{
 357        struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 358
 359        /**
 360         * Protect the system from crashing at system shutdown in cases where
 361         * usb host is not added yet from OTG controller driver.
 362         * As ehci_setup() not done yet, so stop accessing registers or
 363         * variables initialized in ehci_setup()
 364         */
 365        if (!ehci->sbrn)
 366                return;
 367
 368        spin_lock_irq(&ehci->lock);
 369        ehci->shutdown = true;
 370        ehci->rh_state = EHCI_RH_STOPPING;
 371        ehci->enabled_hrtimer_events = 0;
 372        spin_unlock_irq(&ehci->lock);
 373
 374        ehci_silence_controller(ehci);
 375
 376        hrtimer_cancel(&ehci->hrtimer);
 377}
 378
 379/*-------------------------------------------------------------------------*/
 380
 381/*
 382 * ehci_work is called from some interrupts, timers, and so on.
 383 * it calls driver completion functions, after dropping ehci->lock.
 384 */
 385static void ehci_work (struct ehci_hcd *ehci)
 386{
 387        /* another CPU may drop ehci->lock during a schedule scan while
 388         * it reports urb completions.  this flag guards against bogus
 389         * attempts at re-entrant schedule scanning.
 390         */
 391        if (ehci->scanning) {
 392                ehci->need_rescan = true;
 393                return;
 394        }
 395        ehci->scanning = true;
 396
 397 rescan:
 398        ehci->need_rescan = false;
 399        if (ehci->async_count)
 400                scan_async(ehci);
 401        if (ehci->intr_count > 0)
 402                scan_intr(ehci);
 403        if (ehci->isoc_count > 0)
 404                scan_isoc(ehci);
 405        if (ehci->need_rescan)
 406                goto rescan;
 407        ehci->scanning = false;
 408
 409        /* the IO watchdog guards against hardware or driver bugs that
 410         * misplace IRQs, and should let us run completely without IRQs.
 411         * such lossage has been observed on both VT6202 and VT8235.
 412         */
 413        turn_on_io_watchdog(ehci);
 414}
 415
 416/*
 417 * Called when the ehci_hcd module is removed.
 418 */
 419static void ehci_stop (struct usb_hcd *hcd)
 420{
 421        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 422
 423        ehci_dbg (ehci, "stop\n");
 424
 425        /* no more interrupts ... */
 426
 427        spin_lock_irq(&ehci->lock);
 428        ehci->enabled_hrtimer_events = 0;
 429        spin_unlock_irq(&ehci->lock);
 430
 431        ehci_quiesce(ehci);
 432        ehci_silence_controller(ehci);
 433        ehci_reset (ehci);
 434
 435        hrtimer_cancel(&ehci->hrtimer);
 436        remove_sysfs_files(ehci);
 437        remove_debug_files (ehci);
 438
 439        /* root hub is shut down separately (first, when possible) */
 440        spin_lock_irq (&ehci->lock);
 441        end_free_itds(ehci);
 442        spin_unlock_irq (&ehci->lock);
 443        ehci_mem_cleanup (ehci);
 444
 445        if (ehci->amd_pll_fix == 1)
 446                usb_amd_dev_put();
 447
 448        dbg_status (ehci, "ehci_stop completed",
 449                    ehci_readl(ehci, &ehci->regs->status));
 450}
 451
 452/* one-time init, only for memory state */
 453static int ehci_init(struct usb_hcd *hcd)
 454{
 455        struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 456        u32                     temp;
 457        int                     retval;
 458        u32                     hcc_params;
 459        struct ehci_qh_hw       *hw;
 460
 461        spin_lock_init(&ehci->lock);
 462
 463        /*
 464         * keep io watchdog by default, those good HCDs could turn off it later
 465         */
 466        ehci->need_io_watchdog = 1;
 467
 468        hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
 469        ehci->hrtimer.function = ehci_hrtimer_func;
 470        ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
 471
 472        hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 473
 474        /*
 475         * by default set standard 80% (== 100 usec/uframe) max periodic
 476         * bandwidth as required by USB 2.0
 477         */
 478        ehci->uframe_periodic_max = 100;
 479
 480        /*
 481         * hw default: 1K periodic list heads, one per frame.
 482         * periodic_size can shrink by USBCMD update if hcc_params allows.
 483         */
 484        ehci->periodic_size = DEFAULT_I_TDPS;
 485        INIT_LIST_HEAD(&ehci->async_unlink);
 486        INIT_LIST_HEAD(&ehci->async_idle);
 487        INIT_LIST_HEAD(&ehci->intr_unlink_wait);
 488        INIT_LIST_HEAD(&ehci->intr_unlink);
 489        INIT_LIST_HEAD(&ehci->intr_qh_list);
 490        INIT_LIST_HEAD(&ehci->cached_itd_list);
 491        INIT_LIST_HEAD(&ehci->cached_sitd_list);
 492        INIT_LIST_HEAD(&ehci->tt_list);
 493
 494        if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 495                /* periodic schedule size can be smaller than default */
 496                switch (EHCI_TUNE_FLS) {
 497                case 0: ehci->periodic_size = 1024; break;
 498                case 1: ehci->periodic_size = 512; break;
 499                case 2: ehci->periodic_size = 256; break;
 500                default:        BUG();
 501                }
 502        }
 503        if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 504                return retval;
 505
 506        /* controllers may cache some of the periodic schedule ... */
 507        if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
 508                ehci->i_thresh = 0;
 509        else                                    // N microframes cached
 510                ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 511
 512        /*
 513         * dedicate a qh for the async ring head, since we couldn't unlink
 514         * a 'real' qh without stopping the async schedule [4.8].  use it
 515         * as the 'reclamation list head' too.
 516         * its dummy is used in hw_alt_next of many tds, to prevent the qh
 517         * from automatically advancing to the next td after short reads.
 518         */
 519        ehci->async->qh_next.qh = NULL;
 520        hw = ehci->async->hw;
 521        hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
 522        hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
 523#if defined(CONFIG_PPC_PS3)
 524        hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
 525#endif
 526        hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
 527        hw->hw_qtd_next = EHCI_LIST_END(ehci);
 528        ehci->async->qh_state = QH_STATE_LINKED;
 529        hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
 530
 531        /* clear interrupt enables, set irq latency */
 532        if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
 533                log2_irq_thresh = 0;
 534        temp = 1 << (16 + log2_irq_thresh);
 535        if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
 536                ehci->has_ppcd = 1;
 537                ehci_dbg(ehci, "enable per-port change event\n");
 538                temp |= CMD_PPCEE;
 539        }
 540        if (HCC_CANPARK(hcc_params)) {
 541                /* HW default park == 3, on hardware that supports it (like
 542                 * NVidia and ALI silicon), maximizes throughput on the async
 543                 * schedule by avoiding QH fetches between transfers.
 544                 *
 545                 * With fast usb storage devices and NForce2, "park" seems to
 546                 * make problems:  throughput reduction (!), data errors...
 547                 */
 548                if (park) {
 549                        park = min(park, (unsigned) 3);
 550                        temp |= CMD_PARK;
 551                        temp |= park << 8;
 552                }
 553                ehci_dbg(ehci, "park %d\n", park);
 554        }
 555        if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 556                /* periodic schedule size can be smaller than default */
 557                temp &= ~(3 << 2);
 558                temp |= (EHCI_TUNE_FLS << 2);
 559        }
 560        ehci->command = temp;
 561
 562        /* Accept arbitrarily long scatter-gather lists */
 563        if (!hcd->localmem_pool)
 564                hcd->self.sg_tablesize = ~0;
 565
 566        /* Prepare for unlinking active QHs */
 567        ehci->old_current = ~0;
 568        return 0;
 569}
 570
 571/* start HC running; it's halted, ehci_init() has been run (once) */
 572static int ehci_run (struct usb_hcd *hcd)
 573{
 574        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 575        u32                     temp;
 576        u32                     hcc_params;
 577        int                     rc;
 578
 579        hcd->uses_new_polling = 1;
 580
 581        /* EHCI spec section 4.1 */
 582
 583        ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 584        ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 585
 586        /*
 587         * hcc_params controls whether ehci->regs->segment must (!!!)
 588         * be used; it constrains QH/ITD/SITD and QTD locations.
 589         * dma_pool consistent memory always uses segment zero.
 590         * streaming mappings for I/O buffers, like pci_map_single(),
 591         * can return segments above 4GB, if the device allows.
 592         *
 593         * NOTE:  the dma mask is visible through dev->dma_mask, so
 594         * drivers can pass this info along ... like NETIF_F_HIGHDMA,
 595         * Scsi_Host.highmem_io, and so forth.  It's readonly to all
 596         * host side drivers though.
 597         */
 598        hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 599        if (HCC_64BIT_ADDR(hcc_params)) {
 600                ehci_writel(ehci, 0, &ehci->regs->segment);
 601#if 0
 602// this is deeply broken on almost all architectures
 603                if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
 604                        ehci_info(ehci, "enabled 64bit DMA\n");
 605#endif
 606        }
 607
 608
 609        // Philips, Intel, and maybe others need CMD_RUN before the
 610        // root hub will detect new devices (why?); NEC doesn't
 611        ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 612        ehci->command |= CMD_RUN;
 613        ehci_writel(ehci, ehci->command, &ehci->regs->command);
 614        dbg_cmd (ehci, "init", ehci->command);
 615
 616        /*
 617         * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
 618         * are explicitly handed to companion controller(s), so no TT is
 619         * involved with the root hub.  (Except where one is integrated,
 620         * and there's no companion controller unless maybe for USB OTG.)
 621         *
 622         * Turning on the CF flag will transfer ownership of all ports
 623         * from the companions to the EHCI controller.  If any of the
 624         * companions are in the middle of a port reset at the time, it
 625         * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
 626         * guarantees that no resets are in progress.  After we set CF,
 627         * a short delay lets the hardware catch up; new resets shouldn't
 628         * be started before the port switching actions could complete.
 629         */
 630        down_write(&ehci_cf_port_reset_rwsem);
 631        ehci->rh_state = EHCI_RH_RUNNING;
 632        ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 633
 634        /* Wait until HC become operational */
 635        ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
 636        msleep(5);
 637        rc = ehci_handshake(ehci, &ehci->regs->status, STS_HALT, 0, 100 * 1000);
 638
 639        up_write(&ehci_cf_port_reset_rwsem);
 640
 641        if (rc) {
 642                ehci_err(ehci, "USB %x.%x, controller refused to start: %d\n",
 643                         ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f), rc);
 644                return rc;
 645        }
 646
 647        ehci->last_periodic_enable = ktime_get_real();
 648
 649        temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 650        ehci_info (ehci,
 651                "USB %x.%x started, EHCI %x.%02x%s\n",
 652                ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
 653                temp >> 8, temp & 0xff,
 654                (ignore_oc || ehci->spurious_oc) ? ", overcurrent ignored" : "");
 655
 656        ehci_writel(ehci, INTR_MASK,
 657                    &ehci->regs->intr_enable); /* Turn On Interrupts */
 658
 659        /* GRR this is run-once init(), being done every time the HC starts.
 660         * So long as they're part of class devices, we can't do it init()
 661         * since the class device isn't created that early.
 662         */
 663        create_debug_files(ehci);
 664        create_sysfs_files(ehci);
 665
 666        return 0;
 667}
 668
 669int ehci_setup(struct usb_hcd *hcd)
 670{
 671        struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 672        int retval;
 673
 674        ehci->regs = (void __iomem *)ehci->caps +
 675            HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 676        dbg_hcs_params(ehci, "reset");
 677        dbg_hcc_params(ehci, "reset");
 678
 679        /* cache this readonly data; minimize chip reads */
 680        ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
 681
 682        ehci->sbrn = HCD_USB2;
 683
 684        /* data structure init */
 685        retval = ehci_init(hcd);
 686        if (retval)
 687                return retval;
 688
 689        retval = ehci_halt(ehci);
 690        if (retval) {
 691                ehci_mem_cleanup(ehci);
 692                return retval;
 693        }
 694
 695        ehci_reset(ehci);
 696
 697        return 0;
 698}
 699EXPORT_SYMBOL_GPL(ehci_setup);
 700
 701/*-------------------------------------------------------------------------*/
 702
 703static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 704{
 705        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 706        u32                     status, current_status, masked_status, pcd_status = 0;
 707        u32                     cmd;
 708        int                     bh;
 709
 710        spin_lock(&ehci->lock);
 711
 712        status = 0;
 713        current_status = ehci_readl(ehci, &ehci->regs->status);
 714restart:
 715
 716        /* e.g. cardbus physical eject */
 717        if (current_status == ~(u32) 0) {
 718                ehci_dbg (ehci, "device removed\n");
 719                goto dead;
 720        }
 721        status |= current_status;
 722
 723        /*
 724         * We don't use STS_FLR, but some controllers don't like it to
 725         * remain on, so mask it out along with the other status bits.
 726         */
 727        masked_status = current_status & (INTR_MASK | STS_FLR);
 728
 729        /* Shared IRQ? */
 730        if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
 731                spin_unlock(&ehci->lock);
 732                return IRQ_NONE;
 733        }
 734
 735        /* clear (just) interrupts */
 736        ehci_writel(ehci, masked_status, &ehci->regs->status);
 737
 738        /* For edge interrupts, don't race with an interrupt bit being raised */
 739        current_status = ehci_readl(ehci, &ehci->regs->status);
 740        if (current_status & INTR_MASK)
 741                goto restart;
 742
 743        cmd = ehci_readl(ehci, &ehci->regs->command);
 744        bh = 0;
 745
 746        /* normal [4.15.1.2] or error [4.15.1.1] completion */
 747        if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
 748                if (likely ((status & STS_ERR) == 0))
 749                        INCR(ehci->stats.normal);
 750                else
 751                        INCR(ehci->stats.error);
 752                bh = 1;
 753        }
 754
 755        /* complete the unlinking of some qh [4.15.2.3] */
 756        if (status & STS_IAA) {
 757
 758                /* Turn off the IAA watchdog */
 759                ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
 760
 761                /*
 762                 * Mild optimization: Allow another IAAD to reset the
 763                 * hrtimer, if one occurs before the next expiration.
 764                 * In theory we could always cancel the hrtimer, but
 765                 * tests show that about half the time it will be reset
 766                 * for some other event anyway.
 767                 */
 768                if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
 769                        ++ehci->next_hrtimer_event;
 770
 771                /* guard against (alleged) silicon errata */
 772                if (cmd & CMD_IAAD)
 773                        ehci_dbg(ehci, "IAA with IAAD still set?\n");
 774                if (ehci->iaa_in_progress)
 775                        INCR(ehci->stats.iaa);
 776                end_iaa_cycle(ehci);
 777        }
 778
 779        /* remote wakeup [4.3.1] */
 780        if (status & STS_PCD) {
 781                unsigned        i = HCS_N_PORTS (ehci->hcs_params);
 782                u32             ppcd = ~0;
 783
 784                /* kick root hub later */
 785                pcd_status = status;
 786
 787                /* resume root hub? */
 788                if (ehci->rh_state == EHCI_RH_SUSPENDED)
 789                        usb_hcd_resume_root_hub(hcd);
 790
 791                /* get per-port change detect bits */
 792                if (ehci->has_ppcd)
 793                        ppcd = status >> 16;
 794
 795                while (i--) {
 796                        int pstatus;
 797
 798                        /* leverage per-port change bits feature */
 799                        if (!(ppcd & (1 << i)))
 800                                continue;
 801                        pstatus = ehci_readl(ehci,
 802                                         &ehci->regs->port_status[i]);
 803
 804                        if (pstatus & PORT_OWNER)
 805                                continue;
 806                        if (!(test_bit(i, &ehci->suspended_ports) &&
 807                                        ((pstatus & PORT_RESUME) ||
 808                                                !(pstatus & PORT_SUSPEND)) &&
 809                                        (pstatus & PORT_PE) &&
 810                                        ehci->reset_done[i] == 0))
 811                                continue;
 812
 813                        /* start USB_RESUME_TIMEOUT msec resume signaling from
 814                         * this port, and make hub_wq collect
 815                         * PORT_STAT_C_SUSPEND to stop that signaling.
 816                         */
 817                        ehci->reset_done[i] = jiffies +
 818                                msecs_to_jiffies(USB_RESUME_TIMEOUT);
 819                        set_bit(i, &ehci->resuming_ports);
 820                        ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 821                        usb_hcd_start_port_resume(&hcd->self, i);
 822                        mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 823                }
 824        }
 825
 826        /* PCI errors [4.15.2.4] */
 827        if (unlikely ((status & STS_FATAL) != 0)) {
 828                ehci_err(ehci, "fatal error\n");
 829                dbg_cmd(ehci, "fatal", cmd);
 830                dbg_status(ehci, "fatal", status);
 831dead:
 832                usb_hc_died(hcd);
 833
 834                /* Don't let the controller do anything more */
 835                ehci->shutdown = true;
 836                ehci->rh_state = EHCI_RH_STOPPING;
 837                ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
 838                ehci_writel(ehci, ehci->command, &ehci->regs->command);
 839                ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 840                ehci_handle_controller_death(ehci);
 841
 842                /* Handle completions when the controller stops */
 843                bh = 0;
 844        }
 845
 846        if (bh)
 847                ehci_work (ehci);
 848        spin_unlock(&ehci->lock);
 849        if (pcd_status)
 850                usb_hcd_poll_rh_status(hcd);
 851        return IRQ_HANDLED;
 852}
 853
 854/*-------------------------------------------------------------------------*/
 855
 856/*
 857 * non-error returns are a promise to giveback() the urb later
 858 * we drop ownership so next owner (or urb unlink) can get it
 859 *
 860 * urb + dev is in hcd.self.controller.urb_list
 861 * we're queueing TDs onto software and hardware lists
 862 *
 863 * hcd-specific init for hcpriv hasn't been done yet
 864 *
 865 * NOTE:  control, bulk, and interrupt share the same code to append TDs
 866 * to a (possibly active) QH, and the same QH scanning code.
 867 */
 868static int ehci_urb_enqueue (
 869        struct usb_hcd  *hcd,
 870        struct urb      *urb,
 871        gfp_t           mem_flags
 872) {
 873        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 874        struct list_head        qtd_list;
 875
 876        INIT_LIST_HEAD (&qtd_list);
 877
 878        switch (usb_pipetype (urb->pipe)) {
 879        case PIPE_CONTROL:
 880                /* qh_completions() code doesn't handle all the fault cases
 881                 * in multi-TD control transfers.  Even 1KB is rare anyway.
 882                 */
 883                if (urb->transfer_buffer_length > (16 * 1024))
 884                        return -EMSGSIZE;
 885                fallthrough;
 886        /* case PIPE_BULK: */
 887        default:
 888                if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 889                        return -ENOMEM;
 890                return submit_async(ehci, urb, &qtd_list, mem_flags);
 891
 892        case PIPE_INTERRUPT:
 893                if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 894                        return -ENOMEM;
 895                return intr_submit(ehci, urb, &qtd_list, mem_flags);
 896
 897        case PIPE_ISOCHRONOUS:
 898                if (urb->dev->speed == USB_SPEED_HIGH)
 899                        return itd_submit (ehci, urb, mem_flags);
 900                else
 901                        return sitd_submit (ehci, urb, mem_flags);
 902        }
 903}
 904
 905/* remove from hardware lists
 906 * completions normally happen asynchronously
 907 */
 908
 909static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 910{
 911        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 912        struct ehci_qh          *qh;
 913        unsigned long           flags;
 914        int                     rc;
 915
 916        spin_lock_irqsave (&ehci->lock, flags);
 917        rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 918        if (rc)
 919                goto done;
 920
 921        if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
 922                /*
 923                 * We don't expedite dequeue for isochronous URBs.
 924                 * Just wait until they complete normally or their
 925                 * time slot expires.
 926                 */
 927        } else {
 928                qh = (struct ehci_qh *) urb->hcpriv;
 929                qh->unlink_reason |= QH_UNLINK_REQUESTED;
 930                switch (qh->qh_state) {
 931                case QH_STATE_LINKED:
 932                        if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)
 933                                start_unlink_intr(ehci, qh);
 934                        else
 935                                start_unlink_async(ehci, qh);
 936                        break;
 937                case QH_STATE_COMPLETING:
 938                        qh->dequeue_during_giveback = 1;
 939                        break;
 940                case QH_STATE_UNLINK:
 941                case QH_STATE_UNLINK_WAIT:
 942                        /* already started */
 943                        break;
 944                case QH_STATE_IDLE:
 945                        /* QH might be waiting for a Clear-TT-Buffer */
 946                        qh_completions(ehci, qh);
 947                        break;
 948                }
 949        }
 950done:
 951        spin_unlock_irqrestore (&ehci->lock, flags);
 952        return rc;
 953}
 954
 955/*-------------------------------------------------------------------------*/
 956
 957// bulk qh holds the data toggle
 958
 959static void
 960ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 961{
 962        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 963        unsigned long           flags;
 964        struct ehci_qh          *qh;
 965
 966        /* ASSERT:  any requests/urbs are being unlinked */
 967        /* ASSERT:  nobody can be submitting urbs for this any more */
 968
 969rescan:
 970        spin_lock_irqsave (&ehci->lock, flags);
 971        qh = ep->hcpriv;
 972        if (!qh)
 973                goto done;
 974
 975        /* endpoints can be iso streams.  for now, we don't
 976         * accelerate iso completions ... so spin a while.
 977         */
 978        if (qh->hw == NULL) {
 979                struct ehci_iso_stream  *stream = ep->hcpriv;
 980
 981                if (!list_empty(&stream->td_list))
 982                        goto idle_timeout;
 983
 984                /* BUG_ON(!list_empty(&stream->free_list)); */
 985                reserve_release_iso_bandwidth(ehci, stream, -1);
 986                kfree(stream);
 987                goto done;
 988        }
 989
 990        qh->unlink_reason |= QH_UNLINK_REQUESTED;
 991        switch (qh->qh_state) {
 992        case QH_STATE_LINKED:
 993                if (list_empty(&qh->qtd_list))
 994                        qh->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
 995                else
 996                        WARN_ON(1);
 997                if (usb_endpoint_type(&ep->desc) != USB_ENDPOINT_XFER_INT)
 998                        start_unlink_async(ehci, qh);
 999                else
1000                        start_unlink_intr(ehci, qh);
1001                fallthrough;
1002        case QH_STATE_COMPLETING:       /* already in unlinking */
1003        case QH_STATE_UNLINK:           /* wait for hw to finish? */
1004        case QH_STATE_UNLINK_WAIT:
1005idle_timeout:
1006                spin_unlock_irqrestore (&ehci->lock, flags);
1007                schedule_timeout_uninterruptible(1);
1008                goto rescan;
1009        case QH_STATE_IDLE:             /* fully unlinked */
1010                if (qh->clearing_tt)
1011                        goto idle_timeout;
1012                if (list_empty (&qh->qtd_list)) {
1013                        if (qh->ps.bw_uperiod)
1014                                reserve_release_intr_bandwidth(ehci, qh, -1);
1015                        qh_destroy(ehci, qh);
1016                        break;
1017                }
1018                fallthrough;
1019        default:
1020                /* caller was supposed to have unlinked any requests;
1021                 * that's not our job.  just leak this memory.
1022                 */
1023                ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1024                        qh, ep->desc.bEndpointAddress, qh->qh_state,
1025                        list_empty (&qh->qtd_list) ? "" : "(has tds)");
1026                break;
1027        }
1028 done:
1029        ep->hcpriv = NULL;
1030        spin_unlock_irqrestore (&ehci->lock, flags);
1031}
1032
1033static void
1034ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1035{
1036        struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1037        struct ehci_qh          *qh;
1038        int                     eptype = usb_endpoint_type(&ep->desc);
1039        int                     epnum = usb_endpoint_num(&ep->desc);
1040        int                     is_out = usb_endpoint_dir_out(&ep->desc);
1041        unsigned long           flags;
1042
1043        if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1044                return;
1045
1046        spin_lock_irqsave(&ehci->lock, flags);
1047        qh = ep->hcpriv;
1048
1049        /* For Bulk and Interrupt endpoints we maintain the toggle state
1050         * in the hardware; the toggle bits in udev aren't used at all.
1051         * When an endpoint is reset by usb_clear_halt() we must reset
1052         * the toggle bit in the QH.
1053         */
1054        if (qh) {
1055                if (!list_empty(&qh->qtd_list)) {
1056                        WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1057                } else {
1058                        /* The toggle value in the QH can't be updated
1059                         * while the QH is active.  Unlink it now;
1060                         * re-linking will call qh_refresh().
1061                         */
1062                        usb_settoggle(qh->ps.udev, epnum, is_out, 0);
1063                        qh->unlink_reason |= QH_UNLINK_REQUESTED;
1064                        if (eptype == USB_ENDPOINT_XFER_BULK)
1065                                start_unlink_async(ehci, qh);
1066                        else
1067                                start_unlink_intr(ehci, qh);
1068                }
1069        }
1070        spin_unlock_irqrestore(&ehci->lock, flags);
1071}
1072
1073static int ehci_get_frame (struct usb_hcd *hcd)
1074{
1075        struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1076        return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1077}
1078
1079/*-------------------------------------------------------------------------*/
1080
1081/* Device addition and removal */
1082
1083static void ehci_remove_device(struct usb_hcd *hcd, struct usb_device *udev)
1084{
1085        struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1086
1087        spin_lock_irq(&ehci->lock);
1088        drop_tt(udev);
1089        spin_unlock_irq(&ehci->lock);
1090}
1091
1092/*-------------------------------------------------------------------------*/
1093
1094#ifdef  CONFIG_PM
1095
1096/* suspend/resume, section 4.3 */
1097
1098/* These routines handle the generic parts of controller suspend/resume */
1099
1100int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1101{
1102        struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1103
1104        if (time_before(jiffies, ehci->next_statechange))
1105                msleep(10);
1106
1107        /*
1108         * Root hub was already suspended.  Disable IRQ emission and
1109         * mark HW unaccessible.  The PM and USB cores make sure that
1110         * the root hub is either suspended or stopped.
1111         */
1112        ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1113
1114        spin_lock_irq(&ehci->lock);
1115        ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1116        (void) ehci_readl(ehci, &ehci->regs->intr_enable);
1117
1118        clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1119        spin_unlock_irq(&ehci->lock);
1120
1121        synchronize_irq(hcd->irq);
1122
1123        /* Check for race with a wakeup request */
1124        if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1125                ehci_resume(hcd, false);
1126                return -EBUSY;
1127        }
1128
1129        return 0;
1130}
1131EXPORT_SYMBOL_GPL(ehci_suspend);
1132
1133/* Returns 0 if power was preserved, 1 if power was lost */
1134int ehci_resume(struct usb_hcd *hcd, bool force_reset)
1135{
1136        struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1137
1138        if (time_before(jiffies, ehci->next_statechange))
1139                msleep(100);
1140
1141        /* Mark hardware accessible again as we are back to full power by now */
1142        set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1143
1144        if (ehci->shutdown)
1145                return 0;               /* Controller is dead */
1146
1147        /*
1148         * If CF is still set and reset isn't forced
1149         * then we maintained suspend power.
1150         * Just undo the effect of ehci_suspend().
1151         */
1152        if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1153                        !force_reset) {
1154                int     mask = INTR_MASK;
1155
1156                ehci_prepare_ports_for_controller_resume(ehci);
1157
1158                spin_lock_irq(&ehci->lock);
1159                if (ehci->shutdown)
1160                        goto skip;
1161
1162                if (!hcd->self.root_hub->do_remote_wakeup)
1163                        mask &= ~STS_PCD;
1164                ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1165                ehci_readl(ehci, &ehci->regs->intr_enable);
1166 skip:
1167                spin_unlock_irq(&ehci->lock);
1168                return 0;
1169        }
1170
1171        /*
1172         * Else reset, to cope with power loss or resume from hibernation
1173         * having let the firmware kick in during reboot.
1174         */
1175        usb_root_hub_lost_power(hcd->self.root_hub);
1176        (void) ehci_halt(ehci);
1177        (void) ehci_reset(ehci);
1178
1179        spin_lock_irq(&ehci->lock);
1180        if (ehci->shutdown)
1181                goto skip;
1182
1183        ehci_writel(ehci, ehci->command, &ehci->regs->command);
1184        ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1185        ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1186
1187        ehci->rh_state = EHCI_RH_SUSPENDED;
1188        spin_unlock_irq(&ehci->lock);
1189
1190        return 1;
1191}
1192EXPORT_SYMBOL_GPL(ehci_resume);
1193
1194#endif
1195
1196/*-------------------------------------------------------------------------*/
1197
1198/*
1199 * Generic structure: This gets copied for platform drivers so that
1200 * individual entries can be overridden as needed.
1201 */
1202
1203static const struct hc_driver ehci_hc_driver = {
1204        .description =          hcd_name,
1205        .product_desc =         "EHCI Host Controller",
1206        .hcd_priv_size =        sizeof(struct ehci_hcd),
1207
1208        /*
1209         * generic hardware linkage
1210         */
1211        .irq =                  ehci_irq,
1212        .flags =                HCD_MEMORY | HCD_DMA | HCD_USB2 | HCD_BH,
1213
1214        /*
1215         * basic lifecycle operations
1216         */
1217        .reset =                ehci_setup,
1218        .start =                ehci_run,
1219        .stop =                 ehci_stop,
1220        .shutdown =             ehci_shutdown,
1221
1222        /*
1223         * managing i/o requests and associated device resources
1224         */
1225        .urb_enqueue =          ehci_urb_enqueue,
1226        .urb_dequeue =          ehci_urb_dequeue,
1227        .endpoint_disable =     ehci_endpoint_disable,
1228        .endpoint_reset =       ehci_endpoint_reset,
1229        .clear_tt_buffer_complete =     ehci_clear_tt_buffer_complete,
1230
1231        /*
1232         * scheduling support
1233         */
1234        .get_frame_number =     ehci_get_frame,
1235
1236        /*
1237         * root hub support
1238         */
1239        .hub_status_data =      ehci_hub_status_data,
1240        .hub_control =          ehci_hub_control,
1241        .bus_suspend =          ehci_bus_suspend,
1242        .bus_resume =           ehci_bus_resume,
1243        .relinquish_port =      ehci_relinquish_port,
1244        .port_handed_over =     ehci_port_handed_over,
1245        .get_resuming_ports =   ehci_get_resuming_ports,
1246
1247        /*
1248         * device support
1249         */
1250        .free_dev =             ehci_remove_device,
1251#ifdef CONFIG_USB_HCD_TEST_MODE
1252        /* EH SINGLE_STEP_SET_FEATURE test support */
1253        .submit_single_step_set_feature = ehci_submit_single_step_set_feature,
1254#endif
1255};
1256
1257void ehci_init_driver(struct hc_driver *drv,
1258                const struct ehci_driver_overrides *over)
1259{
1260        /* Copy the generic table to drv and then apply the overrides */
1261        *drv = ehci_hc_driver;
1262
1263        if (over) {
1264                drv->hcd_priv_size += over->extra_priv_size;
1265                if (over->reset)
1266                        drv->reset = over->reset;
1267                if (over->port_power)
1268                        drv->port_power = over->port_power;
1269        }
1270}
1271EXPORT_SYMBOL_GPL(ehci_init_driver);
1272
1273/*-------------------------------------------------------------------------*/
1274
1275MODULE_DESCRIPTION(DRIVER_DESC);
1276MODULE_AUTHOR (DRIVER_AUTHOR);
1277MODULE_LICENSE ("GPL");
1278
1279#ifdef CONFIG_USB_EHCI_SH
1280#include "ehci-sh.c"
1281#define PLATFORM_DRIVER         ehci_hcd_sh_driver
1282#endif
1283
1284#ifdef CONFIG_PPC_PS3
1285#include "ehci-ps3.c"
1286#define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1287#endif
1288
1289#ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1290#include "ehci-ppc-of.c"
1291#define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1292#endif
1293
1294#ifdef CONFIG_XPS_USB_HCD_XILINX
1295#include "ehci-xilinx-of.c"
1296#define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1297#endif
1298
1299#ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1300#include "ehci-pmcmsp.c"
1301#define PLATFORM_DRIVER         ehci_hcd_msp_driver
1302#endif
1303
1304#ifdef CONFIG_SPARC_LEON
1305#include "ehci-grlib.c"
1306#define PLATFORM_DRIVER         ehci_grlib_driver
1307#endif
1308
1309static int __init ehci_hcd_init(void)
1310{
1311        int retval = 0;
1312
1313        if (usb_disabled())
1314                return -ENODEV;
1315
1316        printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1317        set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1318        if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1319                        test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1320                printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1321                                " before uhci_hcd and ohci_hcd, not after\n");
1322
1323        pr_debug("%s: block sizes: qh %zd qtd %zd itd %zd sitd %zd\n",
1324                 hcd_name,
1325                 sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1326                 sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1327
1328#ifdef CONFIG_DYNAMIC_DEBUG
1329        ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1330#endif
1331
1332#ifdef PLATFORM_DRIVER
1333        retval = platform_driver_register(&PLATFORM_DRIVER);
1334        if (retval < 0)
1335                goto clean0;
1336#endif
1337
1338#ifdef PS3_SYSTEM_BUS_DRIVER
1339        retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1340        if (retval < 0)
1341                goto clean2;
1342#endif
1343
1344#ifdef OF_PLATFORM_DRIVER
1345        retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1346        if (retval < 0)
1347                goto clean3;
1348#endif
1349
1350#ifdef XILINX_OF_PLATFORM_DRIVER
1351        retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1352        if (retval < 0)
1353                goto clean4;
1354#endif
1355        return retval;
1356
1357#ifdef XILINX_OF_PLATFORM_DRIVER
1358        /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1359clean4:
1360#endif
1361#ifdef OF_PLATFORM_DRIVER
1362        platform_driver_unregister(&OF_PLATFORM_DRIVER);
1363clean3:
1364#endif
1365#ifdef PS3_SYSTEM_BUS_DRIVER
1366        ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1367clean2:
1368#endif
1369#ifdef PLATFORM_DRIVER
1370        platform_driver_unregister(&PLATFORM_DRIVER);
1371clean0:
1372#endif
1373#ifdef CONFIG_DYNAMIC_DEBUG
1374        debugfs_remove(ehci_debug_root);
1375        ehci_debug_root = NULL;
1376#endif
1377        clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1378        return retval;
1379}
1380module_init(ehci_hcd_init);
1381
1382static void __exit ehci_hcd_cleanup(void)
1383{
1384#ifdef XILINX_OF_PLATFORM_DRIVER
1385        platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1386#endif
1387#ifdef OF_PLATFORM_DRIVER
1388        platform_driver_unregister(&OF_PLATFORM_DRIVER);
1389#endif
1390#ifdef PLATFORM_DRIVER
1391        platform_driver_unregister(&PLATFORM_DRIVER);
1392#endif
1393#ifdef PS3_SYSTEM_BUS_DRIVER
1394        ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1395#endif
1396#ifdef CONFIG_DYNAMIC_DEBUG
1397        debugfs_remove(ehci_debug_root);
1398#endif
1399        clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1400}
1401module_exit(ehci_hcd_cleanup);
1402