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21#ifndef __DMAR_H__
22#define __DMAR_H__
23
24#include <linux/acpi.h>
25#include <linux/types.h>
26#include <linux/msi.h>
27#include <linux/irqreturn.h>
28#include <linux/rwsem.h>
29#include <linux/rculist.h>
30
31struct acpi_dmar_header;
32
33#ifdef CONFIG_X86
34# define DMAR_UNITS_SUPPORTED MAX_IO_APICS
35#else
36# define DMAR_UNITS_SUPPORTED 64
37#endif
38
39
40#define DMAR_INTR_REMAP 0x1
41#define DMAR_X2APIC_OPT_OUT 0x2
42#define DMAR_PLATFORM_OPT_IN 0x4
43
44struct intel_iommu;
45
46struct dmar_dev_scope {
47 struct device __rcu *dev;
48 u8 bus;
49 u8 devfn;
50};
51
52#ifdef CONFIG_DMAR_TABLE
53extern struct acpi_table_header *dmar_tbl;
54struct dmar_drhd_unit {
55 struct list_head list;
56 struct acpi_dmar_header *hdr;
57 u64 reg_base_addr;
58 struct dmar_dev_scope *devices;
59 int devices_cnt;
60 u16 segment;
61 u8 ignored:1;
62 u8 include_all:1;
63 u8 gfx_dedicated:1;
64 struct intel_iommu *iommu;
65};
66
67struct dmar_pci_path {
68 u8 bus;
69 u8 device;
70 u8 function;
71};
72
73struct dmar_pci_notify_info {
74 struct pci_dev *dev;
75 unsigned long event;
76 int bus;
77 u16 seg;
78 u16 level;
79 struct dmar_pci_path path[];
80} __attribute__((packed));
81
82extern struct rw_semaphore dmar_global_lock;
83extern struct list_head dmar_drhd_units;
84
85#define for_each_drhd_unit(drhd) \
86 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list)
87
88#define for_each_active_drhd_unit(drhd) \
89 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \
90 dmar_rcu_check()) \
91 if (drhd->ignored) {} else
92
93#define for_each_active_iommu(i, drhd) \
94 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \
95 dmar_rcu_check()) \
96 if (i=drhd->iommu, drhd->ignored) {} else
97
98#define for_each_iommu(i, drhd) \
99 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \
100 if (i=drhd->iommu, 0) {} else
101
102static inline bool dmar_rcu_check(void)
103{
104 return rwsem_is_locked(&dmar_global_lock) ||
105 system_state == SYSTEM_BOOTING;
106}
107
108#define dmar_rcu_dereference(p) rcu_dereference_check((p), dmar_rcu_check())
109
110#define for_each_dev_scope(a, c, p, d) \
111 for ((p) = 0; ((d) = (p) < (c) ? dmar_rcu_dereference((a)[(p)].dev) : \
112 NULL, (p) < (c)); (p)++)
113
114#define for_each_active_dev_scope(a, c, p, d) \
115 for_each_dev_scope((a), (c), (p), (d)) if (!(d)) { continue; } else
116
117extern int dmar_table_init(void);
118extern int dmar_dev_scope_init(void);
119extern void dmar_register_bus_notifier(void);
120extern int dmar_parse_dev_scope(void *start, void *end, int *cnt,
121 struct dmar_dev_scope **devices, u16 segment);
122extern void *dmar_alloc_dev_scope(void *start, void *end, int *cnt);
123extern void dmar_free_dev_scope(struct dmar_dev_scope **devices, int *cnt);
124extern int dmar_insert_dev_scope(struct dmar_pci_notify_info *info,
125 void *start, void*end, u16 segment,
126 struct dmar_dev_scope *devices,
127 int devices_cnt);
128extern int dmar_remove_dev_scope(struct dmar_pci_notify_info *info,
129 u16 segment, struct dmar_dev_scope *devices,
130 int count);
131
132extern int detect_intel_iommu(void);
133extern int enable_drhd_fault_handling(void);
134extern int dmar_device_add(acpi_handle handle);
135extern int dmar_device_remove(acpi_handle handle);
136
137static inline int dmar_res_noop(struct acpi_dmar_header *hdr, void *arg)
138{
139 return 0;
140}
141
142#ifdef CONFIG_INTEL_IOMMU
143extern int iommu_detected, no_iommu;
144extern int intel_iommu_init(void);
145extern void intel_iommu_shutdown(void);
146extern int dmar_parse_one_rmrr(struct acpi_dmar_header *header, void *arg);
147extern int dmar_parse_one_atsr(struct acpi_dmar_header *header, void *arg);
148extern int dmar_check_one_atsr(struct acpi_dmar_header *hdr, void *arg);
149extern int dmar_release_one_atsr(struct acpi_dmar_header *hdr, void *arg);
150extern int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert);
151extern int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info);
152#else
153static inline int intel_iommu_init(void) { return -ENODEV; }
154static inline void intel_iommu_shutdown(void) { }
155
156#define dmar_parse_one_rmrr dmar_res_noop
157#define dmar_parse_one_atsr dmar_res_noop
158#define dmar_check_one_atsr dmar_res_noop
159#define dmar_release_one_atsr dmar_res_noop
160
161static inline int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info)
162{
163 return 0;
164}
165
166static inline int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert)
167{
168 return 0;
169}
170#endif
171
172#ifdef CONFIG_IRQ_REMAP
173extern int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert);
174#else
175static inline int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert)
176{ return 0; }
177#endif
178
179extern bool dmar_platform_optin(void);
180
181#else
182
183static inline int dmar_device_add(void *handle)
184{
185 return 0;
186}
187
188static inline int dmar_device_remove(void *handle)
189{
190 return 0;
191}
192
193static inline bool dmar_platform_optin(void)
194{
195 return false;
196}
197
198#endif
199
200struct irte {
201 union {
202
203 struct {
204 __u64 present : 1,
205 fpd : 1,
206 __res0 : 6,
207 avail : 4,
208 __res1 : 3,
209 pst : 1,
210 vector : 8,
211 __res2 : 40;
212 };
213
214
215 struct {
216 __u64 r_present : 1,
217 r_fpd : 1,
218 dst_mode : 1,
219 redir_hint : 1,
220 trigger_mode : 1,
221 dlvry_mode : 3,
222 r_avail : 4,
223 r_res0 : 4,
224 r_vector : 8,
225 r_res1 : 8,
226 dest_id : 32;
227 };
228
229
230 struct {
231 __u64 p_present : 1,
232 p_fpd : 1,
233 p_res0 : 6,
234 p_avail : 4,
235 p_res1 : 2,
236 p_urgent : 1,
237 p_pst : 1,
238 p_vector : 8,
239 p_res2 : 14,
240 pda_l : 26;
241 };
242 __u64 low;
243 };
244
245 union {
246
247 struct {
248 __u64 sid : 16,
249 sq : 2,
250 svt : 2,
251 __res3 : 44;
252 };
253
254
255 struct {
256 __u64 p_sid : 16,
257 p_sq : 2,
258 p_svt : 2,
259 p_res3 : 12,
260 pda_h : 32;
261 };
262 __u64 high;
263 };
264};
265
266static inline void dmar_copy_shared_irte(struct irte *dst, struct irte *src)
267{
268 dst->present = src->present;
269 dst->fpd = src->fpd;
270 dst->avail = src->avail;
271 dst->pst = src->pst;
272 dst->vector = src->vector;
273 dst->sid = src->sid;
274 dst->sq = src->sq;
275 dst->svt = src->svt;
276}
277
278#define PDA_LOW_BIT 26
279#define PDA_HIGH_BIT 32
280
281
282
283
284struct irq_data;
285extern void dmar_msi_unmask(struct irq_data *data);
286extern void dmar_msi_mask(struct irq_data *data);
287extern void dmar_msi_read(int irq, struct msi_msg *msg);
288extern void dmar_msi_write(int irq, struct msi_msg *msg);
289extern int dmar_set_interrupt(struct intel_iommu *iommu);
290extern irqreturn_t dmar_fault(int irq, void *dev_id);
291extern int dmar_alloc_hwirq(int id, int node, void *arg);
292extern void dmar_free_hwirq(int irq);
293
294#endif
295
