linux/kernel/dma/swiotlb.c
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   1/*
   2 * Dynamic DMA mapping support.
   3 *
   4 * This implementation is a fallback for platforms that do not support
   5 * I/O TLBs (aka DMA address translation hardware).
   6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
   7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
   8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
   9 *      David Mosberger-Tang <davidm@hpl.hp.com>
  10 *
  11 * 03/05/07 davidm      Switch from PCI-DMA to generic device DMA API.
  12 * 00/12/13 davidm      Rename to swiotlb.c and add mark_clean() to avoid
  13 *                      unnecessary i-cache flushing.
  14 * 04/07/.. ak          Better overflow handling. Assorted fixes.
  15 * 05/09/10 linville    Add support for syncing ranges, support syncing for
  16 *                      DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
  17 * 08/12/11 beckyb      Add highmem support
  18 */
  19
  20#define pr_fmt(fmt) "software IO TLB: " fmt
  21
  22#include <linux/cache.h>
  23#include <linux/dma-direct.h>
  24#include <linux/dma-noncoherent.h>
  25#include <linux/mm.h>
  26#include <linux/export.h>
  27#include <linux/spinlock.h>
  28#include <linux/string.h>
  29#include <linux/swiotlb.h>
  30#include <linux/pfn.h>
  31#include <linux/types.h>
  32#include <linux/ctype.h>
  33#include <linux/highmem.h>
  34#include <linux/gfp.h>
  35#include <linux/scatterlist.h>
  36#include <linux/mem_encrypt.h>
  37#include <linux/set_memory.h>
  38#ifdef CONFIG_DEBUG_FS
  39#include <linux/debugfs.h>
  40#endif
  41
  42#include <asm/io.h>
  43#include <asm/dma.h>
  44
  45#include <linux/init.h>
  46#include <linux/memblock.h>
  47#include <linux/iommu-helper.h>
  48
  49#define CREATE_TRACE_POINTS
  50#include <trace/events/swiotlb.h>
  51
  52#define OFFSET(val,align) ((unsigned long)      \
  53                           ( (val) & ( (align) - 1)))
  54
  55#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
  56
  57/*
  58 * Minimum IO TLB size to bother booting with.  Systems with mainly
  59 * 64bit capable cards will only lightly use the swiotlb.  If we can't
  60 * allocate a contiguous 1MB, we're probably in trouble anyway.
  61 */
  62#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
  63
  64enum swiotlb_force swiotlb_force;
  65
  66/*
  67 * Used to do a quick range check in swiotlb_tbl_unmap_single and
  68 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
  69 * API.
  70 */
  71phys_addr_t io_tlb_start, io_tlb_end;
  72
  73/*
  74 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
  75 * io_tlb_end.  This is command line adjustable via setup_io_tlb_npages.
  76 */
  77static unsigned long io_tlb_nslabs;
  78
  79/*
  80 * The number of used IO TLB block
  81 */
  82static unsigned long io_tlb_used;
  83
  84/*
  85 * This is a free list describing the number of free entries available from
  86 * each index
  87 */
  88static unsigned int *io_tlb_list;
  89static unsigned int io_tlb_index;
  90
  91/*
  92 * Max segment that we can provide which (if pages are contingous) will
  93 * not be bounced (unless SWIOTLB_FORCE is set).
  94 */
  95static unsigned int max_segment;
  96
  97/*
  98 * We need to save away the original address corresponding to a mapped entry
  99 * for the sync operations.
 100 */
 101#define INVALID_PHYS_ADDR (~(phys_addr_t)0)
 102static phys_addr_t *io_tlb_orig_addr;
 103
 104/*
 105 * Protect the above data structures in the map and unmap calls
 106 */
 107static DEFINE_SPINLOCK(io_tlb_lock);
 108
 109static int late_alloc;
 110
 111static int __init
 112setup_io_tlb_npages(char *str)
 113{
 114        if (isdigit(*str)) {
 115                io_tlb_nslabs = simple_strtoul(str, &str, 0);
 116                /* avoid tail segment of size < IO_TLB_SEGSIZE */
 117                io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
 118        }
 119        if (*str == ',')
 120                ++str;
 121        if (!strcmp(str, "force")) {
 122                swiotlb_force = SWIOTLB_FORCE;
 123        } else if (!strcmp(str, "noforce")) {
 124                swiotlb_force = SWIOTLB_NO_FORCE;
 125                io_tlb_nslabs = 1;
 126        }
 127
 128        return 0;
 129}
 130early_param("swiotlb", setup_io_tlb_npages);
 131
 132static bool no_iotlb_memory;
 133
 134unsigned long swiotlb_nr_tbl(void)
 135{
 136        return unlikely(no_iotlb_memory) ? 0 : io_tlb_nslabs;
 137}
 138EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
 139
 140unsigned int swiotlb_max_segment(void)
 141{
 142        return unlikely(no_iotlb_memory) ? 0 : max_segment;
 143}
 144EXPORT_SYMBOL_GPL(swiotlb_max_segment);
 145
 146void swiotlb_set_max_segment(unsigned int val)
 147{
 148        if (swiotlb_force == SWIOTLB_FORCE)
 149                max_segment = 1;
 150        else
 151                max_segment = rounddown(val, PAGE_SIZE);
 152}
 153
 154unsigned long swiotlb_size_or_default(void)
 155{
 156        unsigned long size;
 157
 158        size = io_tlb_nslabs << IO_TLB_SHIFT;
 159
 160        return size ? size : (IO_TLB_DEFAULT_SIZE);
 161}
 162
 163void __init swiotlb_adjust_size(unsigned long new_size)
 164{
 165        unsigned long size;
 166
 167        /*
 168         * If swiotlb parameter has not been specified, give a chance to
 169         * architectures such as those supporting memory encryption to
 170         * adjust/expand SWIOTLB size for their use.
 171         */
 172        if (!io_tlb_nslabs) {
 173                size = ALIGN(new_size, 1 << IO_TLB_SHIFT);
 174                io_tlb_nslabs = size >> IO_TLB_SHIFT;
 175                io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
 176
 177                pr_info("SWIOTLB bounce buffer size adjusted to %luMB", size >> 20);
 178        }
 179}
 180
 181void swiotlb_print_info(void)
 182{
 183        unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
 184
 185        if (no_iotlb_memory) {
 186                pr_warn("No low mem\n");
 187                return;
 188        }
 189
 190        pr_info("mapped [mem %pa-%pa] (%luMB)\n", &io_tlb_start, &io_tlb_end,
 191               bytes >> 20);
 192}
 193
 194/*
 195 * Early SWIOTLB allocation may be too early to allow an architecture to
 196 * perform the desired operations.  This function allows the architecture to
 197 * call SWIOTLB when the operations are possible.  It needs to be called
 198 * before the SWIOTLB memory is used.
 199 */
 200void __init swiotlb_update_mem_attributes(void)
 201{
 202        void *vaddr;
 203        unsigned long bytes;
 204
 205        if (no_iotlb_memory || late_alloc)
 206                return;
 207
 208        vaddr = phys_to_virt(io_tlb_start);
 209        bytes = PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT);
 210        set_memory_decrypted((unsigned long)vaddr, bytes >> PAGE_SHIFT);
 211        memset(vaddr, 0, bytes);
 212}
 213
 214int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
 215{
 216        unsigned long i, bytes;
 217        size_t alloc_size;
 218
 219        bytes = nslabs << IO_TLB_SHIFT;
 220
 221        io_tlb_nslabs = nslabs;
 222        io_tlb_start = __pa(tlb);
 223        io_tlb_end = io_tlb_start + bytes;
 224
 225        /*
 226         * Allocate and initialize the free list array.  This array is used
 227         * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
 228         * between io_tlb_start and io_tlb_end.
 229         */
 230        alloc_size = PAGE_ALIGN(io_tlb_nslabs * sizeof(int));
 231        io_tlb_list = memblock_alloc(alloc_size, PAGE_SIZE);
 232        if (!io_tlb_list)
 233                panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
 234                      __func__, alloc_size, PAGE_SIZE);
 235
 236        alloc_size = PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t));
 237        io_tlb_orig_addr = memblock_alloc(alloc_size, PAGE_SIZE);
 238        if (!io_tlb_orig_addr)
 239                panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
 240                      __func__, alloc_size, PAGE_SIZE);
 241
 242        for (i = 0; i < io_tlb_nslabs; i++) {
 243                io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
 244                io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
 245        }
 246        io_tlb_index = 0;
 247        no_iotlb_memory = false;
 248
 249        if (verbose)
 250                swiotlb_print_info();
 251
 252        swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
 253        return 0;
 254}
 255
 256/*
 257 * Statically reserve bounce buffer space and initialize bounce buffer data
 258 * structures for the software IO TLB used to implement the DMA API.
 259 */
 260void  __init
 261swiotlb_init(int verbose)
 262{
 263        size_t default_size = IO_TLB_DEFAULT_SIZE;
 264        unsigned char *vstart;
 265        unsigned long bytes;
 266
 267        if (!io_tlb_nslabs) {
 268                io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
 269                io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
 270        }
 271
 272        bytes = io_tlb_nslabs << IO_TLB_SHIFT;
 273
 274        /* Get IO TLB memory from the low pages */
 275        vstart = memblock_alloc_low_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE);
 276        if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
 277                return;
 278
 279        if (io_tlb_start) {
 280                memblock_free_early(io_tlb_start,
 281                                    PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
 282                io_tlb_start = 0;
 283        }
 284        pr_warn("Cannot allocate buffer");
 285        no_iotlb_memory = true;
 286}
 287
 288/*
 289 * Systems with larger DMA zones (those that don't support ISA) can
 290 * initialize the swiotlb later using the slab allocator if needed.
 291 * This should be just like above, but with some error catching.
 292 */
 293int
 294swiotlb_late_init_with_default_size(size_t default_size)
 295{
 296        unsigned long bytes, req_nslabs = io_tlb_nslabs;
 297        unsigned char *vstart = NULL;
 298        unsigned int order;
 299        int rc = 0;
 300
 301        if (!io_tlb_nslabs) {
 302                io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
 303                io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
 304        }
 305
 306        /*
 307         * Get IO TLB memory from the low pages
 308         */
 309        order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
 310        io_tlb_nslabs = SLABS_PER_PAGE << order;
 311        bytes = io_tlb_nslabs << IO_TLB_SHIFT;
 312
 313        while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
 314                vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
 315                                                  order);
 316                if (vstart)
 317                        break;
 318                order--;
 319        }
 320
 321        if (!vstart) {
 322                io_tlb_nslabs = req_nslabs;
 323                return -ENOMEM;
 324        }
 325        if (order != get_order(bytes)) {
 326                pr_warn("only able to allocate %ld MB\n",
 327                        (PAGE_SIZE << order) >> 20);
 328                io_tlb_nslabs = SLABS_PER_PAGE << order;
 329        }
 330        rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
 331        if (rc)
 332                free_pages((unsigned long)vstart, order);
 333
 334        return rc;
 335}
 336
 337static void swiotlb_cleanup(void)
 338{
 339        io_tlb_end = 0;
 340        io_tlb_start = 0;
 341        io_tlb_nslabs = 0;
 342        max_segment = 0;
 343}
 344
 345int
 346swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
 347{
 348        unsigned long i, bytes;
 349
 350        bytes = nslabs << IO_TLB_SHIFT;
 351
 352        io_tlb_nslabs = nslabs;
 353        io_tlb_start = virt_to_phys(tlb);
 354        io_tlb_end = io_tlb_start + bytes;
 355
 356        set_memory_decrypted((unsigned long)tlb, bytes >> PAGE_SHIFT);
 357        memset(tlb, 0, bytes);
 358
 359        /*
 360         * Allocate and initialize the free list array.  This array is used
 361         * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
 362         * between io_tlb_start and io_tlb_end.
 363         */
 364        io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
 365                                      get_order(io_tlb_nslabs * sizeof(int)));
 366        if (!io_tlb_list)
 367                goto cleanup3;
 368
 369        io_tlb_orig_addr = (phys_addr_t *)
 370                __get_free_pages(GFP_KERNEL,
 371                                 get_order(io_tlb_nslabs *
 372                                           sizeof(phys_addr_t)));
 373        if (!io_tlb_orig_addr)
 374                goto cleanup4;
 375
 376        for (i = 0; i < io_tlb_nslabs; i++) {
 377                io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
 378                io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
 379        }
 380        io_tlb_index = 0;
 381        no_iotlb_memory = false;
 382
 383        swiotlb_print_info();
 384
 385        late_alloc = 1;
 386
 387        swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
 388
 389        return 0;
 390
 391cleanup4:
 392        free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
 393                                                         sizeof(int)));
 394        io_tlb_list = NULL;
 395cleanup3:
 396        swiotlb_cleanup();
 397        return -ENOMEM;
 398}
 399
 400void __init swiotlb_exit(void)
 401{
 402        if (!io_tlb_orig_addr)
 403                return;
 404
 405        if (late_alloc) {
 406                free_pages((unsigned long)io_tlb_orig_addr,
 407                           get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
 408                free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
 409                                                                 sizeof(int)));
 410                free_pages((unsigned long)phys_to_virt(io_tlb_start),
 411                           get_order(io_tlb_nslabs << IO_TLB_SHIFT));
 412        } else {
 413                memblock_free_late(__pa(io_tlb_orig_addr),
 414                                   PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
 415                memblock_free_late(__pa(io_tlb_list),
 416                                   PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
 417                memblock_free_late(io_tlb_start,
 418                                   PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
 419        }
 420        swiotlb_cleanup();
 421}
 422
 423/*
 424 * Bounce: copy the swiotlb buffer back to the original dma location
 425 */
 426static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
 427                           size_t size, enum dma_data_direction dir)
 428{
 429        unsigned long pfn = PFN_DOWN(orig_addr);
 430        unsigned char *vaddr = phys_to_virt(tlb_addr);
 431
 432        if (PageHighMem(pfn_to_page(pfn))) {
 433                /* The buffer does not have a mapping.  Map it in and copy */
 434                unsigned int offset = orig_addr & ~PAGE_MASK;
 435                char *buffer;
 436                unsigned int sz = 0;
 437                unsigned long flags;
 438
 439                while (size) {
 440                        sz = min_t(size_t, PAGE_SIZE - offset, size);
 441
 442                        local_irq_save(flags);
 443                        buffer = kmap_atomic(pfn_to_page(pfn));
 444                        if (dir == DMA_TO_DEVICE)
 445                                memcpy(vaddr, buffer + offset, sz);
 446                        else
 447                                memcpy(buffer + offset, vaddr, sz);
 448                        kunmap_atomic(buffer);
 449                        local_irq_restore(flags);
 450
 451                        size -= sz;
 452                        pfn++;
 453                        vaddr += sz;
 454                        offset = 0;
 455                }
 456        } else if (dir == DMA_TO_DEVICE) {
 457                memcpy(vaddr, phys_to_virt(orig_addr), size);
 458        } else {
 459                memcpy(phys_to_virt(orig_addr), vaddr, size);
 460        }
 461}
 462
 463phys_addr_t swiotlb_tbl_map_single(struct device *hwdev, phys_addr_t orig_addr,
 464                size_t mapping_size, size_t alloc_size,
 465                enum dma_data_direction dir, unsigned long attrs)
 466{
 467        dma_addr_t tbl_dma_addr = phys_to_dma_unencrypted(hwdev, io_tlb_start);
 468        unsigned long flags;
 469        phys_addr_t tlb_addr;
 470        unsigned int nslots, stride, index, wrap;
 471        int i;
 472        unsigned long mask;
 473        unsigned long offset_slots;
 474        unsigned long max_slots;
 475        unsigned long tmp_io_tlb_used;
 476
 477        if (no_iotlb_memory)
 478                panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
 479
 480        if (mem_encrypt_active())
 481                pr_warn_once("Memory encryption is active and system is using DMA bounce buffers\n");
 482
 483        if (mapping_size > alloc_size) {
 484                dev_warn_once(hwdev, "Invalid sizes (mapping: %zd bytes, alloc: %zd bytes)",
 485                              mapping_size, alloc_size);
 486                return (phys_addr_t)DMA_MAPPING_ERROR;
 487        }
 488
 489        mask = dma_get_seg_boundary(hwdev);
 490
 491        tbl_dma_addr &= mask;
 492
 493        offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
 494
 495        /*
 496         * Carefully handle integer overflow which can occur when mask == ~0UL.
 497         */
 498        max_slots = mask + 1
 499                    ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
 500                    : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
 501
 502        /*
 503         * For mappings greater than or equal to a page, we limit the stride
 504         * (and hence alignment) to a page size.
 505         */
 506        nslots = ALIGN(alloc_size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
 507        if (alloc_size >= PAGE_SIZE)
 508                stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
 509        else
 510                stride = 1;
 511
 512        BUG_ON(!nslots);
 513
 514        /*
 515         * Find suitable number of IO TLB entries size that will fit this
 516         * request and allocate a buffer from that IO TLB pool.
 517         */
 518        spin_lock_irqsave(&io_tlb_lock, flags);
 519
 520        if (unlikely(nslots > io_tlb_nslabs - io_tlb_used))
 521                goto not_found;
 522
 523        index = ALIGN(io_tlb_index, stride);
 524        if (index >= io_tlb_nslabs)
 525                index = 0;
 526        wrap = index;
 527
 528        do {
 529                while (iommu_is_span_boundary(index, nslots, offset_slots,
 530                                              max_slots)) {
 531                        index += stride;
 532                        if (index >= io_tlb_nslabs)
 533                                index = 0;
 534                        if (index == wrap)
 535                                goto not_found;
 536                }
 537
 538                /*
 539                 * If we find a slot that indicates we have 'nslots' number of
 540                 * contiguous buffers, we allocate the buffers from that slot
 541                 * and mark the entries as '0' indicating unavailable.
 542                 */
 543                if (io_tlb_list[index] >= nslots) {
 544                        int count = 0;
 545
 546                        for (i = index; i < (int) (index + nslots); i++)
 547                                io_tlb_list[i] = 0;
 548                        for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
 549                                io_tlb_list[i] = ++count;
 550                        tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
 551
 552                        /*
 553                         * Update the indices to avoid searching in the next
 554                         * round.
 555                         */
 556                        io_tlb_index = ((index + nslots) < io_tlb_nslabs
 557                                        ? (index + nslots) : 0);
 558
 559                        goto found;
 560                }
 561                index += stride;
 562                if (index >= io_tlb_nslabs)
 563                        index = 0;
 564        } while (index != wrap);
 565
 566not_found:
 567        tmp_io_tlb_used = io_tlb_used;
 568
 569        spin_unlock_irqrestore(&io_tlb_lock, flags);
 570        if (!(attrs & DMA_ATTR_NO_WARN) && printk_ratelimit())
 571                dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes), total %lu (slots), used %lu (slots)\n",
 572                         alloc_size, io_tlb_nslabs, tmp_io_tlb_used);
 573        return (phys_addr_t)DMA_MAPPING_ERROR;
 574found:
 575        io_tlb_used += nslots;
 576        spin_unlock_irqrestore(&io_tlb_lock, flags);
 577
 578        /*
 579         * Save away the mapping from the original address to the DMA address.
 580         * This is needed when we sync the memory.  Then we sync the buffer if
 581         * needed.
 582         */
 583        for (i = 0; i < nslots; i++)
 584                io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
 585        if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
 586            (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
 587                swiotlb_bounce(orig_addr, tlb_addr, mapping_size, DMA_TO_DEVICE);
 588
 589        return tlb_addr;
 590}
 591
 592/*
 593 * tlb_addr is the physical address of the bounce buffer to unmap.
 594 */
 595void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
 596                              size_t mapping_size, size_t alloc_size,
 597                              enum dma_data_direction dir, unsigned long attrs)
 598{
 599        unsigned long flags;
 600        int i, count, nslots = ALIGN(alloc_size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
 601        int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
 602        phys_addr_t orig_addr = io_tlb_orig_addr[index];
 603
 604        /*
 605         * First, sync the memory before unmapping the entry
 606         */
 607        if (orig_addr != INVALID_PHYS_ADDR &&
 608            !(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
 609            ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
 610                swiotlb_bounce(orig_addr, tlb_addr, mapping_size, DMA_FROM_DEVICE);
 611
 612        /*
 613         * Return the buffer to the free list by setting the corresponding
 614         * entries to indicate the number of contiguous entries available.
 615         * While returning the entries to the free list, we merge the entries
 616         * with slots below and above the pool being returned.
 617         */
 618        spin_lock_irqsave(&io_tlb_lock, flags);
 619        {
 620                count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
 621                         io_tlb_list[index + nslots] : 0);
 622                /*
 623                 * Step 1: return the slots to the free list, merging the
 624                 * slots with superceeding slots
 625                 */
 626                for (i = index + nslots - 1; i >= index; i--) {
 627                        io_tlb_list[i] = ++count;
 628                        io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
 629                }
 630                /*
 631                 * Step 2: merge the returned slots with the preceding slots,
 632                 * if available (non zero)
 633                 */
 634                for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
 635                        io_tlb_list[i] = ++count;
 636
 637                io_tlb_used -= nslots;
 638        }
 639        spin_unlock_irqrestore(&io_tlb_lock, flags);
 640}
 641
 642void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
 643                             size_t size, enum dma_data_direction dir,
 644                             enum dma_sync_target target)
 645{
 646        int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
 647        phys_addr_t orig_addr = io_tlb_orig_addr[index];
 648
 649        if (orig_addr == INVALID_PHYS_ADDR)
 650                return;
 651        orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
 652
 653        switch (target) {
 654        case SYNC_FOR_CPU:
 655                if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
 656                        swiotlb_bounce(orig_addr, tlb_addr,
 657                                       size, DMA_FROM_DEVICE);
 658                else
 659                        BUG_ON(dir != DMA_TO_DEVICE);
 660                break;
 661        case SYNC_FOR_DEVICE:
 662                if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
 663                        swiotlb_bounce(orig_addr, tlb_addr,
 664                                       size, DMA_TO_DEVICE);
 665                else
 666                        BUG_ON(dir != DMA_FROM_DEVICE);
 667                break;
 668        default:
 669                BUG();
 670        }
 671}
 672
 673/*
 674 * Create a swiotlb mapping for the buffer at @paddr, and in case of DMAing
 675 * to the device copy the data into it as well.
 676 */
 677dma_addr_t swiotlb_map(struct device *dev, phys_addr_t paddr, size_t size,
 678                enum dma_data_direction dir, unsigned long attrs)
 679{
 680        phys_addr_t swiotlb_addr;
 681        dma_addr_t dma_addr;
 682
 683        trace_swiotlb_bounced(dev, phys_to_dma(dev, paddr), size,
 684                              swiotlb_force);
 685
 686        swiotlb_addr = swiotlb_tbl_map_single(dev, paddr, size, size, dir,
 687                        attrs);
 688        if (swiotlb_addr == (phys_addr_t)DMA_MAPPING_ERROR)
 689                return DMA_MAPPING_ERROR;
 690
 691        /* Ensure that the address returned is DMA'ble */
 692        dma_addr = phys_to_dma_unencrypted(dev, swiotlb_addr);
 693        if (unlikely(!dma_capable(dev, dma_addr, size, true))) {
 694                swiotlb_tbl_unmap_single(dev, swiotlb_addr, size, size, dir,
 695                        attrs | DMA_ATTR_SKIP_CPU_SYNC);
 696                dev_WARN_ONCE(dev, 1,
 697                        "swiotlb addr %pad+%zu overflow (mask %llx, bus limit %llx).\n",
 698                        &dma_addr, size, *dev->dma_mask, dev->bus_dma_limit);
 699                return DMA_MAPPING_ERROR;
 700        }
 701
 702        if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
 703                arch_sync_dma_for_device(swiotlb_addr, size, dir);
 704        return dma_addr;
 705}
 706
 707size_t swiotlb_max_mapping_size(struct device *dev)
 708{
 709        return ((size_t)1 << IO_TLB_SHIFT) * IO_TLB_SEGSIZE;
 710}
 711
 712bool is_swiotlb_active(void)
 713{
 714        /*
 715         * When SWIOTLB is initialized, even if io_tlb_start points to physical
 716         * address zero, io_tlb_end surely doesn't.
 717         */
 718        return io_tlb_end != 0;
 719}
 720
 721#ifdef CONFIG_DEBUG_FS
 722
 723static int __init swiotlb_create_debugfs(void)
 724{
 725        struct dentry *root;
 726
 727        root = debugfs_create_dir("swiotlb", NULL);
 728        debugfs_create_ulong("io_tlb_nslabs", 0400, root, &io_tlb_nslabs);
 729        debugfs_create_ulong("io_tlb_used", 0400, root, &io_tlb_used);
 730        return 0;
 731}
 732
 733late_initcall(swiotlb_create_debugfs);
 734
 735#endif
 736