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11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/dma-mapping.h>
14#include <linux/platform_device.h>
15#include <linux/gpio.h>
16#include <linux/gpio/machine.h>
17#include <linux/i2c.h>
18#include <linux/platform_data/pcf857x.h>
19#include <linux/platform_data/at24.h>
20#include <linux/platform_data/gpio-davinci.h>
21#include <linux/mtd/mtd.h>
22#include <linux/mtd/rawnand.h>
23#include <linux/mtd/partitions.h>
24#include <linux/mtd/physmap.h>
25#include <linux/phy.h>
26#include <linux/clk.h>
27#include <linux/videodev2.h>
28#include <linux/v4l2-dv-timings.h>
29#include <linux/export.h>
30#include <linux/leds.h>
31
32#include <media/i2c/tvp514x.h>
33
34#include <asm/mach-types.h>
35#include <asm/mach/arch.h>
36
37#include <mach/common.h>
38#include <linux/platform_data/i2c-davinci.h>
39#include <mach/serial.h>
40#include <mach/mux.h>
41#include <linux/platform_data/mtd-davinci.h>
42#include <linux/platform_data/mmc-davinci.h>
43#include <linux/platform_data/usb-davinci.h>
44#include <linux/platform_data/mtd-davinci-aemif.h>
45
46#include "davinci.h"
47
48#define DM644X_EVM_PHY_ID "davinci_mdio-0:01"
49#define LXT971_PHY_ID (0x001378e2)
50#define LXT971_PHY_MASK (0xfffffff0)
51
52static struct mtd_partition davinci_evm_norflash_partitions[] = {
53
54 {
55 .name = "bootloader",
56 .offset = 0,
57 .size = 5 * SZ_64K,
58 .mask_flags = MTD_WRITEABLE,
59 },
60
61 {
62 .name = "params",
63 .offset = MTDPART_OFS_APPEND,
64 .size = SZ_64K,
65 .mask_flags = 0,
66 },
67
68 {
69 .name = "kernel",
70 .offset = MTDPART_OFS_APPEND,
71 .size = SZ_2M,
72 .mask_flags = 0
73 },
74
75 {
76 .name = "filesystem",
77 .offset = MTDPART_OFS_APPEND,
78 .size = MTDPART_SIZ_FULL,
79 .mask_flags = 0
80 }
81};
82
83static struct physmap_flash_data davinci_evm_norflash_data = {
84 .width = 2,
85 .parts = davinci_evm_norflash_partitions,
86 .nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions),
87};
88
89
90
91static struct resource davinci_evm_norflash_resource = {
92 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
93 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
94 .flags = IORESOURCE_MEM,
95};
96
97static struct platform_device davinci_evm_norflash_device = {
98 .name = "physmap-flash",
99 .id = 0,
100 .dev = {
101 .platform_data = &davinci_evm_norflash_data,
102 },
103 .num_resources = 1,
104 .resource = &davinci_evm_norflash_resource,
105};
106
107
108
109
110
111static struct mtd_partition davinci_evm_nandflash_partition[] = {
112
113
114
115
116
117
118
119 {
120 .name = "bootloader",
121 .offset = 0,
122 .size = SZ_256K + SZ_128K,
123 .mask_flags = MTD_WRITEABLE,
124 },
125
126 {
127 .name = "kernel",
128 .offset = MTDPART_OFS_APPEND,
129 .size = SZ_4M,
130 .mask_flags = 0,
131 },
132
133 {
134 .name = "filesystem",
135 .offset = MTDPART_OFS_APPEND,
136 .size = MTDPART_SIZ_FULL,
137 .mask_flags = 0,
138 }
139
140
141
142
143};
144
145static struct davinci_aemif_timing davinci_evm_nandflash_timing = {
146 .wsetup = 20,
147 .wstrobe = 40,
148 .whold = 20,
149 .rsetup = 10,
150 .rstrobe = 40,
151 .rhold = 10,
152 .ta = 40,
153};
154
155static struct davinci_nand_pdata davinci_evm_nandflash_data = {
156 .core_chipsel = 0,
157 .parts = davinci_evm_nandflash_partition,
158 .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
159 .ecc_mode = NAND_ECC_HW,
160 .ecc_bits = 1,
161 .bbt_options = NAND_BBT_USE_FLASH,
162 .timing = &davinci_evm_nandflash_timing,
163};
164
165static struct resource davinci_evm_nandflash_resource[] = {
166 {
167 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
168 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
169 .flags = IORESOURCE_MEM,
170 }, {
171 .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
172 .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
173 .flags = IORESOURCE_MEM,
174 },
175};
176
177static struct platform_device davinci_evm_nandflash_device = {
178 .name = "davinci_nand",
179 .id = 0,
180 .dev = {
181 .platform_data = &davinci_evm_nandflash_data,
182 },
183 .num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
184 .resource = davinci_evm_nandflash_resource,
185};
186
187static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
188
189static struct platform_device davinci_fb_device = {
190 .name = "davincifb",
191 .id = -1,
192 .dev = {
193 .dma_mask = &davinci_fb_dma_mask,
194 .coherent_dma_mask = DMA_BIT_MASK(32),
195 },
196 .num_resources = 0,
197};
198
199static struct tvp514x_platform_data dm644xevm_tvp5146_pdata = {
200 .clk_polarity = 0,
201 .hs_polarity = 1,
202 .vs_polarity = 1
203};
204
205#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
206
207static struct v4l2_input dm644xevm_tvp5146_inputs[] = {
208 {
209 .index = 0,
210 .name = "Composite",
211 .type = V4L2_INPUT_TYPE_CAMERA,
212 .std = TVP514X_STD_ALL,
213 },
214 {
215 .index = 1,
216 .name = "S-Video",
217 .type = V4L2_INPUT_TYPE_CAMERA,
218 .std = TVP514X_STD_ALL,
219 },
220};
221
222
223
224
225
226
227static struct vpfe_route dm644xevm_tvp5146_routes[] = {
228 {
229 .input = INPUT_CVBS_VI2B,
230 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
231 },
232 {
233 .input = INPUT_SVIDEO_VI2C_VI1C,
234 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
235 },
236};
237
238static struct vpfe_subdev_info dm644xevm_vpfe_sub_devs[] = {
239 {
240 .name = "tvp5146",
241 .grp_id = 0,
242 .num_inputs = ARRAY_SIZE(dm644xevm_tvp5146_inputs),
243 .inputs = dm644xevm_tvp5146_inputs,
244 .routes = dm644xevm_tvp5146_routes,
245 .can_route = 1,
246 .ccdc_if_params = {
247 .if_type = VPFE_BT656,
248 .hdpol = VPFE_PINPOL_POSITIVE,
249 .vdpol = VPFE_PINPOL_POSITIVE,
250 },
251 .board_info = {
252 I2C_BOARD_INFO("tvp5146", 0x5d),
253 .platform_data = &dm644xevm_tvp5146_pdata,
254 },
255 },
256};
257
258static struct vpfe_config dm644xevm_capture_cfg = {
259 .num_subdevs = ARRAY_SIZE(dm644xevm_vpfe_sub_devs),
260 .i2c_adapter_id = 1,
261 .sub_devs = dm644xevm_vpfe_sub_devs,
262 .card_name = "DM6446 EVM",
263 .ccdc = "DM6446 CCDC",
264};
265
266static struct platform_device rtc_dev = {
267 .name = "rtc_davinci_evm",
268 .id = -1,
269};
270
271
272#ifdef CONFIG_I2C
273
274
275
276
277#define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
278
279
280
281
282static struct gpio_led evm_leds[] = {
283 { .name = "DS8", .active_low = 1,
284 .default_trigger = "heartbeat", },
285 { .name = "DS7", .active_low = 1, },
286 { .name = "DS6", .active_low = 1, },
287 { .name = "DS5", .active_low = 1, },
288 { .name = "DS4", .active_low = 1, },
289 { .name = "DS3", .active_low = 1, },
290 { .name = "DS2", .active_low = 1,
291 .default_trigger = "mmc0", },
292 { .name = "DS1", .active_low = 1,
293 .default_trigger = "disk-activity", },
294};
295
296static const struct gpio_led_platform_data evm_led_data = {
297 .num_leds = ARRAY_SIZE(evm_leds),
298 .leds = evm_leds,
299};
300
301static struct platform_device *evm_led_dev;
302
303static int
304evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
305{
306 struct gpio_led *leds = evm_leds;
307 int status;
308
309 while (ngpio--) {
310 leds->gpio = gpio++;
311 leds++;
312 }
313
314
315
316
317 evm_led_dev = platform_device_alloc("leds-gpio", 0);
318 platform_device_add_data(evm_led_dev,
319 &evm_led_data, sizeof evm_led_data);
320
321 evm_led_dev->dev.parent = &client->dev;
322 status = platform_device_add(evm_led_dev);
323 if (status < 0) {
324 platform_device_put(evm_led_dev);
325 evm_led_dev = NULL;
326 }
327 return status;
328}
329
330static int
331evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
332{
333 if (evm_led_dev) {
334 platform_device_unregister(evm_led_dev);
335 evm_led_dev = NULL;
336 }
337 return 0;
338}
339
340static struct pcf857x_platform_data pcf_data_u2 = {
341 .gpio_base = PCF_Uxx_BASE(0),
342 .setup = evm_led_setup,
343 .teardown = evm_led_teardown,
344};
345
346
347
348
349static int sw_gpio;
350
351static ssize_t
352sw_show(struct device *d, struct device_attribute *a, char *buf)
353{
354 char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
355
356 strcpy(buf, s);
357 return strlen(s);
358}
359
360static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
361
362static int
363evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
364{
365 int status;
366
367
368 sw_gpio = gpio + 7;
369 status = gpio_request(sw_gpio, "user_sw");
370 if (status == 0)
371 status = gpio_direction_input(sw_gpio);
372 if (status == 0)
373 status = device_create_file(&client->dev, &dev_attr_user_sw);
374 else
375 gpio_free(sw_gpio);
376 if (status != 0)
377 sw_gpio = -EINVAL;
378
379
380 gpio_request(gpio + 3, "pll_fs2");
381 gpio_direction_output(gpio + 3, 0);
382
383 gpio_request(gpio + 2, "pll_fs1");
384 gpio_direction_output(gpio + 2, 0);
385
386 gpio_request(gpio + 1, "pll_sr");
387 gpio_direction_output(gpio + 1, 0);
388
389 return 0;
390}
391
392static int
393evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
394{
395 gpio_free(gpio + 1);
396 gpio_free(gpio + 2);
397 gpio_free(gpio + 3);
398
399 if (sw_gpio > 0) {
400 device_remove_file(&client->dev, &dev_attr_user_sw);
401 gpio_free(sw_gpio);
402 }
403 return 0;
404}
405
406static struct pcf857x_platform_data pcf_data_u18 = {
407 .gpio_base = PCF_Uxx_BASE(1),
408 .n_latch = (1 << 3) | (1 << 2) | (1 << 1),
409 .setup = evm_u18_setup,
410 .teardown = evm_u18_teardown,
411};
412
413
414
415
416static int
417evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
418{
419
420 gpio_request(gpio + 0, "nDRV_VBUS");
421 gpio_direction_output(gpio + 0, 1);
422
423
424 gpio_request(gpio + 1, "VDDIMX_EN");
425 gpio_direction_output(gpio + 1, 1);
426
427
428 gpio_request(gpio + 2, "VLYNQ_EN");
429 gpio_direction_output(gpio + 2, 1);
430
431
432 gpio_request(gpio + 3, "nCF_RESET");
433 gpio_direction_output(gpio + 3, 0);
434
435
436
437
438 gpio_request(gpio + 5, "WLAN_RESET");
439 gpio_direction_output(gpio + 5, 1);
440
441
442 gpio_request(gpio + 6, "nATA_SEL");
443 gpio_direction_output(gpio + 6, 0);
444
445
446 gpio_request(gpio + 7, "nCF_SEL");
447 gpio_direction_output(gpio + 7, 1);
448
449 return 0;
450}
451
452static int
453evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
454{
455 gpio_free(gpio + 7);
456 gpio_free(gpio + 6);
457 gpio_free(gpio + 5);
458 gpio_free(gpio + 3);
459 gpio_free(gpio + 2);
460 gpio_free(gpio + 1);
461 gpio_free(gpio + 0);
462 return 0;
463}
464
465static struct pcf857x_platform_data pcf_data_u35 = {
466 .gpio_base = PCF_Uxx_BASE(2),
467 .setup = evm_u35_setup,
468 .teardown = evm_u35_teardown,
469};
470
471
472
473
474
475
476
477
478
479static struct at24_platform_data eeprom_info = {
480 .byte_len = (256*1024) / 8,
481 .page_size = 64,
482 .flags = AT24_FLAG_ADDR16,
483 .setup = davinci_get_mac_addr,
484 .context = (void *)0x7f00,
485};
486
487
488
489
490
491
492static struct i2c_client *dm6446evm_msp;
493
494static int dm6446evm_msp_probe(struct i2c_client *client,
495 const struct i2c_device_id *id)
496{
497 dm6446evm_msp = client;
498 return 0;
499}
500
501static int dm6446evm_msp_remove(struct i2c_client *client)
502{
503 dm6446evm_msp = NULL;
504 return 0;
505}
506
507static const struct i2c_device_id dm6446evm_msp_ids[] = {
508 { "dm6446evm_msp", 0, },
509 { },
510};
511
512static struct i2c_driver dm6446evm_msp_driver = {
513 .driver.name = "dm6446evm_msp",
514 .id_table = dm6446evm_msp_ids,
515 .probe = dm6446evm_msp_probe,
516 .remove = dm6446evm_msp_remove,
517};
518
519static int dm6444evm_msp430_get_pins(void)
520{
521 static const char txbuf[2] = { 2, 4, };
522 char buf[4];
523 struct i2c_msg msg[2] = {
524 {
525 .flags = 0,
526 .len = 2,
527 .buf = (void __force *)txbuf,
528 },
529 {
530 .flags = I2C_M_RD,
531 .len = 4,
532 .buf = buf,
533 },
534 };
535 int status;
536
537 if (!dm6446evm_msp)
538 return -ENXIO;
539
540 msg[0].addr = dm6446evm_msp->addr;
541 msg[1].addr = dm6446evm_msp->addr;
542
543
544
545
546
547 status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
548 if (status < 0)
549 return status;
550
551 dev_dbg(&dm6446evm_msp->dev, "PINS: %4ph\n", buf);
552
553 return (buf[3] << 8) | buf[2];
554}
555
556static int dm6444evm_mmc_get_cd(int module)
557{
558 int status = dm6444evm_msp430_get_pins();
559
560 return (status < 0) ? status : !(status & BIT(1));
561}
562
563static int dm6444evm_mmc_get_ro(int module)
564{
565 int status = dm6444evm_msp430_get_pins();
566
567 return (status < 0) ? status : status & BIT(6 + 8);
568}
569
570static struct davinci_mmc_config dm6446evm_mmc_config = {
571 .get_cd = dm6444evm_mmc_get_cd,
572 .get_ro = dm6444evm_mmc_get_ro,
573 .wires = 4,
574};
575
576static struct i2c_board_info __initdata i2c_info[] = {
577 {
578 I2C_BOARD_INFO("dm6446evm_msp", 0x23),
579 },
580 {
581 I2C_BOARD_INFO("pcf8574", 0x38),
582 .platform_data = &pcf_data_u2,
583 },
584 {
585 I2C_BOARD_INFO("pcf8574", 0x39),
586 .platform_data = &pcf_data_u18,
587 },
588 {
589 I2C_BOARD_INFO("pcf8574", 0x3a),
590 .platform_data = &pcf_data_u35,
591 },
592 {
593 I2C_BOARD_INFO("24c256", 0x50),
594 .platform_data = &eeprom_info,
595 },
596 {
597 I2C_BOARD_INFO("tlv320aic33", 0x1b),
598 },
599};
600
601#define DM644X_I2C_SDA_PIN GPIO_TO_PIN(2, 12)
602#define DM644X_I2C_SCL_PIN GPIO_TO_PIN(2, 11)
603
604static struct gpiod_lookup_table i2c_recovery_gpiod_table = {
605 .dev_id = "i2c_davinci.1",
606 .table = {
607 GPIO_LOOKUP("davinci_gpio.0", DM644X_I2C_SDA_PIN, "sda",
608 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
609 GPIO_LOOKUP("davinci_gpio.0", DM644X_I2C_SCL_PIN, "scl",
610 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
611 },
612};
613
614
615
616
617static struct davinci_i2c_platform_data i2c_pdata = {
618 .bus_freq = 20 ,
619 .bus_delay = 100 ,
620 .gpio_recovery = true,
621};
622
623static void __init evm_init_i2c(void)
624{
625 gpiod_add_lookup_table(&i2c_recovery_gpiod_table);
626 davinci_init_i2c(&i2c_pdata);
627 i2c_add_driver(&dm6446evm_msp_driver);
628 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
629}
630#endif
631
632#define VENC_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
633
634
635static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
636 {
637 .name = "ntsc",
638 .timings_type = VPBE_ENC_STD,
639 .std_id = V4L2_STD_NTSC,
640 .interlaced = 1,
641 .xres = 720,
642 .yres = 480,
643 .aspect = {11, 10},
644 .fps = {30000, 1001},
645 .left_margin = 0x79,
646 .upper_margin = 0x10,
647 },
648 {
649 .name = "pal",
650 .timings_type = VPBE_ENC_STD,
651 .std_id = V4L2_STD_PAL,
652 .interlaced = 1,
653 .xres = 720,
654 .yres = 576,
655 .aspect = {54, 59},
656 .fps = {25, 1},
657 .left_margin = 0x7e,
658 .upper_margin = 0x16,
659 },
660};
661
662
663static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
664 {
665 .name = "480p59_94",
666 .timings_type = VPBE_ENC_DV_TIMINGS,
667 .dv_timings = V4L2_DV_BT_CEA_720X480P59_94,
668 .interlaced = 0,
669 .xres = 720,
670 .yres = 480,
671 .aspect = {1, 1},
672 .fps = {5994, 100},
673 .left_margin = 0x80,
674 .upper_margin = 0x20,
675 },
676 {
677 .name = "576p50",
678 .timings_type = VPBE_ENC_DV_TIMINGS,
679 .dv_timings = V4L2_DV_BT_CEA_720X576P50,
680 .interlaced = 0,
681 .xres = 720,
682 .yres = 576,
683 .aspect = {1, 1},
684 .fps = {50, 1},
685 .left_margin = 0x7e,
686 .upper_margin = 0x30,
687 },
688};
689
690
691
692
693
694
695
696
697
698static struct vpbe_output dm644xevm_vpbe_outputs[] = {
699 {
700 .output = {
701 .index = 0,
702 .name = "Composite",
703 .type = V4L2_OUTPUT_TYPE_ANALOG,
704 .std = VENC_STD_ALL,
705 .capabilities = V4L2_OUT_CAP_STD,
706 },
707 .subdev_name = DM644X_VPBE_VENC_SUBDEV_NAME,
708 .default_mode = "ntsc",
709 .num_modes = ARRAY_SIZE(dm644xevm_enc_std_timing),
710 .modes = dm644xevm_enc_std_timing,
711 },
712 {
713 .output = {
714 .index = 1,
715 .name = "Component",
716 .type = V4L2_OUTPUT_TYPE_ANALOG,
717 .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
718 },
719 .subdev_name = DM644X_VPBE_VENC_SUBDEV_NAME,
720 .default_mode = "480p59_94",
721 .num_modes = ARRAY_SIZE(dm644xevm_enc_preset_timing),
722 .modes = dm644xevm_enc_preset_timing,
723 },
724};
725
726static struct vpbe_config dm644xevm_display_cfg = {
727 .module_name = "dm644x-vpbe-display",
728 .i2c_adapter_id = 1,
729 .osd = {
730 .module_name = DM644X_VPBE_OSD_SUBDEV_NAME,
731 },
732 .venc = {
733 .module_name = DM644X_VPBE_VENC_SUBDEV_NAME,
734 },
735 .num_outputs = ARRAY_SIZE(dm644xevm_vpbe_outputs),
736 .outputs = dm644xevm_vpbe_outputs,
737};
738
739static struct platform_device *davinci_evm_devices[] __initdata = {
740 &davinci_fb_device,
741 &rtc_dev,
742};
743
744static void __init
745davinci_evm_map_io(void)
746{
747 dm644x_init();
748}
749
750static int davinci_phy_fixup(struct phy_device *phydev)
751{
752 unsigned int control;
753
754
755
756
757
758 control = phy_read(phydev, 26);
759 phy_write(phydev, 26, (control | 0x800));
760 return 0;
761}
762
763#define HAS_ATA (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
764 IS_ENABLED(CONFIG_PATA_BK3710))
765
766#define HAS_NOR IS_ENABLED(CONFIG_MTD_PHYSMAP)
767
768#define HAS_NAND IS_ENABLED(CONFIG_MTD_NAND_DAVINCI)
769
770static __init void davinci_evm_init(void)
771{
772 int ret;
773 struct clk *aemif_clk;
774 struct davinci_soc_info *soc_info = &davinci_soc_info;
775
776 dm644x_init_devices();
777
778 ret = dm644x_gpio_register();
779 if (ret)
780 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
781
782 aemif_clk = clk_get(NULL, "aemif");
783 clk_prepare_enable(aemif_clk);
784
785 if (HAS_ATA) {
786 if (HAS_NAND || HAS_NOR)
787 pr_warn("WARNING: both IDE and Flash are enabled, but they share AEMIF pins\n"
788 "\tDisable IDE for NAND/NOR support\n");
789 davinci_init_ide();
790 } else if (HAS_NAND || HAS_NOR) {
791 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
792 davinci_cfg_reg(DM644X_ATAEN_DISABLE);
793
794
795 if (HAS_NAND) {
796 platform_device_register(&davinci_evm_nandflash_device);
797
798 if (davinci_aemif_setup(&davinci_evm_nandflash_device))
799 pr_warn("%s: Cannot configure AEMIF\n",
800 __func__);
801
802#ifdef CONFIG_I2C
803 evm_leds[7].default_trigger = "nand-disk";
804#endif
805 if (HAS_NOR)
806 pr_warn("WARNING: both NAND and NOR flash are enabled; disable one of them.\n");
807 } else if (HAS_NOR)
808 platform_device_register(&davinci_evm_norflash_device);
809 }
810
811 platform_add_devices(davinci_evm_devices,
812 ARRAY_SIZE(davinci_evm_devices));
813#ifdef CONFIG_I2C
814 evm_init_i2c();
815 davinci_setup_mmc(0, &dm6446evm_mmc_config);
816#endif
817 dm644x_init_video(&dm644xevm_capture_cfg, &dm644xevm_display_cfg);
818
819 davinci_serial_init(dm644x_serial_device);
820 dm644x_init_asp();
821
822
823 davinci_setup_usb(1000, 8);
824
825 if (IS_BUILTIN(CONFIG_PHYLIB)) {
826 soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
827
828 phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
829 davinci_phy_fixup);
830 }
831}
832
833MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
834
835 .atag_offset = 0x100,
836 .map_io = davinci_evm_map_io,
837 .init_irq = davinci_irq_init,
838 .init_time = dm644x_init_time,
839 .init_machine = davinci_evm_init,
840 .init_late = davinci_init_late,
841 .dma_zone_size = SZ_128M,
842MACHINE_END
843