linux/arch/powerpc/kernel/setup-common.c
<<
>>
Prefs
   1/*
   2 * Common boot and setup code for both 32-bit and 64-bit.
   3 * Extracted from arch/powerpc/kernel/setup_64.c.
   4 *
   5 * Copyright (C) 2001 PPC64 Team, IBM Corp
   6 *
   7 *      This program is free software; you can redistribute it and/or
   8 *      modify it under the terms of the GNU General Public License
   9 *      as published by the Free Software Foundation; either version
  10 *      2 of the License, or (at your option) any later version.
  11 */
  12
  13#undef DEBUG
  14
  15#include <linux/export.h>
  16#include <linux/string.h>
  17#include <linux/sched.h>
  18#include <linux/init.h>
  19#include <linux/kernel.h>
  20#include <linux/reboot.h>
  21#include <linux/delay.h>
  22#include <linux/initrd.h>
  23#include <linux/platform_device.h>
  24#include <linux/seq_file.h>
  25#include <linux/ioport.h>
  26#include <linux/console.h>
  27#include <linux/screen_info.h>
  28#include <linux/root_dev.h>
  29#include <linux/notifier.h>
  30#include <linux/cpu.h>
  31#include <linux/unistd.h>
  32#include <linux/serial.h>
  33#include <linux/serial_8250.h>
  34#include <linux/percpu.h>
  35#include <linux/memblock.h>
  36#include <linux/of_platform.h>
  37#include <linux/hugetlb.h>
  38#include <asm/debugfs.h>
  39#include <asm/io.h>
  40#include <asm/paca.h>
  41#include <asm/prom.h>
  42#include <asm/processor.h>
  43#include <asm/vdso_datapage.h>
  44#include <asm/pgtable.h>
  45#include <asm/smp.h>
  46#include <asm/elf.h>
  47#include <asm/machdep.h>
  48#include <asm/time.h>
  49#include <asm/cputable.h>
  50#include <asm/sections.h>
  51#include <asm/firmware.h>
  52#include <asm/btext.h>
  53#include <asm/nvram.h>
  54#include <asm/setup.h>
  55#include <asm/rtas.h>
  56#include <asm/iommu.h>
  57#include <asm/serial.h>
  58#include <asm/cache.h>
  59#include <asm/page.h>
  60#include <asm/mmu.h>
  61#include <asm/xmon.h>
  62#include <asm/cputhreads.h>
  63#include <mm/mmu_decl.h>
  64#include <asm/fadump.h>
  65#include <asm/udbg.h>
  66#include <asm/hugetlb.h>
  67#include <asm/livepatch.h>
  68#include <asm/mmu_context.h>
  69#include <asm/cpu_has_feature.h>
  70#include <asm/mce.h>
  71
  72#include "setup.h"
  73
  74#ifdef DEBUG
  75#include <asm/udbg.h>
  76#define DBG(fmt...) udbg_printf(fmt)
  77#else
  78#define DBG(fmt...)
  79#endif
  80
  81/* The main machine-dep calls structure
  82 */
  83struct machdep_calls ppc_md;
  84EXPORT_SYMBOL(ppc_md);
  85struct machdep_calls *machine_id;
  86EXPORT_SYMBOL(machine_id);
  87
  88int boot_cpuid = -1;
  89EXPORT_SYMBOL_GPL(boot_cpuid);
  90
  91/*
  92 * These are used in binfmt_elf.c to put aux entries on the stack
  93 * for each elf executable being started.
  94 */
  95int dcache_bsize;
  96int icache_bsize;
  97int ucache_bsize;
  98
  99
 100unsigned long klimit = (unsigned long) _end;
 101
 102/*
 103 * This still seems to be needed... -- paulus
 104 */ 
 105struct screen_info screen_info = {
 106        .orig_x = 0,
 107        .orig_y = 25,
 108        .orig_video_cols = 80,
 109        .orig_video_lines = 25,
 110        .orig_video_isVGA = 1,
 111        .orig_video_points = 16
 112};
 113#if defined(CONFIG_FB_VGA16_MODULE)
 114EXPORT_SYMBOL(screen_info);
 115#endif
 116
 117/* Variables required to store legacy IO irq routing */
 118int of_i8042_kbd_irq;
 119EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
 120int of_i8042_aux_irq;
 121EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
 122
 123#ifdef __DO_IRQ_CANON
 124/* XXX should go elsewhere eventually */
 125int ppc_do_canonicalize_irqs;
 126EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
 127#endif
 128
 129#ifdef CONFIG_CRASH_CORE
 130/* This keeps a track of which one is the crashing cpu. */
 131int crashing_cpu = -1;
 132#endif
 133
 134/* also used by kexec */
 135void machine_shutdown(void)
 136{
 137        /*
 138         * if fadump is active, cleanup the fadump registration before we
 139         * shutdown.
 140         */
 141        fadump_cleanup();
 142
 143        if (ppc_md.machine_shutdown)
 144                ppc_md.machine_shutdown();
 145}
 146
 147static void machine_hang(void)
 148{
 149        pr_emerg("System Halted, OK to turn off power\n");
 150        local_irq_disable();
 151        while (1)
 152                ;
 153}
 154
 155void machine_restart(char *cmd)
 156{
 157        machine_shutdown();
 158        if (ppc_md.restart)
 159                ppc_md.restart(cmd);
 160
 161        smp_send_stop();
 162
 163        do_kernel_restart(cmd);
 164        mdelay(1000);
 165
 166        machine_hang();
 167}
 168
 169void machine_power_off(void)
 170{
 171        machine_shutdown();
 172        if (pm_power_off)
 173                pm_power_off();
 174
 175        smp_send_stop();
 176        machine_hang();
 177}
 178/* Used by the G5 thermal driver */
 179EXPORT_SYMBOL_GPL(machine_power_off);
 180
 181void (*pm_power_off)(void);
 182EXPORT_SYMBOL_GPL(pm_power_off);
 183
 184void machine_halt(void)
 185{
 186        machine_shutdown();
 187        if (ppc_md.halt)
 188                ppc_md.halt();
 189
 190        smp_send_stop();
 191        machine_hang();
 192}
 193
 194#ifdef CONFIG_SMP
 195DEFINE_PER_CPU(unsigned int, cpu_pvr);
 196#endif
 197
 198static void show_cpuinfo_summary(struct seq_file *m)
 199{
 200        struct device_node *root;
 201        const char *model = NULL;
 202#if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
 203        unsigned long bogosum = 0;
 204        int i;
 205        for_each_online_cpu(i)
 206                bogosum += loops_per_jiffy;
 207        seq_printf(m, "total bogomips\t: %lu.%02lu\n",
 208                   bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
 209#endif /* CONFIG_SMP && CONFIG_PPC32 */
 210        seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
 211        if (ppc_md.name)
 212                seq_printf(m, "platform\t: %s\n", ppc_md.name);
 213        root = of_find_node_by_path("/");
 214        if (root)
 215                model = of_get_property(root, "model", NULL);
 216        if (model)
 217                seq_printf(m, "model\t\t: %s\n", model);
 218        of_node_put(root);
 219
 220        if (ppc_md.show_cpuinfo != NULL)
 221                ppc_md.show_cpuinfo(m);
 222
 223#ifdef CONFIG_PPC32
 224        /* Display the amount of memory */
 225        seq_printf(m, "Memory\t\t: %d MB\n",
 226                   (unsigned int)(total_memory / (1024 * 1024)));
 227#endif
 228}
 229
 230static int show_cpuinfo(struct seq_file *m, void *v)
 231{
 232        unsigned long cpu_id = (unsigned long)v - 1;
 233        unsigned int pvr;
 234        unsigned long proc_freq;
 235        unsigned short maj;
 236        unsigned short min;
 237
 238#ifdef CONFIG_SMP
 239        pvr = per_cpu(cpu_pvr, cpu_id);
 240#else
 241        pvr = mfspr(SPRN_PVR);
 242#endif
 243        maj = (pvr >> 8) & 0xFF;
 244        min = pvr & 0xFF;
 245
 246        seq_printf(m, "processor\t: %lu\n", cpu_id);
 247        seq_printf(m, "cpu\t\t: ");
 248
 249        if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name)
 250                seq_printf(m, "%s", cur_cpu_spec->cpu_name);
 251        else
 252                seq_printf(m, "unknown (%08x)", pvr);
 253
 254#ifdef CONFIG_ALTIVEC
 255        if (cpu_has_feature(CPU_FTR_ALTIVEC))
 256                seq_printf(m, ", altivec supported");
 257#endif /* CONFIG_ALTIVEC */
 258
 259        seq_printf(m, "\n");
 260
 261#ifdef CONFIG_TAU
 262        if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
 263#ifdef CONFIG_TAU_AVERAGE
 264                /* more straightforward, but potentially misleading */
 265                seq_printf(m,  "temperature \t: %u C (uncalibrated)\n",
 266                           cpu_temp(cpu_id));
 267#else
 268                /* show the actual temp sensor range */
 269                u32 temp;
 270                temp = cpu_temp_both(cpu_id);
 271                seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
 272                           temp & 0xff, temp >> 16);
 273#endif
 274        }
 275#endif /* CONFIG_TAU */
 276
 277        /*
 278         * Platforms that have variable clock rates, should implement
 279         * the method ppc_md.get_proc_freq() that reports the clock
 280         * rate of a given cpu. The rest can use ppc_proc_freq to
 281         * report the clock rate that is same across all cpus.
 282         */
 283        if (ppc_md.get_proc_freq)
 284                proc_freq = ppc_md.get_proc_freq(cpu_id);
 285        else
 286                proc_freq = ppc_proc_freq;
 287
 288        if (proc_freq)
 289                seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
 290                           proc_freq / 1000000, proc_freq % 1000000);
 291
 292        if (ppc_md.show_percpuinfo != NULL)
 293                ppc_md.show_percpuinfo(m, cpu_id);
 294
 295        /* If we are a Freescale core do a simple check so
 296         * we dont have to keep adding cases in the future */
 297        if (PVR_VER(pvr) & 0x8000) {
 298                switch (PVR_VER(pvr)) {
 299                case 0x8000:    /* 7441/7450/7451, Voyager */
 300                case 0x8001:    /* 7445/7455, Apollo 6 */
 301                case 0x8002:    /* 7447/7457, Apollo 7 */
 302                case 0x8003:    /* 7447A, Apollo 7 PM */
 303                case 0x8004:    /* 7448, Apollo 8 */
 304                case 0x800c:    /* 7410, Nitro */
 305                        maj = ((pvr >> 8) & 0xF);
 306                        min = PVR_MIN(pvr);
 307                        break;
 308                default:        /* e500/book-e */
 309                        maj = PVR_MAJ(pvr);
 310                        min = PVR_MIN(pvr);
 311                        break;
 312                }
 313        } else {
 314                switch (PVR_VER(pvr)) {
 315                        case 0x0020:    /* 403 family */
 316                                maj = PVR_MAJ(pvr) + 1;
 317                                min = PVR_MIN(pvr);
 318                                break;
 319                        case 0x1008:    /* 740P/750P ?? */
 320                                maj = ((pvr >> 8) & 0xFF) - 1;
 321                                min = pvr & 0xFF;
 322                                break;
 323                        case 0x004e: /* POWER9 bits 12-15 give chip type */
 324                        case 0x0080: /* POWER10 bit 12 gives SMT8/4 */
 325                                maj = (pvr >> 8) & 0x0F;
 326                                min = pvr & 0xFF;
 327                                break;
 328                        default:
 329                                maj = (pvr >> 8) & 0xFF;
 330                                min = pvr & 0xFF;
 331                                break;
 332                }
 333        }
 334
 335        seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
 336                   maj, min, PVR_VER(pvr), PVR_REV(pvr));
 337
 338#ifdef CONFIG_PPC32
 339        seq_printf(m, "bogomips\t: %lu.%02lu\n",
 340                   loops_per_jiffy / (500000/HZ),
 341                   (loops_per_jiffy / (5000/HZ)) % 100);
 342#endif
 343        seq_printf(m, "\n");
 344
 345        /* If this is the last cpu, print the summary */
 346        if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
 347                show_cpuinfo_summary(m);
 348
 349        return 0;
 350}
 351
 352static void *c_start(struct seq_file *m, loff_t *pos)
 353{
 354        if (*pos == 0)  /* just in case, cpu 0 is not the first */
 355                *pos = cpumask_first(cpu_online_mask);
 356        else
 357                *pos = cpumask_next(*pos - 1, cpu_online_mask);
 358        if ((*pos) < nr_cpu_ids)
 359                return (void *)(unsigned long)(*pos + 1);
 360        return NULL;
 361}
 362
 363static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 364{
 365        (*pos)++;
 366        return c_start(m, pos);
 367}
 368
 369static void c_stop(struct seq_file *m, void *v)
 370{
 371}
 372
 373const struct seq_operations cpuinfo_op = {
 374        .start  = c_start,
 375        .next   = c_next,
 376        .stop   = c_stop,
 377        .show   = show_cpuinfo,
 378};
 379
 380void __init check_for_initrd(void)
 381{
 382#ifdef CONFIG_BLK_DEV_INITRD
 383        DBG(" -> check_for_initrd()  initrd_start=0x%lx  initrd_end=0x%lx\n",
 384            initrd_start, initrd_end);
 385
 386        /* If we were passed an initrd, set the ROOT_DEV properly if the values
 387         * look sensible. If not, clear initrd reference.
 388         */
 389        if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
 390            initrd_end > initrd_start)
 391                ROOT_DEV = Root_RAM0;
 392        else
 393                initrd_start = initrd_end = 0;
 394
 395        if (initrd_start)
 396                pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
 397
 398        DBG(" <- check_for_initrd()\n");
 399#endif /* CONFIG_BLK_DEV_INITRD */
 400}
 401
 402#ifdef CONFIG_SMP
 403
 404int threads_per_core, threads_per_subcore, threads_shift __read_mostly;
 405cpumask_t threads_core_mask __read_mostly;
 406EXPORT_SYMBOL_GPL(threads_per_core);
 407EXPORT_SYMBOL_GPL(threads_per_subcore);
 408EXPORT_SYMBOL_GPL(threads_shift);
 409EXPORT_SYMBOL_GPL(threads_core_mask);
 410
 411static void __init cpu_init_thread_core_maps(int tpc)
 412{
 413        int i;
 414
 415        threads_per_core = tpc;
 416        threads_per_subcore = tpc;
 417        cpumask_clear(&threads_core_mask);
 418
 419        /* This implementation only supports power of 2 number of threads
 420         * for simplicity and performance
 421         */
 422        threads_shift = ilog2(tpc);
 423        BUG_ON(tpc != (1 << threads_shift));
 424
 425        for (i = 0; i < tpc; i++)
 426                cpumask_set_cpu(i, &threads_core_mask);
 427
 428        printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
 429               tpc, tpc > 1 ? "s" : "");
 430        printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
 431}
 432
 433
 434u32 *cpu_to_phys_id = NULL;
 435
 436/**
 437 * setup_cpu_maps - initialize the following cpu maps:
 438 *                  cpu_possible_mask
 439 *                  cpu_present_mask
 440 *
 441 * Having the possible map set up early allows us to restrict allocations
 442 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
 443 *
 444 * We do not initialize the online map here; cpus set their own bits in
 445 * cpu_online_mask as they come up.
 446 *
 447 * This function is valid only for Open Firmware systems.  finish_device_tree
 448 * must be called before using this.
 449 *
 450 * While we're here, we may as well set the "physical" cpu ids in the paca.
 451 *
 452 * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
 453 */
 454void __init smp_setup_cpu_maps(void)
 455{
 456        struct device_node *dn;
 457        int cpu = 0;
 458        int nthreads = 1;
 459
 460        DBG("smp_setup_cpu_maps()\n");
 461
 462        cpu_to_phys_id = __va(memblock_phys_alloc(nr_cpu_ids * sizeof(u32), __alignof__(u32)));
 463        memset(cpu_to_phys_id, 0, nr_cpu_ids * sizeof(u32));
 464
 465        for_each_node_by_type(dn, "cpu") {
 466                const __be32 *intserv;
 467                __be32 cpu_be;
 468                int j, len;
 469
 470                DBG("  * %pOF...\n", dn);
 471
 472                intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
 473                                &len);
 474                if (intserv) {
 475                        DBG("    ibm,ppc-interrupt-server#s -> %d threads\n",
 476                            nthreads);
 477                } else {
 478                        DBG("    no ibm,ppc-interrupt-server#s -> 1 thread\n");
 479                        intserv = of_get_property(dn, "reg", &len);
 480                        if (!intserv) {
 481                                cpu_be = cpu_to_be32(cpu);
 482                                /* XXX: what is this? uninitialized?? */
 483                                intserv = &cpu_be;      /* assume logical == phys */
 484                                len = 4;
 485                        }
 486                }
 487
 488                nthreads = len / sizeof(int);
 489
 490                for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
 491                        bool avail;
 492
 493                        DBG("    thread %d -> cpu %d (hard id %d)\n",
 494                            j, cpu, be32_to_cpu(intserv[j]));
 495
 496                        avail = of_device_is_available(dn);
 497                        if (!avail)
 498                                avail = !of_property_match_string(dn,
 499                                                "enable-method", "spin-table");
 500
 501                        set_cpu_present(cpu, avail);
 502                        set_cpu_possible(cpu, true);
 503                        cpu_to_phys_id[cpu] = be32_to_cpu(intserv[j]);
 504                        cpu++;
 505                }
 506
 507                if (cpu >= nr_cpu_ids) {
 508                        of_node_put(dn);
 509                        break;
 510                }
 511        }
 512
 513        /* If no SMT supported, nthreads is forced to 1 */
 514        if (!cpu_has_feature(CPU_FTR_SMT)) {
 515                DBG("  SMT disabled ! nthreads forced to 1\n");
 516                nthreads = 1;
 517        }
 518
 519#ifdef CONFIG_PPC64
 520        /*
 521         * On pSeries LPAR, we need to know how many cpus
 522         * could possibly be added to this partition.
 523         */
 524        if (firmware_has_feature(FW_FEATURE_LPAR) &&
 525            (dn = of_find_node_by_path("/rtas"))) {
 526                int num_addr_cell, num_size_cell, maxcpus;
 527                const __be32 *ireg;
 528
 529                num_addr_cell = of_n_addr_cells(dn);
 530                num_size_cell = of_n_size_cells(dn);
 531
 532                ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
 533
 534                if (!ireg)
 535                        goto out;
 536
 537                maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
 538
 539                /* Double maxcpus for processors which have SMT capability */
 540                if (cpu_has_feature(CPU_FTR_SMT))
 541                        maxcpus *= nthreads;
 542
 543                if (maxcpus > nr_cpu_ids) {
 544                        printk(KERN_WARNING
 545                               "Partition configured for %d cpus, "
 546                               "operating system maximum is %u.\n",
 547                               maxcpus, nr_cpu_ids);
 548                        maxcpus = nr_cpu_ids;
 549                } else
 550                        printk(KERN_INFO "Partition configured for %d cpus.\n",
 551                               maxcpus);
 552
 553                for (cpu = 0; cpu < maxcpus; cpu++)
 554                        set_cpu_possible(cpu, true);
 555        out:
 556                of_node_put(dn);
 557        }
 558        vdso_data->processorCount = num_present_cpus();
 559#endif /* CONFIG_PPC64 */
 560
 561        /* Initialize CPU <=> thread mapping/
 562         *
 563         * WARNING: We assume that the number of threads is the same for
 564         * every CPU in the system. If that is not the case, then some code
 565         * here will have to be reworked
 566         */
 567        cpu_init_thread_core_maps(nthreads);
 568
 569        /* Now that possible cpus are set, set nr_cpu_ids for later use */
 570        setup_nr_cpu_ids();
 571
 572        free_unused_pacas();
 573}
 574#endif /* CONFIG_SMP */
 575
 576#ifdef CONFIG_PCSPKR_PLATFORM
 577static __init int add_pcspkr(void)
 578{
 579        struct device_node *np;
 580        struct platform_device *pd;
 581        int ret;
 582
 583        np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
 584        of_node_put(np);
 585        if (!np)
 586                return -ENODEV;
 587
 588        pd = platform_device_alloc("pcspkr", -1);
 589        if (!pd)
 590                return -ENOMEM;
 591
 592        ret = platform_device_add(pd);
 593        if (ret)
 594                platform_device_put(pd);
 595
 596        return ret;
 597}
 598device_initcall(add_pcspkr);
 599#endif  /* CONFIG_PCSPKR_PLATFORM */
 600
 601void probe_machine(void)
 602{
 603        extern struct machdep_calls __machine_desc_start;
 604        extern struct machdep_calls __machine_desc_end;
 605        unsigned int i;
 606
 607        /*
 608         * Iterate all ppc_md structures until we find the proper
 609         * one for the current machine type
 610         */
 611        DBG("Probing machine type ...\n");
 612
 613        /*
 614         * Check ppc_md is empty, if not we have a bug, ie, we setup an
 615         * entry before probe_machine() which will be overwritten
 616         */
 617        for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
 618                if (((void **)&ppc_md)[i]) {
 619                        printk(KERN_ERR "Entry %d in ppc_md non empty before"
 620                               " machine probe !\n", i);
 621                }
 622        }
 623
 624        for (machine_id = &__machine_desc_start;
 625             machine_id < &__machine_desc_end;
 626             machine_id++) {
 627                DBG("  %s ...", machine_id->name);
 628                memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
 629                if (ppc_md.probe()) {
 630                        DBG(" match !\n");
 631                        break;
 632                }
 633                DBG("\n");
 634        }
 635        /* What can we do if we didn't find ? */
 636        if (machine_id >= &__machine_desc_end) {
 637                DBG("No suitable machine found !\n");
 638                for (;;);
 639        }
 640
 641        printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
 642}
 643
 644/* Match a class of boards, not a specific device configuration. */
 645int check_legacy_ioport(unsigned long base_port)
 646{
 647        struct device_node *parent, *np = NULL;
 648        int ret = -ENODEV;
 649
 650        switch(base_port) {
 651        case I8042_DATA_REG:
 652                if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
 653                        np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
 654                if (np) {
 655                        parent = of_get_parent(np);
 656
 657                        of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
 658                        if (!of_i8042_kbd_irq)
 659                                of_i8042_kbd_irq = 1;
 660
 661                        of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
 662                        if (!of_i8042_aux_irq)
 663                                of_i8042_aux_irq = 12;
 664
 665                        of_node_put(np);
 666                        np = parent;
 667                        break;
 668                }
 669                np = of_find_node_by_type(NULL, "8042");
 670                /* Pegasos has no device_type on its 8042 node, look for the
 671                 * name instead */
 672                if (!np)
 673                        np = of_find_node_by_name(NULL, "8042");
 674                if (np) {
 675                        of_i8042_kbd_irq = 1;
 676                        of_i8042_aux_irq = 12;
 677                }
 678                break;
 679        case FDC_BASE: /* FDC1 */
 680                np = of_find_node_by_type(NULL, "fdc");
 681                break;
 682        default:
 683                /* ipmi is supposed to fail here */
 684                break;
 685        }
 686        if (!np)
 687                return ret;
 688        parent = of_get_parent(np);
 689        if (parent) {
 690                if (strcmp(parent->type, "isa") == 0)
 691                        ret = 0;
 692                of_node_put(parent);
 693        }
 694        of_node_put(np);
 695        return ret;
 696}
 697EXPORT_SYMBOL(check_legacy_ioport);
 698
 699static int ppc_panic_event(struct notifier_block *this,
 700                             unsigned long event, void *ptr)
 701{
 702        /*
 703         * panic does a local_irq_disable, but we really
 704         * want interrupts to be hard disabled.
 705         */
 706        hard_irq_disable();
 707
 708        /*
 709         * If firmware-assisted dump has been registered then trigger
 710         * firmware-assisted dump and let firmware handle everything else.
 711         */
 712        crash_fadump(NULL, ptr);
 713        if (ppc_md.panic)
 714                ppc_md.panic(ptr);  /* May not return */
 715        return NOTIFY_DONE;
 716}
 717
 718static struct notifier_block ppc_panic_block = {
 719        .notifier_call = ppc_panic_event,
 720        .priority = INT_MIN /* may not return; must be done last */
 721};
 722
 723void __init setup_panic(void)
 724{
 725        /* PPC64 always does a hard irq disable in its panic handler */
 726        if (!IS_ENABLED(CONFIG_PPC64) && !ppc_md.panic)
 727                return;
 728        atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
 729}
 730
 731#ifdef CONFIG_CHECK_CACHE_COHERENCY
 732/*
 733 * For platforms that have configurable cache-coherency.  This function
 734 * checks that the cache coherency setting of the kernel matches the setting
 735 * left by the firmware, as indicated in the device tree.  Since a mismatch
 736 * will eventually result in DMA failures, we print * and error and call
 737 * BUG() in that case.
 738 */
 739
 740#ifdef CONFIG_NOT_COHERENT_CACHE
 741#define KERNEL_COHERENCY        0
 742#else
 743#define KERNEL_COHERENCY        1
 744#endif
 745
 746static int __init check_cache_coherency(void)
 747{
 748        struct device_node *np;
 749        const void *prop;
 750        int devtree_coherency;
 751
 752        np = of_find_node_by_path("/");
 753        prop = of_get_property(np, "coherency-off", NULL);
 754        of_node_put(np);
 755
 756        devtree_coherency = prop ? 0 : 1;
 757
 758        if (devtree_coherency != KERNEL_COHERENCY) {
 759                printk(KERN_ERR
 760                        "kernel coherency:%s != device tree_coherency:%s\n",
 761                        KERNEL_COHERENCY ? "on" : "off",
 762                        devtree_coherency ? "on" : "off");
 763                BUG();
 764        }
 765
 766        return 0;
 767}
 768
 769late_initcall(check_cache_coherency);
 770#endif /* CONFIG_CHECK_CACHE_COHERENCY */
 771
 772#ifdef CONFIG_DEBUG_FS
 773struct dentry *powerpc_debugfs_root;
 774EXPORT_SYMBOL(powerpc_debugfs_root);
 775
 776static int powerpc_debugfs_init(void)
 777{
 778        powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
 779
 780        return powerpc_debugfs_root == NULL;
 781}
 782arch_initcall(powerpc_debugfs_init);
 783#endif
 784
 785void ppc_printk_progress(char *s, unsigned short hex)
 786{
 787        pr_info("%s\n", s);
 788}
 789
 790void arch_setup_pdev_archdata(struct platform_device *pdev)
 791{
 792        pdev->archdata.dma_mask = DMA_BIT_MASK(32);
 793        pdev->dev.dma_mask = &pdev->archdata.dma_mask;
 794}
 795
 796static __init void print_system_info(void)
 797{
 798        pr_info("-----------------------------------------------------\n");
 799#ifdef CONFIG_PPC_BOOK3S_64
 800        pr_info("ppc64_pft_size    = 0x%llx\n", ppc64_pft_size);
 801#endif
 802#ifdef CONFIG_PPC_BOOK3S_32
 803        pr_info("Hash_size         = 0x%lx\n", Hash_size);
 804#endif
 805        pr_info("phys_mem_size     = 0x%llx\n",
 806                (unsigned long long)memblock_phys_mem_size());
 807
 808        pr_info("dcache_bsize      = 0x%x\n", dcache_bsize);
 809        pr_info("icache_bsize      = 0x%x\n", icache_bsize);
 810        if (ucache_bsize != 0)
 811                pr_info("ucache_bsize      = 0x%x\n", ucache_bsize);
 812
 813        pr_info("cpu_features      = 0x%016lx\n", cur_cpu_spec->cpu_features);
 814        pr_info("  possible        = 0x%016lx\n",
 815                (unsigned long)CPU_FTRS_POSSIBLE);
 816        pr_info("  always          = 0x%016lx\n",
 817                (unsigned long)CPU_FTRS_ALWAYS);
 818        pr_info("cpu_user_features = 0x%08x 0x%08x\n",
 819                cur_cpu_spec->cpu_user_features,
 820                cur_cpu_spec->cpu_user_features2);
 821        pr_info("mmu_features      = 0x%08x\n", cur_cpu_spec->mmu_features);
 822#ifdef CONFIG_PPC64
 823        pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
 824#endif
 825
 826#ifdef CONFIG_PPC_BOOK3S_64
 827        if (htab_address)
 828                pr_info("htab_address      = 0x%p\n", htab_address);
 829        if (htab_hash_mask)
 830                pr_info("htab_hash_mask    = 0x%lx\n", htab_hash_mask);
 831#endif
 832#ifdef CONFIG_PPC_BOOK3S_32
 833        if (Hash)
 834                pr_info("Hash              = 0x%p\n", Hash);
 835        if (Hash_mask)
 836                pr_info("Hash_mask         = 0x%lx\n", Hash_mask);
 837#endif
 838
 839        if (PHYSICAL_START > 0)
 840                pr_info("physical_start    = 0x%llx\n",
 841                       (unsigned long long)PHYSICAL_START);
 842        pr_info("-----------------------------------------------------\n");
 843}
 844
 845#ifdef CONFIG_SMP
 846static void smp_setup_pacas(void)
 847{
 848        int cpu;
 849
 850        for_each_possible_cpu(cpu) {
 851                if (cpu == smp_processor_id())
 852                        continue;
 853                allocate_paca(cpu);
 854                set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]);
 855        }
 856
 857        memblock_free(__pa(cpu_to_phys_id), nr_cpu_ids * sizeof(u32));
 858        cpu_to_phys_id = NULL;
 859}
 860#endif
 861
 862/*
 863 * Called into from start_kernel this initializes memblock, which is used
 864 * to manage page allocation until mem_init is called.
 865 */
 866void __init setup_arch(char **cmdline_p)
 867{
 868        *cmdline_p = boot_command_line;
 869
 870        /* Set a half-reasonable default so udelay does something sensible */
 871        loops_per_jiffy = 500000000 / HZ;
 872
 873        /* Unflatten the device-tree passed by prom_init or kexec */
 874        unflatten_device_tree();
 875
 876        /*
 877         * Initialize cache line/block info from device-tree (on ppc64) or
 878         * just cputable (on ppc32).
 879         */
 880        initialize_cache_info();
 881
 882        /*
 883         * Lock down the kernel if booted in secure mode. This is required to
 884         * maintain kernel integrity.
 885         */
 886        init_lockdown();
 887
 888        /* Initialize RTAS if available. */
 889        rtas_initialize();
 890
 891        /* Check if we have an initrd provided via the device-tree. */
 892        check_for_initrd();
 893
 894        /* Probe the machine type, establish ppc_md. */
 895        probe_machine();
 896
 897        /* Setup panic notifier if requested by the platform. */
 898        setup_panic();
 899
 900        /*
 901         * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
 902         * it from their respective probe() function.
 903         */
 904        setup_power_save();
 905
 906        /* Discover standard serial ports. */
 907        find_legacy_serial_ports();
 908
 909        /* Register early console with the printk subsystem. */
 910        register_early_udbg_console();
 911
 912        /* Setup the various CPU maps based on the device-tree. */
 913        smp_setup_cpu_maps();
 914
 915        /* Initialize xmon. */
 916        xmon_setup();
 917
 918        /* Check the SMT related command line arguments (ppc64). */
 919        check_smt_enabled();
 920
 921        /* Parse memory topology */
 922        mem_topology_setup();
 923
 924        /*
 925         * Release secondary cpus out of their spinloops at 0x60 now that
 926         * we can map physical -> logical CPU ids.
 927         *
 928         * Freescale Book3e parts spin in a loop provided by firmware,
 929         * so smp_release_cpus() does nothing for them.
 930         */
 931#ifdef CONFIG_SMP
 932        smp_setup_pacas();
 933
 934        /* On BookE, setup per-core TLB data structures. */
 935        setup_tlb_core_data();
 936#endif
 937
 938        /* Print various info about the machine that has been gathered so far. */
 939        print_system_info();
 940
 941        /* Reserve large chunks of memory for use by CMA for KVM. */
 942        kvm_cma_reserve();
 943
 944        klp_init_thread_info(&init_thread_info);
 945
 946        init_mm.start_code = (unsigned long)_stext;
 947        init_mm.end_code = (unsigned long) _etext;
 948        init_mm.end_data = (unsigned long) _edata;
 949        init_mm.brk = klimit;
 950
 951#ifdef CONFIG_PPC_MM_SLICES
 952#ifdef CONFIG_PPC64
 953        if (!radix_enabled())
 954                init_mm.context.slb_addr_limit = DEFAULT_MAP_WINDOW_USER64;
 955#elif defined(CONFIG_PPC_8xx)
 956        init_mm.context.slb_addr_limit = DEFAULT_MAP_WINDOW;
 957#else
 958#error  "context.addr_limit not initialized."
 959#endif
 960#endif
 961
 962#ifdef CONFIG_SPAPR_TCE_IOMMU
 963        mm_iommu_init(&init_mm);
 964#endif
 965        irqstack_early_init();
 966        exc_lvl_early_init();
 967        emergency_stack_init();
 968
 969        mce_init();
 970        smp_release_cpus();
 971
 972        initmem_init();
 973
 974        early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
 975
 976#ifdef CONFIG_DUMMY_CONSOLE
 977        conswitchp = &dummy_con;
 978#endif
 979        if (ppc_md.setup_arch)
 980                ppc_md.setup_arch();
 981
 982        setup_barrier_nospec();
 983
 984        paging_init();
 985
 986        /* Initialize the MMU context management stuff. */
 987        mmu_context_init();
 988
 989#ifdef CONFIG_PPC64
 990        /* Interrupt code needs to be 64K-aligned. */
 991        if ((unsigned long)_stext & 0xffff)
 992                panic("Kernelbase not 64K-aligned (0x%lx)!\n",
 993                      (unsigned long)_stext);
 994#endif
 995}
 996