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8#ifndef _ASM_S390_IPL_H
9#define _ASM_S390_IPL_H
10
11#include <asm/lowcore.h>
12#include <asm/types.h>
13#include <asm/cio.h>
14#include <asm/setup.h>
15#include <uapi/asm/ipl.h>
16
17struct ipl_parameter_block {
18 struct ipl_pl_hdr hdr;
19 union {
20 struct ipl_pb_hdr pb0_hdr;
21 struct ipl_pb0_common common;
22 struct ipl_pb0_fcp fcp;
23 struct ipl_pb0_ccw ccw;
24 struct ipl_pb0_nvme nvme;
25 char raw[PAGE_SIZE - sizeof(struct ipl_pl_hdr)];
26 };
27} __packed __aligned(PAGE_SIZE);
28
29#define NSS_NAME_SIZE 8
30
31#define IPL_BP_FCP_LEN (sizeof(struct ipl_pl_hdr) + \
32 sizeof(struct ipl_pb0_fcp))
33#define IPL_BP0_FCP_LEN (sizeof(struct ipl_pb0_fcp))
34
35#define IPL_BP_NVME_LEN (sizeof(struct ipl_pl_hdr) + \
36 sizeof(struct ipl_pb0_nvme))
37#define IPL_BP0_NVME_LEN (sizeof(struct ipl_pb0_nvme))
38
39#define IPL_BP_CCW_LEN (sizeof(struct ipl_pl_hdr) + \
40 sizeof(struct ipl_pb0_ccw))
41#define IPL_BP0_CCW_LEN (sizeof(struct ipl_pb0_ccw))
42
43#define IPL_MAX_SUPPORTED_VERSION (0)
44
45#define IPL_RB_CERT_UNKNOWN ((unsigned short)-1)
46
47#define DIAG308_VMPARM_SIZE (64)
48#define DIAG308_SCPDATA_OFFSET offsetof(struct ipl_parameter_block, \
49 fcp.scp_data)
50#define DIAG308_SCPDATA_SIZE (PAGE_SIZE - DIAG308_SCPDATA_OFFSET)
51
52struct save_area;
53struct save_area * __init save_area_alloc(bool is_boot_cpu);
54struct save_area * __init save_area_boot_cpu(void);
55void __init save_area_add_regs(struct save_area *, void *regs);
56void __init save_area_add_vxrs(struct save_area *, __vector128 *vxrs);
57
58extern void s390_reset_system(void);
59extern size_t ipl_block_get_ascii_vmparm(char *dest, size_t size,
60 const struct ipl_parameter_block *ipb);
61
62enum ipl_type {
63 IPL_TYPE_UNKNOWN = 1,
64 IPL_TYPE_CCW = 2,
65 IPL_TYPE_FCP = 4,
66 IPL_TYPE_FCP_DUMP = 8,
67 IPL_TYPE_NSS = 16,
68 IPL_TYPE_NVME = 32,
69 IPL_TYPE_NVME_DUMP = 64,
70};
71
72struct ipl_info
73{
74 enum ipl_type type;
75 union {
76 struct {
77 struct ccw_dev_id dev_id;
78 } ccw;
79 struct {
80 struct ccw_dev_id dev_id;
81 u64 wwpn;
82 u64 lun;
83 } fcp;
84 struct {
85 u32 fid;
86 u32 nsid;
87 } nvme;
88 struct {
89 char name[NSS_NAME_SIZE + 1];
90 } nss;
91 } data;
92};
93
94extern struct ipl_info ipl_info;
95extern void setup_ipl(void);
96extern void set_os_info_reipl_block(void);
97
98static inline bool is_ipl_type_dump(void)
99{
100 return (ipl_info.type == IPL_TYPE_FCP_DUMP) ||
101 (ipl_info.type == IPL_TYPE_NVME_DUMP);
102}
103
104struct ipl_report {
105 struct ipl_parameter_block *ipib;
106 struct list_head components;
107 struct list_head certificates;
108 size_t size;
109};
110
111struct ipl_report_component {
112 struct list_head list;
113 struct ipl_rb_component_entry entry;
114};
115
116struct ipl_report_certificate {
117 struct list_head list;
118 struct ipl_rb_certificate_entry entry;
119 void *key;
120};
121
122struct kexec_buf;
123struct ipl_report *ipl_report_init(struct ipl_parameter_block *ipib);
124void *ipl_report_finish(struct ipl_report *report);
125int ipl_report_free(struct ipl_report *report);
126int ipl_report_add_component(struct ipl_report *report, struct kexec_buf *kbuf,
127 unsigned char flags, unsigned short cert);
128int ipl_report_add_certificate(struct ipl_report *report, void *key,
129 unsigned long addr, unsigned long len);
130bool ipl_get_secureboot(void);
131
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133
134
135enum diag308_subcode {
136 DIAG308_REL_HSA = 2,
137 DIAG308_LOAD_CLEAR = 3,
138 DIAG308_LOAD_NORMAL_DUMP = 4,
139 DIAG308_SET = 5,
140 DIAG308_STORE = 6,
141 DIAG308_LOAD_NORMAL = 7,
142};
143
144enum diag308_rc {
145 DIAG308_RC_OK = 0x0001,
146 DIAG308_RC_NOCONFIG = 0x0102,
147};
148
149extern int diag308(unsigned long subcode, void *addr);
150extern void store_status(void (*fn)(void *), void *data);
151extern void lgr_info_log(void);
152
153#endif
154
