linux/arch/s390/lib/xor.c
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   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Optimized xor_block operation for RAID4/5
   4 *
   5 * Copyright IBM Corp. 2016
   6 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
   7 */
   8
   9#include <linux/types.h>
  10#include <linux/export.h>
  11#include <linux/raid/xor.h>
  12
  13static void xor_xc_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
  14{
  15        asm volatile(
  16                "       larl    1,2f\n"
  17                "       aghi    %0,-1\n"
  18                "       jm      3f\n"
  19                "       srlg    0,%0,8\n"
  20                "       ltgr    0,0\n"
  21                "       jz      1f\n"
  22                "0:     xc      0(256,%1),0(%2)\n"
  23                "       la      %1,256(%1)\n"
  24                "       la      %2,256(%2)\n"
  25                "       brctg   0,0b\n"
  26                "1:     ex      %0,0(1)\n"
  27                "       j       3f\n"
  28                "2:     xc      0(1,%1),0(%2)\n"
  29                "3:\n"
  30                : : "d" (bytes), "a" (p1), "a" (p2)
  31                : "0", "1", "cc", "memory");
  32}
  33
  34static void xor_xc_3(unsigned long bytes, unsigned long *p1, unsigned long *p2,
  35                     unsigned long *p3)
  36{
  37        asm volatile(
  38                "       larl    1,2f\n"
  39                "       aghi    %0,-1\n"
  40                "       jm      3f\n"
  41                "       srlg    0,%0,8\n"
  42                "       ltgr    0,0\n"
  43                "       jz      1f\n"
  44                "0:     xc      0(256,%1),0(%2)\n"
  45                "       xc      0(256,%1),0(%3)\n"
  46                "       la      %1,256(%1)\n"
  47                "       la      %2,256(%2)\n"
  48                "       la      %3,256(%3)\n"
  49                "       brctg   0,0b\n"
  50                "1:     ex      %0,0(1)\n"
  51                "       ex      %0,6(1)\n"
  52                "       j       3f\n"
  53                "2:     xc      0(1,%1),0(%2)\n"
  54                "       xc      0(1,%1),0(%3)\n"
  55                "3:\n"
  56                : "+d" (bytes), "+a" (p1), "+a" (p2), "+a" (p3)
  57                : : "0", "1", "cc", "memory");
  58}
  59
  60static void xor_xc_4(unsigned long bytes, unsigned long *p1, unsigned long *p2,
  61                     unsigned long *p3, unsigned long *p4)
  62{
  63        asm volatile(
  64                "       larl    1,2f\n"
  65                "       aghi    %0,-1\n"
  66                "       jm      3f\n"
  67                "       srlg    0,%0,8\n"
  68                "       ltgr    0,0\n"
  69                "       jz      1f\n"
  70                "0:     xc      0(256,%1),0(%2)\n"
  71                "       xc      0(256,%1),0(%3)\n"
  72                "       xc      0(256,%1),0(%4)\n"
  73                "       la      %1,256(%1)\n"
  74                "       la      %2,256(%2)\n"
  75                "       la      %3,256(%3)\n"
  76                "       la      %4,256(%4)\n"
  77                "       brctg   0,0b\n"
  78                "1:     ex      %0,0(1)\n"
  79                "       ex      %0,6(1)\n"
  80                "       ex      %0,12(1)\n"
  81                "       j       3f\n"
  82                "2:     xc      0(1,%1),0(%2)\n"
  83                "       xc      0(1,%1),0(%3)\n"
  84                "       xc      0(1,%1),0(%4)\n"
  85                "3:\n"
  86                : "+d" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4)
  87                : : "0", "1", "cc", "memory");
  88}
  89
  90static void xor_xc_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
  91                     unsigned long *p3, unsigned long *p4, unsigned long *p5)
  92{
  93        /* Get around a gcc oddity */
  94        register unsigned long *reg7 asm ("7") = p5;
  95
  96        asm volatile(
  97                "       larl    1,2f\n"
  98                "       aghi    %0,-1\n"
  99                "       jm      3f\n"
 100                "       srlg    0,%0,8\n"
 101                "       ltgr    0,0\n"
 102                "       jz      1f\n"
 103                "0:     xc      0(256,%1),0(%2)\n"
 104                "       xc      0(256,%1),0(%3)\n"
 105                "       xc      0(256,%1),0(%4)\n"
 106                "       xc      0(256,%1),0(%5)\n"
 107                "       la      %1,256(%1)\n"
 108                "       la      %2,256(%2)\n"
 109                "       la      %3,256(%3)\n"
 110                "       la      %4,256(%4)\n"
 111                "       la      %5,256(%5)\n"
 112                "       brctg   0,0b\n"
 113                "1:     ex      %0,0(1)\n"
 114                "       ex      %0,6(1)\n"
 115                "       ex      %0,12(1)\n"
 116                "       ex      %0,18(1)\n"
 117                "       j       3f\n"
 118                "2:     xc      0(1,%1),0(%2)\n"
 119                "       xc      0(1,%1),0(%3)\n"
 120                "       xc      0(1,%1),0(%4)\n"
 121                "       xc      0(1,%1),0(%5)\n"
 122                "3:\n"
 123                : "+d" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4),
 124                  "+a" (reg7)
 125                : : "0", "1", "cc", "memory");
 126}
 127
 128struct xor_block_template xor_block_xc = {
 129        .name = "xc",
 130        .do_2 = xor_xc_2,
 131        .do_3 = xor_xc_3,
 132        .do_4 = xor_xc_4,
 133        .do_5 = xor_xc_5,
 134};
 135EXPORT_SYMBOL(xor_block_xc);
 136