LXR linux/drivers/dma/sh/shdma.h

   1/*
   2 * Renesas SuperH DMA Engine support
   3 *
   4 * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
   5 * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
   6 *
   7 * This is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License as published by
   9 * the Free Software Foundation; either version 2 of the License, or
  10 * (at your option) any later version.
  11 *
  12 */
  13#ifndef __DMA_SHDMA_H
  14#define __DMA_SHDMA_H
  15
  16#include <linux/sh_dma.h>
  17#include <linux/shdma-base.h>
  18#include <linux/dmaengine.h>
  19#include <linux/interrupt.h>
  20#include <linux/list.h>
  21
  22#define SH_DMAE_MAX_CHANNELS 20
  23#define SH_DMAE_TCR_MAX 0x00FFFFFF      /* 16MB */
  24
  25struct device;
  26
  27struct sh_dmae_chan {
  28        struct shdma_chan shdma_chan;
  29        const struct sh_dmae_slave_config *config; /* Slave DMA configuration */
  30        int xmit_shift;                 /* log_2(bytes_per_xfer) */
  31        void __iomem *base;
  32        char dev_id[16];                /* unique name per DMAC of channel */
  33        int pm_error;
  34        dma_addr_t slave_addr;
  35};
  36
  37struct sh_dmae_device {
  38        struct shdma_dev shdma_dev;
  39        struct sh_dmae_chan *chan[SH_DMAE_MAX_CHANNELS];
  40        const struct sh_dmae_pdata *pdata;
  41        struct list_head node;
  42        void __iomem *chan_reg;
  43        void __iomem *dmars;
  44        unsigned int chcr_offset;
  45        u32 chcr_ie_bit;
  46};
  47
  48struct sh_dmae_regs {
  49        u32 sar; /* SAR / source address */
  50        u32 dar; /* DAR / destination address */
  51        u32 tcr; /* TCR / transfer count */
  52};
  53
  54struct sh_dmae_desc {
  55        struct sh_dmae_regs hw;
  56        struct shdma_desc shdma_desc;
  57};
  58
  59#define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, shdma_chan)
  60#define to_sh_desc(lh) container_of(lh, struct sh_desc, node)
  61#define tx_to_sh_desc(tx) container_of(tx, struct sh_desc, async_tx)
  62#define to_sh_dev(chan) container_of(chan->shdma_chan.dma_chan.device,\
  63                                     struct sh_dmae_device, shdma_dev.dma_dev)
  64
  65#ifdef CONFIG_SH_DMAE_R8A73A4
  66extern const struct sh_dmae_pdata r8a73a4_dma_pdata;
  67#define r8a73a4_shdma_devid (&r8a73a4_dma_pdata)
  68#else
  69#define r8a73a4_shdma_devid NULL
  70#endif
  71
  72#endif  /* __DMA_SHDMA_H */
  73