1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46#include <linux/firmware.h>
47#include <linux/module.h>
48#include <drm/drm.h>
49
50#include "amdgpu.h"
51#include "amdgpu_amdkfd.h"
52
53
54
55
56
57
58
59
60
61
62
63static bool amdgpu_mn_invalidate_gfx(struct mmu_interval_notifier *mni,
64 const struct mmu_notifier_range *range,
65 unsigned long cur_seq)
66{
67 struct amdgpu_bo *bo = container_of(mni, struct amdgpu_bo, notifier);
68 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
69 long r;
70
71 if (!mmu_notifier_range_blockable(range))
72 return false;
73
74 mutex_lock(&adev->notifier_lock);
75
76 mmu_interval_set_seq(mni, cur_seq);
77
78 r = dma_resv_wait_timeout(bo->tbo.base.resv, true, false,
79 MAX_SCHEDULE_TIMEOUT);
80 mutex_unlock(&adev->notifier_lock);
81 if (r <= 0)
82 DRM_ERROR("(%ld) failed to wait for user bo\n", r);
83 return true;
84}
85
86static const struct mmu_interval_notifier_ops amdgpu_mn_gfx_ops = {
87 .invalidate = amdgpu_mn_invalidate_gfx,
88};
89
90
91
92
93
94
95
96
97
98
99
100static bool amdgpu_mn_invalidate_hsa(struct mmu_interval_notifier *mni,
101 const struct mmu_notifier_range *range,
102 unsigned long cur_seq)
103{
104 struct amdgpu_bo *bo = container_of(mni, struct amdgpu_bo, notifier);
105 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
106
107 if (!mmu_notifier_range_blockable(range))
108 return false;
109
110 mutex_lock(&adev->notifier_lock);
111
112 mmu_interval_set_seq(mni, cur_seq);
113
114 amdgpu_amdkfd_evict_userptr(bo->kfd_bo, bo->notifier.mm);
115 mutex_unlock(&adev->notifier_lock);
116
117 return true;
118}
119
120static const struct mmu_interval_notifier_ops amdgpu_mn_hsa_ops = {
121 .invalidate = amdgpu_mn_invalidate_hsa,
122};
123
124
125
126
127
128
129
130
131
132
133int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
134{
135 if (bo->kfd_bo)
136 return mmu_interval_notifier_insert(&bo->notifier, current->mm,
137 addr, amdgpu_bo_size(bo),
138 &amdgpu_mn_hsa_ops);
139 return mmu_interval_notifier_insert(&bo->notifier, current->mm, addr,
140 amdgpu_bo_size(bo),
141 &amdgpu_mn_gfx_ops);
142}
143
144
145
146
147
148
149
150
151void amdgpu_mn_unregister(struct amdgpu_bo *bo)
152{
153 if (!bo->notifier.mm)
154 return;
155 mmu_interval_notifier_remove(&bo->notifier);
156 bo->notifier.mm = NULL;
157}
158
159int amdgpu_hmm_range_get_pages(struct mmu_interval_notifier *notifier,
160 struct mm_struct *mm, struct page **pages,
161 uint64_t start, uint64_t npages,
162 struct hmm_range **phmm_range, bool readonly,
163 bool mmap_locked, void *owner)
164{
165 struct hmm_range *hmm_range;
166 unsigned long timeout;
167 unsigned long i;
168 unsigned long *pfns;
169 int r = 0;
170
171 hmm_range = kzalloc(sizeof(*hmm_range), GFP_KERNEL);
172 if (unlikely(!hmm_range))
173 return -ENOMEM;
174
175 pfns = kvmalloc_array(npages, sizeof(*pfns), GFP_KERNEL);
176 if (unlikely(!pfns)) {
177 r = -ENOMEM;
178 goto out_free_range;
179 }
180
181 hmm_range->notifier = notifier;
182 hmm_range->default_flags = HMM_PFN_REQ_FAULT;
183 if (!readonly)
184 hmm_range->default_flags |= HMM_PFN_REQ_WRITE;
185 hmm_range->hmm_pfns = pfns;
186 hmm_range->start = start;
187 hmm_range->end = start + npages * PAGE_SIZE;
188 hmm_range->dev_private_owner = owner;
189
190
191 timeout = max(npages >> 17, 1ULL) * HMM_RANGE_DEFAULT_TIMEOUT;
192 timeout = jiffies + msecs_to_jiffies(timeout);
193
194retry:
195 hmm_range->notifier_seq = mmu_interval_read_begin(notifier);
196
197 if (likely(!mmap_locked))
198 mmap_read_lock(mm);
199
200 r = hmm_range_fault(hmm_range);
201
202 if (likely(!mmap_locked))
203 mmap_read_unlock(mm);
204 if (unlikely(r)) {
205
206
207
208
209 if (r == -EBUSY && !time_after(jiffies, timeout))
210 goto retry;
211 goto out_free_pfns;
212 }
213
214
215
216
217
218
219 for (i = 0; pages && i < npages; i++)
220 pages[i] = hmm_pfn_to_page(pfns[i]);
221
222 *phmm_range = hmm_range;
223
224 return 0;
225
226out_free_pfns:
227 kvfree(pfns);
228out_free_range:
229 kfree(hmm_range);
230
231 return r;
232}
233
234int amdgpu_hmm_range_get_pages_done(struct hmm_range *hmm_range)
235{
236 int r;
237
238 r = mmu_interval_read_retry(hmm_range->notifier,
239 hmm_range->notifier_seq);
240 kvfree(hmm_range->hmm_pfns);
241 kfree(hmm_range);
242
243 return r;
244}
245