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33#include <linux/delay.h>
34#include <linux/mman.h>
35#include <linux/pci.h>
36
37#include <drm/drm_device.h>
38#include <drm/drm_drv.h>
39#include <drm/drm_file.h>
40#include <drm/drm_ioctl.h>
41#include <drm/drm_irq.h>
42#include <drm/drm_print.h>
43#include <drm/i810_drm.h>
44
45#include "i810_drv.h"
46
47#define I810_BUF_FREE 2
48#define I810_BUF_CLIENT 1
49#define I810_BUF_HARDWARE 0
50
51#define I810_BUF_UNMAPPED 0
52#define I810_BUF_MAPPED 1
53
54static struct drm_buf *i810_freelist_get(struct drm_device * dev)
55{
56 struct drm_device_dma *dma = dev->dma;
57 int i;
58 int used;
59
60
61
62 for (i = 0; i < dma->buf_count; i++) {
63 struct drm_buf *buf = dma->buflist[i];
64 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
65
66 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
67 I810_BUF_CLIENT);
68 if (used == I810_BUF_FREE)
69 return buf;
70 }
71 return NULL;
72}
73
74
75
76
77
78static int i810_freelist_put(struct drm_device *dev, struct drm_buf *buf)
79{
80 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
81 int used;
82
83
84 used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
85 if (used != I810_BUF_CLIENT) {
86 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
87 return -EINVAL;
88 }
89
90 return 0;
91}
92
93static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
94{
95 struct drm_file *priv = filp->private_data;
96 struct drm_device *dev;
97 drm_i810_private_t *dev_priv;
98 struct drm_buf *buf;
99 drm_i810_buf_priv_t *buf_priv;
100
101 dev = priv->minor->dev;
102 dev_priv = dev->dev_private;
103 buf = dev_priv->mmap_buffer;
104 buf_priv = buf->dev_private;
105
106 vma->vm_flags |= VM_DONTCOPY;
107
108 buf_priv->currently_mapped = I810_BUF_MAPPED;
109
110 if (io_remap_pfn_range(vma, vma->vm_start,
111 vma->vm_pgoff,
112 vma->vm_end - vma->vm_start, vma->vm_page_prot))
113 return -EAGAIN;
114 return 0;
115}
116
117static const struct file_operations i810_buffer_fops = {
118 .open = drm_open,
119 .release = drm_release,
120 .unlocked_ioctl = drm_ioctl,
121 .mmap = i810_mmap_buffers,
122 .compat_ioctl = drm_compat_ioctl,
123 .llseek = noop_llseek,
124};
125
126static int i810_map_buffer(struct drm_buf *buf, struct drm_file *file_priv)
127{
128 struct drm_device *dev = file_priv->minor->dev;
129 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
130 drm_i810_private_t *dev_priv = dev->dev_private;
131 const struct file_operations *old_fops;
132 int retcode = 0;
133
134 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
135 return -EINVAL;
136
137
138 old_fops = file_priv->filp->f_op;
139 file_priv->filp->f_op = &i810_buffer_fops;
140 dev_priv->mmap_buffer = buf;
141 buf_priv->virtual = (void *)vm_mmap(file_priv->filp, 0, buf->total,
142 PROT_READ | PROT_WRITE,
143 MAP_SHARED, buf->bus_address);
144 dev_priv->mmap_buffer = NULL;
145 file_priv->filp->f_op = old_fops;
146 if (IS_ERR(buf_priv->virtual)) {
147
148 DRM_ERROR("mmap error\n");
149 retcode = PTR_ERR(buf_priv->virtual);
150 buf_priv->virtual = NULL;
151 }
152
153 return retcode;
154}
155
156static int i810_unmap_buffer(struct drm_buf *buf)
157{
158 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
159 int retcode = 0;
160
161 if (buf_priv->currently_mapped != I810_BUF_MAPPED)
162 return -EINVAL;
163
164 retcode = vm_munmap((unsigned long)buf_priv->virtual,
165 (size_t) buf->total);
166
167 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
168 buf_priv->virtual = NULL;
169
170 return retcode;
171}
172
173static int i810_dma_get_buffer(struct drm_device *dev, drm_i810_dma_t *d,
174 struct drm_file *file_priv)
175{
176 struct drm_buf *buf;
177 drm_i810_buf_priv_t *buf_priv;
178 int retcode = 0;
179
180 buf = i810_freelist_get(dev);
181 if (!buf) {
182 retcode = -ENOMEM;
183 DRM_DEBUG("retcode=%d\n", retcode);
184 return retcode;
185 }
186
187 retcode = i810_map_buffer(buf, file_priv);
188 if (retcode) {
189 i810_freelist_put(dev, buf);
190 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
191 return retcode;
192 }
193 buf->file_priv = file_priv;
194 buf_priv = buf->dev_private;
195 d->granted = 1;
196 d->request_idx = buf->idx;
197 d->request_size = buf->total;
198 d->virtual = buf_priv->virtual;
199
200 return retcode;
201}
202
203static int i810_dma_cleanup(struct drm_device *dev)
204{
205 struct drm_device_dma *dma = dev->dma;
206
207
208
209
210
211 if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled)
212 drm_irq_uninstall(dev);
213
214 if (dev->dev_private) {
215 int i;
216 drm_i810_private_t *dev_priv =
217 (drm_i810_private_t *) dev->dev_private;
218
219 if (dev_priv->ring.virtual_start)
220 drm_legacy_ioremapfree(&dev_priv->ring.map, dev);
221 if (dev_priv->hw_status_page) {
222 dma_free_coherent(dev->dev, PAGE_SIZE,
223 dev_priv->hw_status_page,
224 dev_priv->dma_status_page);
225 }
226 kfree(dev->dev_private);
227 dev->dev_private = NULL;
228
229 for (i = 0; i < dma->buf_count; i++) {
230 struct drm_buf *buf = dma->buflist[i];
231 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
232
233 if (buf_priv->kernel_virtual && buf->total)
234 drm_legacy_ioremapfree(&buf_priv->map, dev);
235 }
236 }
237 return 0;
238}
239
240static int i810_wait_ring(struct drm_device *dev, int n)
241{
242 drm_i810_private_t *dev_priv = dev->dev_private;
243 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
244 int iters = 0;
245 unsigned long end;
246 unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
247
248 end = jiffies + (HZ * 3);
249 while (ring->space < n) {
250 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
251 ring->space = ring->head - (ring->tail + 8);
252 if (ring->space < 0)
253 ring->space += ring->Size;
254
255 if (ring->head != last_head) {
256 end = jiffies + (HZ * 3);
257 last_head = ring->head;
258 }
259
260 iters++;
261 if (time_before(end, jiffies)) {
262 DRM_ERROR("space: %d wanted %d\n", ring->space, n);
263 DRM_ERROR("lockup\n");
264 goto out_wait_ring;
265 }
266 udelay(1);
267 }
268
269out_wait_ring:
270 return iters;
271}
272
273static void i810_kernel_lost_context(struct drm_device *dev)
274{
275 drm_i810_private_t *dev_priv = dev->dev_private;
276 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
277
278 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
279 ring->tail = I810_READ(LP_RING + RING_TAIL);
280 ring->space = ring->head - (ring->tail + 8);
281 if (ring->space < 0)
282 ring->space += ring->Size;
283}
284
285static int i810_freelist_init(struct drm_device *dev, drm_i810_private_t *dev_priv)
286{
287 struct drm_device_dma *dma = dev->dma;
288 int my_idx = 24;
289 u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
290 int i;
291
292 if (dma->buf_count > 1019) {
293
294 return -EINVAL;
295 }
296
297 for (i = 0; i < dma->buf_count; i++) {
298 struct drm_buf *buf = dma->buflist[i];
299 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
300
301 buf_priv->in_use = hw_status++;
302 buf_priv->my_use_idx = my_idx;
303 my_idx += 4;
304
305 *buf_priv->in_use = I810_BUF_FREE;
306
307 buf_priv->map.offset = buf->bus_address;
308 buf_priv->map.size = buf->total;
309 buf_priv->map.type = _DRM_AGP;
310 buf_priv->map.flags = 0;
311 buf_priv->map.mtrr = 0;
312
313 drm_legacy_ioremap(&buf_priv->map, dev);
314 buf_priv->kernel_virtual = buf_priv->map.handle;
315
316 }
317 return 0;
318}
319
320static int i810_dma_initialize(struct drm_device *dev,
321 drm_i810_private_t *dev_priv,
322 drm_i810_init_t *init)
323{
324 struct drm_map_list *r_list;
325 memset(dev_priv, 0, sizeof(drm_i810_private_t));
326
327 list_for_each_entry(r_list, &dev->maplist, head) {
328 if (r_list->map &&
329 r_list->map->type == _DRM_SHM &&
330 r_list->map->flags & _DRM_CONTAINS_LOCK) {
331 dev_priv->sarea_map = r_list->map;
332 break;
333 }
334 }
335 if (!dev_priv->sarea_map) {
336 dev->dev_private = (void *)dev_priv;
337 i810_dma_cleanup(dev);
338 DRM_ERROR("can not find sarea!\n");
339 return -EINVAL;
340 }
341 dev_priv->mmio_map = drm_legacy_findmap(dev, init->mmio_offset);
342 if (!dev_priv->mmio_map) {
343 dev->dev_private = (void *)dev_priv;
344 i810_dma_cleanup(dev);
345 DRM_ERROR("can not find mmio map!\n");
346 return -EINVAL;
347 }
348 dev->agp_buffer_token = init->buffers_offset;
349 dev->agp_buffer_map = drm_legacy_findmap(dev, init->buffers_offset);
350 if (!dev->agp_buffer_map) {
351 dev->dev_private = (void *)dev_priv;
352 i810_dma_cleanup(dev);
353 DRM_ERROR("can not find dma buffer map!\n");
354 return -EINVAL;
355 }
356
357 dev_priv->sarea_priv = (drm_i810_sarea_t *)
358 ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
359
360 dev_priv->ring.Start = init->ring_start;
361 dev_priv->ring.End = init->ring_end;
362 dev_priv->ring.Size = init->ring_size;
363
364 dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
365 dev_priv->ring.map.size = init->ring_size;
366 dev_priv->ring.map.type = _DRM_AGP;
367 dev_priv->ring.map.flags = 0;
368 dev_priv->ring.map.mtrr = 0;
369
370 drm_legacy_ioremap(&dev_priv->ring.map, dev);
371
372 if (dev_priv->ring.map.handle == NULL) {
373 dev->dev_private = (void *)dev_priv;
374 i810_dma_cleanup(dev);
375 DRM_ERROR("can not ioremap virtual address for"
376 " ring buffer\n");
377 return -ENOMEM;
378 }
379
380 dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
381
382 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
383
384 dev_priv->w = init->w;
385 dev_priv->h = init->h;
386 dev_priv->pitch = init->pitch;
387 dev_priv->back_offset = init->back_offset;
388 dev_priv->depth_offset = init->depth_offset;
389 dev_priv->front_offset = init->front_offset;
390
391 dev_priv->overlay_offset = init->overlay_offset;
392 dev_priv->overlay_physical = init->overlay_physical;
393
394 dev_priv->front_di1 = init->front_offset | init->pitch_bits;
395 dev_priv->back_di1 = init->back_offset | init->pitch_bits;
396 dev_priv->zi1 = init->depth_offset | init->pitch_bits;
397
398
399 dev_priv->hw_status_page =
400 dma_alloc_coherent(dev->dev, PAGE_SIZE,
401 &dev_priv->dma_status_page, GFP_KERNEL);
402 if (!dev_priv->hw_status_page) {
403 dev->dev_private = (void *)dev_priv;
404 i810_dma_cleanup(dev);
405 DRM_ERROR("Can not allocate hardware status page\n");
406 return -ENOMEM;
407 }
408 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
409
410 I810_WRITE(0x02080, dev_priv->dma_status_page);
411 DRM_DEBUG("Enabled hardware status page\n");
412
413
414 if (i810_freelist_init(dev, dev_priv) != 0) {
415 dev->dev_private = (void *)dev_priv;
416 i810_dma_cleanup(dev);
417 DRM_ERROR("Not enough space in the status page for"
418 " the freelist\n");
419 return -ENOMEM;
420 }
421 dev->dev_private = (void *)dev_priv;
422
423 return 0;
424}
425
426static int i810_dma_init(struct drm_device *dev, void *data,
427 struct drm_file *file_priv)
428{
429 drm_i810_private_t *dev_priv;
430 drm_i810_init_t *init = data;
431 int retcode = 0;
432
433 switch (init->func) {
434 case I810_INIT_DMA_1_4:
435 DRM_INFO("Using v1.4 init.\n");
436 dev_priv = kmalloc(sizeof(drm_i810_private_t), GFP_KERNEL);
437 if (dev_priv == NULL)
438 return -ENOMEM;
439 retcode = i810_dma_initialize(dev, dev_priv, init);
440 break;
441
442 case I810_CLEANUP_DMA:
443 DRM_INFO("DMA Cleanup\n");
444 retcode = i810_dma_cleanup(dev);
445 break;
446 default:
447 return -EINVAL;
448 }
449
450 return retcode;
451}
452
453
454
455
456
457
458
459static void i810EmitContextVerified(struct drm_device *dev,
460 volatile unsigned int *code)
461{
462 drm_i810_private_t *dev_priv = dev->dev_private;
463 int i, j = 0;
464 unsigned int tmp;
465 RING_LOCALS;
466
467 BEGIN_LP_RING(I810_CTX_SETUP_SIZE);
468
469 OUT_RING(GFX_OP_COLOR_FACTOR);
470 OUT_RING(code[I810_CTXREG_CF1]);
471
472 OUT_RING(GFX_OP_STIPPLE);
473 OUT_RING(code[I810_CTXREG_ST1]);
474
475 for (i = 4; i < I810_CTX_SETUP_SIZE; i++) {
476 tmp = code[i];
477
478 if ((tmp & (7 << 29)) == (3 << 29) &&
479 (tmp & (0x1f << 24)) < (0x1d << 24)) {
480 OUT_RING(tmp);
481 j++;
482 } else
483 printk("constext state dropped!!!\n");
484 }
485
486 if (j & 1)
487 OUT_RING(0);
488
489 ADVANCE_LP_RING();
490}
491
492static void i810EmitTexVerified(struct drm_device *dev, volatile unsigned int *code)
493{
494 drm_i810_private_t *dev_priv = dev->dev_private;
495 int i, j = 0;
496 unsigned int tmp;
497 RING_LOCALS;
498
499 BEGIN_LP_RING(I810_TEX_SETUP_SIZE);
500
501 OUT_RING(GFX_OP_MAP_INFO);
502 OUT_RING(code[I810_TEXREG_MI1]);
503 OUT_RING(code[I810_TEXREG_MI2]);
504 OUT_RING(code[I810_TEXREG_MI3]);
505
506 for (i = 4; i < I810_TEX_SETUP_SIZE; i++) {
507 tmp = code[i];
508
509 if ((tmp & (7 << 29)) == (3 << 29) &&
510 (tmp & (0x1f << 24)) < (0x1d << 24)) {
511 OUT_RING(tmp);
512 j++;
513 } else
514 printk("texture state dropped!!!\n");
515 }
516
517 if (j & 1)
518 OUT_RING(0);
519
520 ADVANCE_LP_RING();
521}
522
523
524
525static void i810EmitDestVerified(struct drm_device *dev,
526 volatile unsigned int *code)
527{
528 drm_i810_private_t *dev_priv = dev->dev_private;
529 unsigned int tmp;
530 RING_LOCALS;
531
532 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
533
534 tmp = code[I810_DESTREG_DI1];
535 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
536 OUT_RING(CMD_OP_DESTBUFFER_INFO);
537 OUT_RING(tmp);
538 } else
539 DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
540 tmp, dev_priv->front_di1, dev_priv->back_di1);
541
542
543
544 OUT_RING(CMD_OP_Z_BUFFER_INFO);
545 OUT_RING(dev_priv->zi1);
546
547 OUT_RING(GFX_OP_DESTBUFFER_VARS);
548 OUT_RING(code[I810_DESTREG_DV1]);
549
550 OUT_RING(GFX_OP_DRAWRECT_INFO);
551 OUT_RING(code[I810_DESTREG_DR1]);
552 OUT_RING(code[I810_DESTREG_DR2]);
553 OUT_RING(code[I810_DESTREG_DR3]);
554 OUT_RING(code[I810_DESTREG_DR4]);
555 OUT_RING(0);
556
557 ADVANCE_LP_RING();
558}
559
560static void i810EmitState(struct drm_device *dev)
561{
562 drm_i810_private_t *dev_priv = dev->dev_private;
563 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
564 unsigned int dirty = sarea_priv->dirty;
565
566 DRM_DEBUG("%x\n", dirty);
567
568 if (dirty & I810_UPLOAD_BUFFERS) {
569 i810EmitDestVerified(dev, sarea_priv->BufferState);
570 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
571 }
572
573 if (dirty & I810_UPLOAD_CTX) {
574 i810EmitContextVerified(dev, sarea_priv->ContextState);
575 sarea_priv->dirty &= ~I810_UPLOAD_CTX;
576 }
577
578 if (dirty & I810_UPLOAD_TEX0) {
579 i810EmitTexVerified(dev, sarea_priv->TexState[0]);
580 sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
581 }
582
583 if (dirty & I810_UPLOAD_TEX1) {
584 i810EmitTexVerified(dev, sarea_priv->TexState[1]);
585 sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
586 }
587}
588
589
590
591static void i810_dma_dispatch_clear(struct drm_device *dev, int flags,
592 unsigned int clear_color,
593 unsigned int clear_zval)
594{
595 drm_i810_private_t *dev_priv = dev->dev_private;
596 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
597 int nbox = sarea_priv->nbox;
598 struct drm_clip_rect *pbox = sarea_priv->boxes;
599 int pitch = dev_priv->pitch;
600 int cpp = 2;
601 int i;
602 RING_LOCALS;
603
604 if (dev_priv->current_page == 1) {
605 unsigned int tmp = flags;
606
607 flags &= ~(I810_FRONT | I810_BACK);
608 if (tmp & I810_FRONT)
609 flags |= I810_BACK;
610 if (tmp & I810_BACK)
611 flags |= I810_FRONT;
612 }
613
614 i810_kernel_lost_context(dev);
615
616 if (nbox > I810_NR_SAREA_CLIPRECTS)
617 nbox = I810_NR_SAREA_CLIPRECTS;
618
619 for (i = 0; i < nbox; i++, pbox++) {
620 unsigned int x = pbox->x1;
621 unsigned int y = pbox->y1;
622 unsigned int width = (pbox->x2 - x) * cpp;
623 unsigned int height = pbox->y2 - y;
624 unsigned int start = y * pitch + x * cpp;
625
626 if (pbox->x1 > pbox->x2 ||
627 pbox->y1 > pbox->y2 ||
628 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
629 continue;
630
631 if (flags & I810_FRONT) {
632 BEGIN_LP_RING(6);
633 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
634 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
635 OUT_RING((height << 16) | width);
636 OUT_RING(start);
637 OUT_RING(clear_color);
638 OUT_RING(0);
639 ADVANCE_LP_RING();
640 }
641
642 if (flags & I810_BACK) {
643 BEGIN_LP_RING(6);
644 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
645 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
646 OUT_RING((height << 16) | width);
647 OUT_RING(dev_priv->back_offset + start);
648 OUT_RING(clear_color);
649 OUT_RING(0);
650 ADVANCE_LP_RING();
651 }
652
653 if (flags & I810_DEPTH) {
654 BEGIN_LP_RING(6);
655 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
656 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
657 OUT_RING((height << 16) | width);
658 OUT_RING(dev_priv->depth_offset + start);
659 OUT_RING(clear_zval);
660 OUT_RING(0);
661 ADVANCE_LP_RING();
662 }
663 }
664}
665
666static void i810_dma_dispatch_swap(struct drm_device *dev)
667{
668 drm_i810_private_t *dev_priv = dev->dev_private;
669 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
670 int nbox = sarea_priv->nbox;
671 struct drm_clip_rect *pbox = sarea_priv->boxes;
672 int pitch = dev_priv->pitch;
673 int cpp = 2;
674 int i;
675 RING_LOCALS;
676
677 DRM_DEBUG("swapbuffers\n");
678
679 i810_kernel_lost_context(dev);
680
681 if (nbox > I810_NR_SAREA_CLIPRECTS)
682 nbox = I810_NR_SAREA_CLIPRECTS;
683
684 for (i = 0; i < nbox; i++, pbox++) {
685 unsigned int w = pbox->x2 - pbox->x1;
686 unsigned int h = pbox->y2 - pbox->y1;
687 unsigned int dst = pbox->x1 * cpp + pbox->y1 * pitch;
688 unsigned int start = dst;
689
690 if (pbox->x1 > pbox->x2 ||
691 pbox->y1 > pbox->y2 ||
692 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
693 continue;
694
695 BEGIN_LP_RING(6);
696 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4);
697 OUT_RING(pitch | (0xCC << 16));
698 OUT_RING((h << 16) | (w * cpp));
699 if (dev_priv->current_page == 0)
700 OUT_RING(dev_priv->front_offset + start);
701 else
702 OUT_RING(dev_priv->back_offset + start);
703 OUT_RING(pitch);
704 if (dev_priv->current_page == 0)
705 OUT_RING(dev_priv->back_offset + start);
706 else
707 OUT_RING(dev_priv->front_offset + start);
708 ADVANCE_LP_RING();
709 }
710}
711
712static void i810_dma_dispatch_vertex(struct drm_device *dev,
713 struct drm_buf *buf, int discard, int used)
714{
715 drm_i810_private_t *dev_priv = dev->dev_private;
716 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
717 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
718 struct drm_clip_rect *box = sarea_priv->boxes;
719 int nbox = sarea_priv->nbox;
720 unsigned long address = (unsigned long)buf->bus_address;
721 unsigned long start = address - dev->agp->base;
722 int i = 0;
723 RING_LOCALS;
724
725 i810_kernel_lost_context(dev);
726
727 if (nbox > I810_NR_SAREA_CLIPRECTS)
728 nbox = I810_NR_SAREA_CLIPRECTS;
729
730 if (used < 0 || used > 4 * 1024)
731 used = 0;
732
733 if (sarea_priv->dirty)
734 i810EmitState(dev);
735
736 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
737 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK);
738
739 *(u32 *) buf_priv->kernel_virtual =
740 ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2)));
741
742 if (used & 4) {
743 *(u32 *) ((char *) buf_priv->kernel_virtual + used) = 0;
744 used += 4;
745 }
746
747 i810_unmap_buffer(buf);
748 }
749
750 if (used) {
751 do {
752 if (i < nbox) {
753 BEGIN_LP_RING(4);
754 OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
755 SC_ENABLE);
756 OUT_RING(GFX_OP_SCISSOR_INFO);
757 OUT_RING(box[i].x1 | (box[i].y1 << 16));
758 OUT_RING((box[i].x2 -
759 1) | ((box[i].y2 - 1) << 16));
760 ADVANCE_LP_RING();
761 }
762
763 BEGIN_LP_RING(4);
764 OUT_RING(CMD_OP_BATCH_BUFFER);
765 OUT_RING(start | BB1_PROTECTED);
766 OUT_RING(start + used - 4);
767 OUT_RING(0);
768 ADVANCE_LP_RING();
769
770 } while (++i < nbox);
771 }
772
773 if (discard) {
774 dev_priv->counter++;
775
776 (void)cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
777 I810_BUF_HARDWARE);
778
779 BEGIN_LP_RING(8);
780 OUT_RING(CMD_STORE_DWORD_IDX);
781 OUT_RING(20);
782 OUT_RING(dev_priv->counter);
783 OUT_RING(CMD_STORE_DWORD_IDX);
784 OUT_RING(buf_priv->my_use_idx);
785 OUT_RING(I810_BUF_FREE);
786 OUT_RING(CMD_REPORT_HEAD);
787 OUT_RING(0);
788 ADVANCE_LP_RING();
789 }
790}
791
792static void i810_dma_dispatch_flip(struct drm_device *dev)
793{
794 drm_i810_private_t *dev_priv = dev->dev_private;
795 int pitch = dev_priv->pitch;
796 RING_LOCALS;
797
798 DRM_DEBUG("page=%d pfCurrentPage=%d\n",
799 dev_priv->current_page,
800 dev_priv->sarea_priv->pf_current_page);
801
802 i810_kernel_lost_context(dev);
803
804 BEGIN_LP_RING(2);
805 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
806 OUT_RING(0);
807 ADVANCE_LP_RING();
808
809 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
810
811
812
813
814 OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) );
815 if (dev_priv->current_page == 0) {
816 OUT_RING(dev_priv->back_offset);
817 dev_priv->current_page = 1;
818 } else {
819 OUT_RING(dev_priv->front_offset);
820 dev_priv->current_page = 0;
821 }
822 OUT_RING(0);
823 ADVANCE_LP_RING();
824
825 BEGIN_LP_RING(2);
826 OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP);
827 OUT_RING(0);
828 ADVANCE_LP_RING();
829
830
831
832
833
834 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
835
836}
837
838static void i810_dma_quiescent(struct drm_device *dev)
839{
840 drm_i810_private_t *dev_priv = dev->dev_private;
841 RING_LOCALS;
842
843 i810_kernel_lost_context(dev);
844
845 BEGIN_LP_RING(4);
846 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
847 OUT_RING(CMD_REPORT_HEAD);
848 OUT_RING(0);
849 OUT_RING(0);
850 ADVANCE_LP_RING();
851
852 i810_wait_ring(dev, dev_priv->ring.Size - 8);
853}
854
855static void i810_flush_queue(struct drm_device *dev)
856{
857 drm_i810_private_t *dev_priv = dev->dev_private;
858 struct drm_device_dma *dma = dev->dma;
859 int i;
860 RING_LOCALS;
861
862 i810_kernel_lost_context(dev);
863
864 BEGIN_LP_RING(2);
865 OUT_RING(CMD_REPORT_HEAD);
866 OUT_RING(0);
867 ADVANCE_LP_RING();
868
869 i810_wait_ring(dev, dev_priv->ring.Size - 8);
870
871 for (i = 0; i < dma->buf_count; i++) {
872 struct drm_buf *buf = dma->buflist[i];
873 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
874
875 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
876 I810_BUF_FREE);
877
878 if (used == I810_BUF_HARDWARE)
879 DRM_DEBUG("reclaimed from HARDWARE\n");
880 if (used == I810_BUF_CLIENT)
881 DRM_DEBUG("still on client\n");
882 }
883
884 return;
885}
886
887
888void i810_driver_reclaim_buffers(struct drm_device *dev,
889 struct drm_file *file_priv)
890{
891 struct drm_device_dma *dma = dev->dma;
892 int i;
893
894 if (!dma)
895 return;
896 if (!dev->dev_private)
897 return;
898 if (!dma->buflist)
899 return;
900
901 i810_flush_queue(dev);
902
903 for (i = 0; i < dma->buf_count; i++) {
904 struct drm_buf *buf = dma->buflist[i];
905 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
906
907 if (buf->file_priv == file_priv && buf_priv) {
908 int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
909 I810_BUF_FREE);
910
911 if (used == I810_BUF_CLIENT)
912 DRM_DEBUG("reclaimed from client\n");
913 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
914 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
915 }
916 }
917}
918
919static int i810_flush_ioctl(struct drm_device *dev, void *data,
920 struct drm_file *file_priv)
921{
922 LOCK_TEST_WITH_RETURN(dev, file_priv);
923
924 i810_flush_queue(dev);
925 return 0;
926}
927
928static int i810_dma_vertex(struct drm_device *dev, void *data,
929 struct drm_file *file_priv)
930{
931 struct drm_device_dma *dma = dev->dma;
932 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
933 u32 *hw_status = dev_priv->hw_status_page;
934 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
935 dev_priv->sarea_priv;
936 drm_i810_vertex_t *vertex = data;
937
938 LOCK_TEST_WITH_RETURN(dev, file_priv);
939
940 DRM_DEBUG("idx %d used %d discard %d\n",
941 vertex->idx, vertex->used, vertex->discard);
942
943 if (vertex->idx < 0 || vertex->idx >= dma->buf_count)
944 return -EINVAL;
945
946 i810_dma_dispatch_vertex(dev,
947 dma->buflist[vertex->idx],
948 vertex->discard, vertex->used);
949
950 sarea_priv->last_enqueue = dev_priv->counter - 1;
951 sarea_priv->last_dispatch = (int)hw_status[5];
952
953 return 0;
954}
955
956static int i810_clear_bufs(struct drm_device *dev, void *data,
957 struct drm_file *file_priv)
958{
959 drm_i810_clear_t *clear = data;
960
961 LOCK_TEST_WITH_RETURN(dev, file_priv);
962
963
964 if (!dev->dev_private)
965 return -EINVAL;
966
967 i810_dma_dispatch_clear(dev, clear->flags,
968 clear->clear_color, clear->clear_depth);
969 return 0;
970}
971
972static int i810_swap_bufs(struct drm_device *dev, void *data,
973 struct drm_file *file_priv)
974{
975 DRM_DEBUG("\n");
976
977 LOCK_TEST_WITH_RETURN(dev, file_priv);
978
979 i810_dma_dispatch_swap(dev);
980 return 0;
981}
982
983static int i810_getage(struct drm_device *dev, void *data,
984 struct drm_file *file_priv)
985{
986 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
987 u32 *hw_status = dev_priv->hw_status_page;
988 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
989 dev_priv->sarea_priv;
990
991 sarea_priv->last_dispatch = (int)hw_status[5];
992 return 0;
993}
994
995static int i810_getbuf(struct drm_device *dev, void *data,
996 struct drm_file *file_priv)
997{
998 int retcode = 0;
999 drm_i810_dma_t *d = data;
1000 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1001 u32 *hw_status = dev_priv->hw_status_page;
1002 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1003 dev_priv->sarea_priv;
1004
1005 LOCK_TEST_WITH_RETURN(dev, file_priv);
1006
1007 d->granted = 0;
1008
1009 retcode = i810_dma_get_buffer(dev, d, file_priv);
1010
1011 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
1012 task_pid_nr(current), retcode, d->granted);
1013
1014 sarea_priv->last_dispatch = (int)hw_status[5];
1015
1016 return retcode;
1017}
1018
1019static int i810_copybuf(struct drm_device *dev, void *data,
1020 struct drm_file *file_priv)
1021{
1022
1023 return 0;
1024}
1025
1026static int i810_docopy(struct drm_device *dev, void *data,
1027 struct drm_file *file_priv)
1028{
1029
1030 return 0;
1031}
1032
1033static void i810_dma_dispatch_mc(struct drm_device *dev, struct drm_buf *buf, int used,
1034 unsigned int last_render)
1035{
1036 drm_i810_private_t *dev_priv = dev->dev_private;
1037 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1038 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1039 unsigned long address = (unsigned long)buf->bus_address;
1040 unsigned long start = address - dev->agp->base;
1041 int u;
1042 RING_LOCALS;
1043
1044 i810_kernel_lost_context(dev);
1045
1046 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE);
1047 if (u != I810_BUF_CLIENT)
1048 DRM_DEBUG("MC found buffer that isn't mine!\n");
1049
1050 if (used < 0 || used > 4 * 1024)
1051 used = 0;
1052
1053 sarea_priv->dirty = 0x7f;
1054
1055 DRM_DEBUG("addr 0x%lx, used 0x%x\n", address, used);
1056
1057 dev_priv->counter++;
1058 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1059 DRM_DEBUG("start : %lx\n", start);
1060 DRM_DEBUG("used : %d\n", used);
1061 DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1062
1063 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
1064 if (used & 4) {
1065 *(u32 *) ((char *) buf_priv->virtual + used) = 0;
1066 used += 4;
1067 }
1068
1069 i810_unmap_buffer(buf);
1070 }
1071 BEGIN_LP_RING(4);
1072 OUT_RING(CMD_OP_BATCH_BUFFER);
1073 OUT_RING(start | BB1_PROTECTED);
1074 OUT_RING(start + used - 4);
1075 OUT_RING(0);
1076 ADVANCE_LP_RING();
1077
1078 BEGIN_LP_RING(8);
1079 OUT_RING(CMD_STORE_DWORD_IDX);
1080 OUT_RING(buf_priv->my_use_idx);
1081 OUT_RING(I810_BUF_FREE);
1082 OUT_RING(0);
1083
1084 OUT_RING(CMD_STORE_DWORD_IDX);
1085 OUT_RING(16);
1086 OUT_RING(last_render);
1087 OUT_RING(0);
1088 ADVANCE_LP_RING();
1089}
1090
1091static int i810_dma_mc(struct drm_device *dev, void *data,
1092 struct drm_file *file_priv)
1093{
1094 struct drm_device_dma *dma = dev->dma;
1095 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1096 u32 *hw_status = dev_priv->hw_status_page;
1097 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1098 dev_priv->sarea_priv;
1099 drm_i810_mc_t *mc = data;
1100
1101 LOCK_TEST_WITH_RETURN(dev, file_priv);
1102
1103 if (mc->idx >= dma->buf_count || mc->idx < 0)
1104 return -EINVAL;
1105
1106 i810_dma_dispatch_mc(dev, dma->buflist[mc->idx], mc->used,
1107 mc->last_render);
1108
1109 sarea_priv->last_enqueue = dev_priv->counter - 1;
1110 sarea_priv->last_dispatch = (int)hw_status[5];
1111
1112 return 0;
1113}
1114
1115static int i810_rstatus(struct drm_device *dev, void *data,
1116 struct drm_file *file_priv)
1117{
1118 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1119
1120 return (int)(((u32 *) (dev_priv->hw_status_page))[4]);
1121}
1122
1123static int i810_ov0_info(struct drm_device *dev, void *data,
1124 struct drm_file *file_priv)
1125{
1126 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1127 drm_i810_overlay_t *ov = data;
1128
1129 ov->offset = dev_priv->overlay_offset;
1130 ov->physical = dev_priv->overlay_physical;
1131
1132 return 0;
1133}
1134
1135static int i810_fstatus(struct drm_device *dev, void *data,
1136 struct drm_file *file_priv)
1137{
1138 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1139
1140 LOCK_TEST_WITH_RETURN(dev, file_priv);
1141 return I810_READ(0x30008);
1142}
1143
1144static int i810_ov0_flip(struct drm_device *dev, void *data,
1145 struct drm_file *file_priv)
1146{
1147 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1148
1149 LOCK_TEST_WITH_RETURN(dev, file_priv);
1150
1151
1152 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
1153
1154 return 0;
1155}
1156
1157
1158
1159static void i810_do_init_pageflip(struct drm_device *dev)
1160{
1161 drm_i810_private_t *dev_priv = dev->dev_private;
1162
1163 DRM_DEBUG("\n");
1164 dev_priv->page_flipping = 1;
1165 dev_priv->current_page = 0;
1166 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1167}
1168
1169static int i810_do_cleanup_pageflip(struct drm_device *dev)
1170{
1171 drm_i810_private_t *dev_priv = dev->dev_private;
1172
1173 DRM_DEBUG("\n");
1174 if (dev_priv->current_page != 0)
1175 i810_dma_dispatch_flip(dev);
1176
1177 dev_priv->page_flipping = 0;
1178 return 0;
1179}
1180
1181static int i810_flip_bufs(struct drm_device *dev, void *data,
1182 struct drm_file *file_priv)
1183{
1184 drm_i810_private_t *dev_priv = dev->dev_private;
1185
1186 DRM_DEBUG("\n");
1187
1188 LOCK_TEST_WITH_RETURN(dev, file_priv);
1189
1190 if (!dev_priv->page_flipping)
1191 i810_do_init_pageflip(dev);
1192
1193 i810_dma_dispatch_flip(dev);
1194 return 0;
1195}
1196
1197int i810_driver_load(struct drm_device *dev, unsigned long flags)
1198{
1199 struct pci_dev *pdev = to_pci_dev(dev->dev);
1200
1201 dev->agp = drm_legacy_agp_init(dev);
1202 if (dev->agp) {
1203 dev->agp->agp_mtrr = arch_phys_wc_add(
1204 dev->agp->agp_info.aper_base,
1205 dev->agp->agp_info.aper_size *
1206 1024 * 1024);
1207 }
1208
1209
1210 if (!dev->agp)
1211 return -EINVAL;
1212
1213 pci_set_master(pdev);
1214
1215 return 0;
1216}
1217
1218void i810_driver_lastclose(struct drm_device *dev)
1219{
1220 i810_dma_cleanup(dev);
1221}
1222
1223void i810_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
1224{
1225 if (dev->dev_private) {
1226 drm_i810_private_t *dev_priv = dev->dev_private;
1227 if (dev_priv->page_flipping)
1228 i810_do_cleanup_pageflip(dev);
1229 }
1230
1231 if (file_priv->master && file_priv->master->lock.hw_lock) {
1232 drm_legacy_idlelock_take(&file_priv->master->lock);
1233 i810_driver_reclaim_buffers(dev, file_priv);
1234 drm_legacy_idlelock_release(&file_priv->master->lock);
1235 } else {
1236
1237
1238 i810_driver_reclaim_buffers(dev, file_priv);
1239 }
1240
1241}
1242
1243int i810_driver_dma_quiescent(struct drm_device *dev)
1244{
1245 i810_dma_quiescent(dev);
1246 return 0;
1247}
1248
1249const struct drm_ioctl_desc i810_ioctls[] = {
1250 DRM_IOCTL_DEF_DRV(I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1251 DRM_IOCTL_DEF_DRV(I810_VERTEX, i810_dma_vertex, DRM_AUTH|DRM_UNLOCKED),
1252 DRM_IOCTL_DEF_DRV(I810_CLEAR, i810_clear_bufs, DRM_AUTH|DRM_UNLOCKED),
1253 DRM_IOCTL_DEF_DRV(I810_FLUSH, i810_flush_ioctl, DRM_AUTH|DRM_UNLOCKED),
1254 DRM_IOCTL_DEF_DRV(I810_GETAGE, i810_getage, DRM_AUTH|DRM_UNLOCKED),
1255 DRM_IOCTL_DEF_DRV(I810_GETBUF, i810_getbuf, DRM_AUTH|DRM_UNLOCKED),
1256 DRM_IOCTL_DEF_DRV(I810_SWAP, i810_swap_bufs, DRM_AUTH|DRM_UNLOCKED),
1257 DRM_IOCTL_DEF_DRV(I810_COPY, i810_copybuf, DRM_AUTH|DRM_UNLOCKED),
1258 DRM_IOCTL_DEF_DRV(I810_DOCOPY, i810_docopy, DRM_AUTH|DRM_UNLOCKED),
1259 DRM_IOCTL_DEF_DRV(I810_OV0INFO, i810_ov0_info, DRM_AUTH|DRM_UNLOCKED),
1260 DRM_IOCTL_DEF_DRV(I810_FSTATUS, i810_fstatus, DRM_AUTH|DRM_UNLOCKED),
1261 DRM_IOCTL_DEF_DRV(I810_OV0FLIP, i810_ov0_flip, DRM_AUTH|DRM_UNLOCKED),
1262 DRM_IOCTL_DEF_DRV(I810_MC, i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1263 DRM_IOCTL_DEF_DRV(I810_RSTATUS, i810_rstatus, DRM_AUTH|DRM_UNLOCKED),
1264 DRM_IOCTL_DEF_DRV(I810_FLIP, i810_flip_bufs, DRM_AUTH|DRM_UNLOCKED),
1265};
1266
1267int i810_max_ioctl = ARRAY_SIZE(i810_ioctls);
1268
