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26#include <linux/virtio.h>
27#include <linux/virtio_config.h>
28#include <linux/virtio_ring.h>
29
30#include <drm/drm_file.h>
31
32#include "virtgpu_drv.h"
33
34static void virtio_gpu_config_changed_work_func(struct work_struct *work)
35{
36 struct virtio_gpu_device *vgdev =
37 container_of(work, struct virtio_gpu_device,
38 config_changed_work);
39 u32 events_read, events_clear = 0;
40
41
42 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
43 events_read, &events_read);
44 if (events_read & VIRTIO_GPU_EVENT_DISPLAY) {
45 if (vgdev->has_edid)
46 virtio_gpu_cmd_get_edids(vgdev);
47 virtio_gpu_cmd_get_display_info(vgdev);
48 virtio_gpu_notify(vgdev);
49 drm_helper_hpd_irq_event(vgdev->ddev);
50 events_clear |= VIRTIO_GPU_EVENT_DISPLAY;
51 }
52 virtio_cwrite_le(vgdev->vdev, struct virtio_gpu_config,
53 events_clear, &events_clear);
54}
55
56static void virtio_gpu_init_vq(struct virtio_gpu_queue *vgvq,
57 void (*work_func)(struct work_struct *work))
58{
59 spin_lock_init(&vgvq->qlock);
60 init_waitqueue_head(&vgvq->ack_queue);
61 INIT_WORK(&vgvq->dequeue_work, work_func);
62}
63
64static void virtio_gpu_get_capsets(struct virtio_gpu_device *vgdev,
65 int num_capsets)
66{
67 int i, ret;
68
69 vgdev->capsets = kcalloc(num_capsets,
70 sizeof(struct virtio_gpu_drv_capset),
71 GFP_KERNEL);
72 if (!vgdev->capsets) {
73 DRM_ERROR("failed to allocate cap sets\n");
74 return;
75 }
76 for (i = 0; i < num_capsets; i++) {
77 virtio_gpu_cmd_get_capset_info(vgdev, i);
78 virtio_gpu_notify(vgdev);
79 ret = wait_event_timeout(vgdev->resp_wq,
80 vgdev->capsets[i].id > 0, 5 * HZ);
81 if (ret == 0) {
82 DRM_ERROR("timed out waiting for cap set %d\n", i);
83 spin_lock(&vgdev->display_info_lock);
84 kfree(vgdev->capsets);
85 vgdev->capsets = NULL;
86 spin_unlock(&vgdev->display_info_lock);
87 return;
88 }
89 DRM_INFO("cap set %d: id %d, max-version %d, max-size %d\n",
90 i, vgdev->capsets[i].id,
91 vgdev->capsets[i].max_version,
92 vgdev->capsets[i].max_size);
93 }
94 vgdev->num_capsets = num_capsets;
95}
96
97int virtio_gpu_init(struct drm_device *dev)
98{
99 static vq_callback_t *callbacks[] = {
100 virtio_gpu_ctrl_ack, virtio_gpu_cursor_ack
101 };
102 static const char * const names[] = { "control", "cursor" };
103
104 struct virtio_gpu_device *vgdev;
105
106 struct virtqueue *vqs[2];
107 u32 num_scanouts, num_capsets;
108 int ret = 0;
109
110 if (!virtio_has_feature(dev_to_virtio(dev->dev), VIRTIO_F_VERSION_1))
111 return -ENODEV;
112
113 vgdev = kzalloc(sizeof(struct virtio_gpu_device), GFP_KERNEL);
114 if (!vgdev)
115 return -ENOMEM;
116
117 vgdev->ddev = dev;
118 dev->dev_private = vgdev;
119 vgdev->vdev = dev_to_virtio(dev->dev);
120 vgdev->dev = dev->dev;
121
122 spin_lock_init(&vgdev->display_info_lock);
123 spin_lock_init(&vgdev->resource_export_lock);
124 spin_lock_init(&vgdev->host_visible_lock);
125 ida_init(&vgdev->ctx_id_ida);
126 ida_init(&vgdev->resource_ida);
127 init_waitqueue_head(&vgdev->resp_wq);
128 virtio_gpu_init_vq(&vgdev->ctrlq, virtio_gpu_dequeue_ctrl_func);
129 virtio_gpu_init_vq(&vgdev->cursorq, virtio_gpu_dequeue_cursor_func);
130
131 vgdev->fence_drv.context = dma_fence_context_alloc(1);
132 spin_lock_init(&vgdev->fence_drv.lock);
133 INIT_LIST_HEAD(&vgdev->fence_drv.fences);
134 INIT_LIST_HEAD(&vgdev->cap_cache);
135 INIT_WORK(&vgdev->config_changed_work,
136 virtio_gpu_config_changed_work_func);
137
138 INIT_WORK(&vgdev->obj_free_work,
139 virtio_gpu_array_put_free_work);
140 INIT_LIST_HEAD(&vgdev->obj_free_list);
141 spin_lock_init(&vgdev->obj_free_lock);
142
143#ifdef __LITTLE_ENDIAN
144 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_VIRGL))
145 vgdev->has_virgl_3d = true;
146#endif
147 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_EDID)) {
148 vgdev->has_edid = true;
149 }
150 if (virtio_has_feature(vgdev->vdev, VIRTIO_RING_F_INDIRECT_DESC)) {
151 vgdev->has_indirect = true;
152 }
153 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_RESOURCE_UUID)) {
154 vgdev->has_resource_assign_uuid = true;
155 }
156 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_RESOURCE_BLOB)) {
157 vgdev->has_resource_blob = true;
158 }
159 if (virtio_get_shm_region(vgdev->vdev, &vgdev->host_visible_region,
160 VIRTIO_GPU_SHM_ID_HOST_VISIBLE)) {
161 if (!devm_request_mem_region(&vgdev->vdev->dev,
162 vgdev->host_visible_region.addr,
163 vgdev->host_visible_region.len,
164 dev_name(&vgdev->vdev->dev))) {
165 DRM_ERROR("Could not reserve host visible region\n");
166 ret = -EBUSY;
167 goto err_vqs;
168 }
169
170 DRM_INFO("Host memory window: 0x%lx +0x%lx\n",
171 (unsigned long)vgdev->host_visible_region.addr,
172 (unsigned long)vgdev->host_visible_region.len);
173 vgdev->has_host_visible = true;
174 drm_mm_init(&vgdev->host_visible_mm,
175 (unsigned long)vgdev->host_visible_region.addr,
176 (unsigned long)vgdev->host_visible_region.len);
177 }
178
179 DRM_INFO("features: %cvirgl %cedid %cresource_blob %chost_visible\n",
180 vgdev->has_virgl_3d ? '+' : '-',
181 vgdev->has_edid ? '+' : '-',
182 vgdev->has_resource_blob ? '+' : '-',
183 vgdev->has_host_visible ? '+' : '-');
184
185 ret = virtio_find_vqs(vgdev->vdev, 2, vqs, callbacks, names, NULL);
186 if (ret) {
187 DRM_ERROR("failed to find virt queues\n");
188 goto err_vqs;
189 }
190 vgdev->ctrlq.vq = vqs[0];
191 vgdev->cursorq.vq = vqs[1];
192 ret = virtio_gpu_alloc_vbufs(vgdev);
193 if (ret) {
194 DRM_ERROR("failed to alloc vbufs\n");
195 goto err_vbufs;
196 }
197
198
199 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
200 num_scanouts, &num_scanouts);
201 vgdev->num_scanouts = min_t(uint32_t, num_scanouts,
202 VIRTIO_GPU_MAX_SCANOUTS);
203 if (!vgdev->num_scanouts) {
204 DRM_ERROR("num_scanouts is zero\n");
205 ret = -EINVAL;
206 goto err_scanouts;
207 }
208 DRM_INFO("number of scanouts: %d\n", num_scanouts);
209
210 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
211 num_capsets, &num_capsets);
212 DRM_INFO("number of cap sets: %d\n", num_capsets);
213
214 ret = virtio_gpu_modeset_init(vgdev);
215 if (ret) {
216 DRM_ERROR("modeset init failed\n");
217 goto err_scanouts;
218 }
219
220 virtio_device_ready(vgdev->vdev);
221
222 if (num_capsets)
223 virtio_gpu_get_capsets(vgdev, num_capsets);
224 if (vgdev->has_edid)
225 virtio_gpu_cmd_get_edids(vgdev);
226 virtio_gpu_cmd_get_display_info(vgdev);
227 virtio_gpu_notify(vgdev);
228 wait_event_timeout(vgdev->resp_wq, !vgdev->display_info_pending,
229 5 * HZ);
230 return 0;
231
232err_scanouts:
233 virtio_gpu_free_vbufs(vgdev);
234err_vbufs:
235 vgdev->vdev->config->del_vqs(vgdev->vdev);
236err_vqs:
237 dev->dev_private = NULL;
238 kfree(vgdev);
239 return ret;
240}
241
242static void virtio_gpu_cleanup_cap_cache(struct virtio_gpu_device *vgdev)
243{
244 struct virtio_gpu_drv_cap_cache *cache_ent, *tmp;
245
246 list_for_each_entry_safe(cache_ent, tmp, &vgdev->cap_cache, head) {
247 kfree(cache_ent->caps_cache);
248 kfree(cache_ent);
249 }
250}
251
252void virtio_gpu_deinit(struct drm_device *dev)
253{
254 struct virtio_gpu_device *vgdev = dev->dev_private;
255
256 flush_work(&vgdev->obj_free_work);
257 flush_work(&vgdev->ctrlq.dequeue_work);
258 flush_work(&vgdev->cursorq.dequeue_work);
259 flush_work(&vgdev->config_changed_work);
260 vgdev->vdev->config->reset(vgdev->vdev);
261 vgdev->vdev->config->del_vqs(vgdev->vdev);
262}
263
264void virtio_gpu_release(struct drm_device *dev)
265{
266 struct virtio_gpu_device *vgdev = dev->dev_private;
267
268 if (!vgdev)
269 return;
270
271 virtio_gpu_modeset_fini(vgdev);
272 virtio_gpu_free_vbufs(vgdev);
273 virtio_gpu_cleanup_cap_cache(vgdev);
274
275 if (vgdev->has_host_visible)
276 drm_mm_takedown(&vgdev->host_visible_mm);
277
278 kfree(vgdev->capsets);
279 kfree(vgdev);
280}
281
282int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file)
283{
284 struct virtio_gpu_device *vgdev = dev->dev_private;
285 struct virtio_gpu_fpriv *vfpriv;
286 int handle;
287
288
289 if (!vgdev->has_virgl_3d)
290 return 0;
291
292
293 vfpriv = kzalloc(sizeof(*vfpriv), GFP_KERNEL);
294 if (!vfpriv)
295 return -ENOMEM;
296
297 mutex_init(&vfpriv->context_lock);
298
299 handle = ida_alloc(&vgdev->ctx_id_ida, GFP_KERNEL);
300 if (handle < 0) {
301 kfree(vfpriv);
302 return handle;
303 }
304
305 vfpriv->ctx_id = handle + 1;
306 file->driver_priv = vfpriv;
307 return 0;
308}
309
310void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file)
311{
312 struct virtio_gpu_device *vgdev = dev->dev_private;
313 struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
314
315 if (!vgdev->has_virgl_3d)
316 return;
317
318 if (vfpriv->context_created) {
319 virtio_gpu_cmd_context_destroy(vgdev, vfpriv->ctx_id);
320 virtio_gpu_notify(vgdev);
321 }
322
323 ida_free(&vgdev->ctx_id_ida, vfpriv->ctx_id - 1);
324 mutex_destroy(&vfpriv->context_lock);
325 kfree(vfpriv);
326 file->driver_priv = NULL;
327}
328
