linux/drivers/media/platform/rcar_drif.c
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   1/*
   2 * R-Car Gen3 Digital Radio Interface (DRIF) driver
   3 *
   4 * Copyright (C) 2017 Renesas Electronics Corporation
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License as published by
   8 * the Free Software Foundation; either version 2 of the License, or
   9 * (at your option) any later version.
  10 *
  11 * This program is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 * GNU General Public License for more details.
  15 */
  16
  17/*
  18 * The R-Car DRIF is a receive only MSIOF like controller with an
  19 * external master device driving the SCK. It receives data into a FIFO,
  20 * then this driver uses the SYS-DMAC engine to move the data from
  21 * the device to memory.
  22 *
  23 * Each DRIF channel DRIFx (as per datasheet) contains two internal
  24 * channels DRIFx0 & DRIFx1 within itself with each having its own resources
  25 * like module clk, register set, irq and dma. These internal channels share
  26 * common CLK & SYNC from master. The two data pins D0 & D1 shall be
  27 * considered to represent the two internal channels. This internal split
  28 * is not visible to the master device.
  29 *
  30 * Depending on the master device, a DRIF channel can use
  31 *  (1) both internal channels (D0 & D1) to receive data in parallel (or)
  32 *  (2) one internal channel (D0 or D1) to receive data
  33 *
  34 * The primary design goal of this controller is to act as a Digital Radio
  35 * Interface that receives digital samples from a tuner device. Hence the
  36 * driver exposes the device as a V4L2 SDR device. In order to qualify as
  37 * a V4L2 SDR device, it should possess a tuner interface as mandated by the
  38 * framework. This driver expects a tuner driver (sub-device) to bind
  39 * asynchronously with this device and the combined drivers shall expose
  40 * a V4L2 compliant SDR device. The DRIF driver is independent of the
  41 * tuner vendor.
  42 *
  43 * The DRIF h/w can support I2S mode and Frame start synchronization pulse mode.
  44 * This driver is tested for I2S mode only because of the availability of
  45 * suitable master devices. Hence, not all configurable options of DRIF h/w
  46 * like lsb/msb first, syncdl, dtdl etc. are exposed via DT and I2S defaults
  47 * are used. These can be exposed later if needed after testing.
  48 */
  49#include <linux/bitops.h>
  50#include <linux/clk.h>
  51#include <linux/dma-mapping.h>
  52#include <linux/dmaengine.h>
  53#include <linux/ioctl.h>
  54#include <linux/iopoll.h>
  55#include <linux/module.h>
  56#include <linux/of_graph.h>
  57#include <linux/of_device.h>
  58#include <linux/platform_device.h>
  59#include <linux/sched.h>
  60#include <media/v4l2-async.h>
  61#include <media/v4l2-ctrls.h>
  62#include <media/v4l2-device.h>
  63#include <media/v4l2-event.h>
  64#include <media/v4l2-fh.h>
  65#include <media/v4l2-ioctl.h>
  66#include <media/videobuf2-v4l2.h>
  67#include <media/videobuf2-vmalloc.h>
  68
  69/* DRIF register offsets */
  70#define RCAR_DRIF_SITMDR1                       0x00
  71#define RCAR_DRIF_SITMDR2                       0x04
  72#define RCAR_DRIF_SITMDR3                       0x08
  73#define RCAR_DRIF_SIRMDR1                       0x10
  74#define RCAR_DRIF_SIRMDR2                       0x14
  75#define RCAR_DRIF_SIRMDR3                       0x18
  76#define RCAR_DRIF_SICTR                         0x28
  77#define RCAR_DRIF_SIFCTR                        0x30
  78#define RCAR_DRIF_SISTR                         0x40
  79#define RCAR_DRIF_SIIER                         0x44
  80#define RCAR_DRIF_SIRFDR                        0x60
  81
  82#define RCAR_DRIF_RFOVF                 BIT(3)  /* Receive FIFO overflow */
  83#define RCAR_DRIF_RFUDF                 BIT(4)  /* Receive FIFO underflow */
  84#define RCAR_DRIF_RFSERR                BIT(5)  /* Receive frame sync error */
  85#define RCAR_DRIF_REOF                  BIT(7)  /* Frame reception end */
  86#define RCAR_DRIF_RDREQ                 BIT(12) /* Receive data xfer req */
  87#define RCAR_DRIF_RFFUL                 BIT(13) /* Receive FIFO full */
  88
  89/* SIRMDR1 */
  90#define RCAR_DRIF_SIRMDR1_SYNCMD_FRAME          (0 << 28)
  91#define RCAR_DRIF_SIRMDR1_SYNCMD_LR             (3 << 28)
  92
  93#define RCAR_DRIF_SIRMDR1_SYNCAC_POL_HIGH       (0 << 25)
  94#define RCAR_DRIF_SIRMDR1_SYNCAC_POL_LOW        (1 << 25)
  95
  96#define RCAR_DRIF_SIRMDR1_MSB_FIRST             (0 << 24)
  97#define RCAR_DRIF_SIRMDR1_LSB_FIRST             (1 << 24)
  98
  99#define RCAR_DRIF_SIRMDR1_DTDL_0                (0 << 20)
 100#define RCAR_DRIF_SIRMDR1_DTDL_1                (1 << 20)
 101#define RCAR_DRIF_SIRMDR1_DTDL_2                (2 << 20)
 102#define RCAR_DRIF_SIRMDR1_DTDL_0PT5             (5 << 20)
 103#define RCAR_DRIF_SIRMDR1_DTDL_1PT5             (6 << 20)
 104
 105#define RCAR_DRIF_SIRMDR1_SYNCDL_0              (0 << 20)
 106#define RCAR_DRIF_SIRMDR1_SYNCDL_1              (1 << 20)
 107#define RCAR_DRIF_SIRMDR1_SYNCDL_2              (2 << 20)
 108#define RCAR_DRIF_SIRMDR1_SYNCDL_3              (3 << 20)
 109#define RCAR_DRIF_SIRMDR1_SYNCDL_0PT5           (5 << 20)
 110#define RCAR_DRIF_SIRMDR1_SYNCDL_1PT5           (6 << 20)
 111
 112#define RCAR_DRIF_MDR_GRPCNT(n)                 (((n) - 1) << 30)
 113#define RCAR_DRIF_MDR_BITLEN(n)                 (((n) - 1) << 24)
 114#define RCAR_DRIF_MDR_WDCNT(n)                  (((n) - 1) << 16)
 115
 116/* Hidden Transmit register that controls CLK & SYNC */
 117#define RCAR_DRIF_SITMDR1_PCON                  BIT(30)
 118
 119#define RCAR_DRIF_SICTR_RX_RISING_EDGE          BIT(26)
 120#define RCAR_DRIF_SICTR_RX_EN                   BIT(8)
 121#define RCAR_DRIF_SICTR_RESET                   BIT(0)
 122
 123/* Constants */
 124#define RCAR_DRIF_NUM_HWBUFS                    32
 125#define RCAR_DRIF_MAX_DEVS                      4
 126#define RCAR_DRIF_DEFAULT_NUM_HWBUFS            16
 127#define RCAR_DRIF_DEFAULT_HWBUF_SIZE            (4 * PAGE_SIZE)
 128#define RCAR_DRIF_MAX_CHANNEL                   2
 129#define RCAR_SDR_BUFFER_SIZE                    SZ_64K
 130
 131/* Internal buffer status flags */
 132#define RCAR_DRIF_BUF_DONE                      BIT(0)  /* DMA completed */
 133#define RCAR_DRIF_BUF_OVERFLOW                  BIT(1)  /* Overflow detected */
 134
 135#define to_rcar_drif_buf_pair(sdr, ch_num, idx)                 \
 136        (&((sdr)->ch[!(ch_num)]->buf[(idx)]))
 137
 138#define for_each_rcar_drif_channel(ch, ch_mask)                 \
 139        for_each_set_bit(ch, ch_mask, RCAR_DRIF_MAX_CHANNEL)
 140
 141/* Debug */
 142#define rdrif_dbg(sdr, fmt, arg...)                             \
 143        dev_dbg(sdr->v4l2_dev.dev, fmt, ## arg)
 144
 145#define rdrif_err(sdr, fmt, arg...)                             \
 146        dev_err(sdr->v4l2_dev.dev, fmt, ## arg)
 147
 148/* Stream formats */
 149struct rcar_drif_format {
 150        u32     pixelformat;
 151        u32     buffersize;
 152        u32     bitlen;
 153        u32     wdcnt;
 154        u32     num_ch;
 155};
 156
 157/* Format descriptions for capture */
 158static const struct rcar_drif_format formats[] = {
 159        {
 160                .pixelformat    = V4L2_SDR_FMT_PCU16BE,
 161                .buffersize     = RCAR_SDR_BUFFER_SIZE,
 162                .bitlen         = 16,
 163                .wdcnt          = 1,
 164                .num_ch         = 2,
 165        },
 166        {
 167                .pixelformat    = V4L2_SDR_FMT_PCU18BE,
 168                .buffersize     = RCAR_SDR_BUFFER_SIZE,
 169                .bitlen         = 18,
 170                .wdcnt          = 1,
 171                .num_ch         = 2,
 172        },
 173        {
 174                .pixelformat    = V4L2_SDR_FMT_PCU20BE,
 175                .buffersize     = RCAR_SDR_BUFFER_SIZE,
 176                .bitlen         = 20,
 177                .wdcnt          = 1,
 178                .num_ch         = 2,
 179        },
 180};
 181
 182/* Buffer for a received frame from one or both internal channels */
 183struct rcar_drif_frame_buf {
 184        /* Common v4l buffer stuff -- must be first */
 185        struct vb2_v4l2_buffer vb;
 186        struct list_head list;
 187};
 188
 189/* OF graph endpoint's V4L2 async data */
 190struct rcar_drif_graph_ep {
 191        struct v4l2_subdev *subdev;     /* Async matched subdev */
 192        struct v4l2_async_subdev asd;   /* Async sub-device descriptor */
 193};
 194
 195/* DMA buffer */
 196struct rcar_drif_hwbuf {
 197        void *addr;                     /* CPU-side address */
 198        unsigned int status;            /* Buffer status flags */
 199};
 200
 201/* Internal channel */
 202struct rcar_drif {
 203        struct rcar_drif_sdr *sdr;      /* Group device */
 204        struct platform_device *pdev;   /* Channel's pdev */
 205        void __iomem *base;             /* Base register address */
 206        resource_size_t start;          /* I/O resource offset */
 207        struct dma_chan *dmach;         /* Reserved DMA channel */
 208        struct clk *clk;                /* Module clock */
 209        struct rcar_drif_hwbuf buf[RCAR_DRIF_NUM_HWBUFS]; /* H/W bufs */
 210        dma_addr_t dma_handle;          /* Handle for all bufs */
 211        unsigned int num;               /* Channel number */
 212        bool acting_sdr;                /* Channel acting as SDR device */
 213};
 214
 215/* DRIF V4L2 SDR */
 216struct rcar_drif_sdr {
 217        struct device *dev;             /* Platform device */
 218        struct video_device *vdev;      /* V4L2 SDR device */
 219        struct v4l2_device v4l2_dev;    /* V4L2 device */
 220
 221        /* Videobuf2 queue and queued buffers list */
 222        struct vb2_queue vb_queue;
 223        struct list_head queued_bufs;
 224        spinlock_t queued_bufs_lock;    /* Protects queued_bufs */
 225        spinlock_t dma_lock;            /* To serialize DMA cb of channels */
 226
 227        struct mutex v4l2_mutex;        /* To serialize ioctls */
 228        struct mutex vb_queue_mutex;    /* To serialize streaming ioctls */
 229        struct v4l2_ctrl_handler ctrl_hdl;      /* SDR control handler */
 230        struct v4l2_async_notifier notifier;    /* For subdev (tuner) */
 231        struct rcar_drif_graph_ep ep;   /* Endpoint V4L2 async data */
 232
 233        /* Current V4L2 SDR format ptr */
 234        const struct rcar_drif_format *fmt;
 235
 236        /* Device tree SYNC properties */
 237        u32 mdr1;
 238
 239        /* Internals */
 240        struct rcar_drif *ch[RCAR_DRIF_MAX_CHANNEL]; /* DRIFx0,1 */
 241        unsigned long hw_ch_mask;       /* Enabled channels per DT */
 242        unsigned long cur_ch_mask;      /* Used channels for an SDR FMT */
 243        u32 num_hw_ch;                  /* Num of DT enabled channels */
 244        u32 num_cur_ch;                 /* Num of used channels */
 245        u32 hwbuf_size;                 /* Each DMA buffer size */
 246        u32 produced;                   /* Buffers produced by sdr dev */
 247};
 248
 249/* Register access functions */
 250static void rcar_drif_write(struct rcar_drif *ch, u32 offset, u32 data)
 251{
 252        writel(data, ch->base + offset);
 253}
 254
 255static u32 rcar_drif_read(struct rcar_drif *ch, u32 offset)
 256{
 257        return readl(ch->base + offset);
 258}
 259
 260/* Release DMA channels */
 261static void rcar_drif_release_dmachannels(struct rcar_drif_sdr *sdr)
 262{
 263        unsigned int i;
 264
 265        for_each_rcar_drif_channel(i, &sdr->cur_ch_mask)
 266                if (sdr->ch[i]->dmach) {
 267                        dma_release_channel(sdr->ch[i]->dmach);
 268                        sdr->ch[i]->dmach = NULL;
 269                }
 270}
 271
 272/* Allocate DMA channels */
 273static int rcar_drif_alloc_dmachannels(struct rcar_drif_sdr *sdr)
 274{
 275        struct dma_slave_config dma_cfg;
 276        unsigned int i;
 277        int ret;
 278
 279        for_each_rcar_drif_channel(i, &sdr->cur_ch_mask) {
 280                struct rcar_drif *ch = sdr->ch[i];
 281
 282                ch->dmach = dma_request_slave_channel(&ch->pdev->dev, "rx");
 283                if (!ch->dmach) {
 284                        rdrif_err(sdr, "ch%u: dma channel req failed\n", i);
 285                        ret = -ENODEV;
 286                        goto dmach_error;
 287                }
 288
 289                /* Configure slave */
 290                memset(&dma_cfg, 0, sizeof(dma_cfg));
 291                dma_cfg.src_addr = (phys_addr_t)(ch->start + RCAR_DRIF_SIRFDR);
 292                dma_cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
 293                ret = dmaengine_slave_config(ch->dmach, &dma_cfg);
 294                if (ret) {
 295                        rdrif_err(sdr, "ch%u: dma slave config failed\n", i);
 296                        goto dmach_error;
 297                }
 298        }
 299        return 0;
 300
 301dmach_error:
 302        rcar_drif_release_dmachannels(sdr);
 303        return ret;
 304}
 305
 306/* Release queued vb2 buffers */
 307static void rcar_drif_release_queued_bufs(struct rcar_drif_sdr *sdr,
 308                                          enum vb2_buffer_state state)
 309{
 310        struct rcar_drif_frame_buf *fbuf, *tmp;
 311        unsigned long flags;
 312
 313        spin_lock_irqsave(&sdr->queued_bufs_lock, flags);
 314        list_for_each_entry_safe(fbuf, tmp, &sdr->queued_bufs, list) {
 315                list_del(&fbuf->list);
 316                vb2_buffer_done(&fbuf->vb.vb2_buf, state);
 317        }
 318        spin_unlock_irqrestore(&sdr->queued_bufs_lock, flags);
 319}
 320
 321/* Set MDR defaults */
 322static inline void rcar_drif_set_mdr1(struct rcar_drif_sdr *sdr)
 323{
 324        unsigned int i;
 325
 326        /* Set defaults for enabled internal channels */
 327        for_each_rcar_drif_channel(i, &sdr->cur_ch_mask) {
 328                /* Refer MSIOF section in manual for this register setting */
 329                rcar_drif_write(sdr->ch[i], RCAR_DRIF_SITMDR1,
 330                                RCAR_DRIF_SITMDR1_PCON);
 331
 332                /* Setup MDR1 value */
 333                rcar_drif_write(sdr->ch[i], RCAR_DRIF_SIRMDR1, sdr->mdr1);
 334
 335                rdrif_dbg(sdr, "ch%u: mdr1 = 0x%08x",
 336                          i, rcar_drif_read(sdr->ch[i], RCAR_DRIF_SIRMDR1));
 337        }
 338}
 339
 340/* Set DRIF receive format */
 341static int rcar_drif_set_format(struct rcar_drif_sdr *sdr)
 342{
 343        unsigned int i;
 344
 345        rdrif_dbg(sdr, "setfmt: bitlen %u wdcnt %u num_ch %u\n",
 346                  sdr->fmt->bitlen, sdr->fmt->wdcnt, sdr->fmt->num_ch);
 347
 348        /* Sanity check */
 349        if (sdr->fmt->num_ch > sdr->num_cur_ch) {
 350                rdrif_err(sdr, "fmt num_ch %u cur_ch %u mismatch\n",
 351                          sdr->fmt->num_ch, sdr->num_cur_ch);
 352                return -EINVAL;
 353        }
 354
 355        /* Setup group, bitlen & wdcnt */
 356        for_each_rcar_drif_channel(i, &sdr->cur_ch_mask) {
 357                u32 mdr;
 358
 359                /* Two groups */
 360                mdr = RCAR_DRIF_MDR_GRPCNT(2) |
 361                        RCAR_DRIF_MDR_BITLEN(sdr->fmt->bitlen) |
 362                        RCAR_DRIF_MDR_WDCNT(sdr->fmt->wdcnt);
 363                rcar_drif_write(sdr->ch[i], RCAR_DRIF_SIRMDR2, mdr);
 364
 365                mdr = RCAR_DRIF_MDR_BITLEN(sdr->fmt->bitlen) |
 366                        RCAR_DRIF_MDR_WDCNT(sdr->fmt->wdcnt);
 367                rcar_drif_write(sdr->ch[i], RCAR_DRIF_SIRMDR3, mdr);
 368
 369                rdrif_dbg(sdr, "ch%u: new mdr[2,3] = 0x%08x, 0x%08x\n",
 370                          i, rcar_drif_read(sdr->ch[i], RCAR_DRIF_SIRMDR2),
 371                          rcar_drif_read(sdr->ch[i], RCAR_DRIF_SIRMDR3));
 372        }
 373        return 0;
 374}
 375
 376/* Release DMA buffers */
 377static void rcar_drif_release_buf(struct rcar_drif_sdr *sdr)
 378{
 379        unsigned int i;
 380
 381        for_each_rcar_drif_channel(i, &sdr->cur_ch_mask) {
 382                struct rcar_drif *ch = sdr->ch[i];
 383
 384                /* First entry contains the dma buf ptr */
 385                if (ch->buf[0].addr) {
 386                        dma_free_coherent(&ch->pdev->dev,
 387                                sdr->hwbuf_size * RCAR_DRIF_NUM_HWBUFS,
 388                                ch->buf[0].addr, ch->dma_handle);
 389                        ch->buf[0].addr = NULL;
 390                }
 391        }
 392}
 393
 394/* Request DMA buffers */
 395static int rcar_drif_request_buf(struct rcar_drif_sdr *sdr)
 396{
 397        int ret = -ENOMEM;
 398        unsigned int i, j;
 399        void *addr;
 400
 401        for_each_rcar_drif_channel(i, &sdr->cur_ch_mask) {
 402                struct rcar_drif *ch = sdr->ch[i];
 403
 404                /* Allocate DMA buffers */
 405                addr = dma_alloc_coherent(&ch->pdev->dev,
 406                                sdr->hwbuf_size * RCAR_DRIF_NUM_HWBUFS,
 407                                &ch->dma_handle, GFP_KERNEL);
 408                if (!addr) {
 409                        rdrif_err(sdr,
 410                        "ch%u: dma alloc failed. num hwbufs %u size %u\n",
 411                        i, RCAR_DRIF_NUM_HWBUFS, sdr->hwbuf_size);
 412                        goto error;
 413                }
 414
 415                /* Split the chunk and populate bufctxt */
 416                for (j = 0; j < RCAR_DRIF_NUM_HWBUFS; j++) {
 417                        ch->buf[j].addr = addr + (j * sdr->hwbuf_size);
 418                        ch->buf[j].status = 0;
 419                }
 420        }
 421        return 0;
 422error:
 423        return ret;
 424}
 425
 426/* Setup vb_queue minimum buffer requirements */
 427static int rcar_drif_queue_setup(struct vb2_queue *vq,
 428                        unsigned int *num_buffers, unsigned int *num_planes,
 429                        unsigned int sizes[], struct device *alloc_devs[])
 430{
 431        struct rcar_drif_sdr *sdr = vb2_get_drv_priv(vq);
 432
 433        /* Need at least 16 buffers */
 434        if (vq->num_buffers + *num_buffers < 16)
 435                *num_buffers = 16 - vq->num_buffers;
 436
 437        *num_planes = 1;
 438        sizes[0] = PAGE_ALIGN(sdr->fmt->buffersize);
 439        rdrif_dbg(sdr, "num_bufs %d sizes[0] %d\n", *num_buffers, sizes[0]);
 440
 441        return 0;
 442}
 443
 444/* Enqueue buffer */
 445static void rcar_drif_buf_queue(struct vb2_buffer *vb)
 446{
 447        struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
 448        struct rcar_drif_sdr *sdr = vb2_get_drv_priv(vb->vb2_queue);
 449        struct rcar_drif_frame_buf *fbuf =
 450                        container_of(vbuf, struct rcar_drif_frame_buf, vb);
 451        unsigned long flags;
 452
 453        rdrif_dbg(sdr, "buf_queue idx %u\n", vb->index);
 454        spin_lock_irqsave(&sdr->queued_bufs_lock, flags);
 455        list_add_tail(&fbuf->list, &sdr->queued_bufs);
 456        spin_unlock_irqrestore(&sdr->queued_bufs_lock, flags);
 457}
 458
 459/* Get a frame buf from list */
 460static struct rcar_drif_frame_buf *
 461rcar_drif_get_fbuf(struct rcar_drif_sdr *sdr)
 462{
 463        struct rcar_drif_frame_buf *fbuf;
 464        unsigned long flags;
 465
 466        spin_lock_irqsave(&sdr->queued_bufs_lock, flags);
 467        fbuf = list_first_entry_or_null(&sdr->queued_bufs, struct
 468                                        rcar_drif_frame_buf, list);
 469        if (!fbuf) {
 470                /*
 471                 * App is late in enqueing buffers. Samples lost & there will
 472                 * be a gap in sequence number when app recovers
 473                 */
 474                rdrif_dbg(sdr, "\napp late: prod %u\n", sdr->produced);
 475                spin_unlock_irqrestore(&sdr->queued_bufs_lock, flags);
 476                return NULL;
 477        }
 478        list_del(&fbuf->list);
 479        spin_unlock_irqrestore(&sdr->queued_bufs_lock, flags);
 480
 481        return fbuf;
 482}
 483
 484/* Helpers to set/clear buf pair status */
 485static inline bool rcar_drif_bufs_done(struct rcar_drif_hwbuf **buf)
 486{
 487        return (buf[0]->status & buf[1]->status & RCAR_DRIF_BUF_DONE);
 488}
 489
 490static inline bool rcar_drif_bufs_overflow(struct rcar_drif_hwbuf **buf)
 491{
 492        return ((buf[0]->status | buf[1]->status) & RCAR_DRIF_BUF_OVERFLOW);
 493}
 494
 495static inline void rcar_drif_bufs_clear(struct rcar_drif_hwbuf **buf,
 496                                        unsigned int bit)
 497{
 498        unsigned int i;
 499
 500        for (i = 0; i < RCAR_DRIF_MAX_CHANNEL; i++)
 501                buf[i]->status &= ~bit;
 502}
 503
 504/* Channel DMA complete */
 505static void rcar_drif_channel_complete(struct rcar_drif *ch, u32 idx)
 506{
 507        u32 str;
 508
 509        ch->buf[idx].status |= RCAR_DRIF_BUF_DONE;
 510
 511        /* Check for DRIF errors */
 512        str = rcar_drif_read(ch, RCAR_DRIF_SISTR);
 513        if (unlikely(str & RCAR_DRIF_RFOVF)) {
 514                /* Writing the same clears it */
 515                rcar_drif_write(ch, RCAR_DRIF_SISTR, str);
 516
 517                /* Overflow: some samples are lost */
 518                ch->buf[idx].status |= RCAR_DRIF_BUF_OVERFLOW;
 519        }
 520}
 521
 522/* DMA callback for each stage */
 523static void rcar_drif_dma_complete(void *dma_async_param)
 524{
 525        struct rcar_drif *ch = dma_async_param;
 526        struct rcar_drif_sdr *sdr = ch->sdr;
 527        struct rcar_drif_hwbuf *buf[RCAR_DRIF_MAX_CHANNEL];
 528        struct rcar_drif_frame_buf *fbuf;
 529        bool overflow = false;
 530        u32 idx, produced;
 531        unsigned int i;
 532
 533        spin_lock(&sdr->dma_lock);
 534
 535        /* DMA can be terminated while the callback was waiting on lock */
 536        if (!vb2_is_streaming(&sdr->vb_queue)) {
 537                spin_unlock(&sdr->dma_lock);
 538                return;
 539        }
 540
 541        idx = sdr->produced % RCAR_DRIF_NUM_HWBUFS;
 542        rcar_drif_channel_complete(ch, idx);
 543
 544        if (sdr->num_cur_ch == RCAR_DRIF_MAX_CHANNEL) {
 545                buf[0] = ch->num ? to_rcar_drif_buf_pair(sdr, ch->num, idx) :
 546                                &ch->buf[idx];
 547                buf[1] = ch->num ? &ch->buf[idx] :
 548                                to_rcar_drif_buf_pair(sdr, ch->num, idx);
 549
 550                /* Check if both DMA buffers are done */
 551                if (!rcar_drif_bufs_done(buf)) {
 552                        spin_unlock(&sdr->dma_lock);
 553                        return;
 554                }
 555
 556                /* Clear buf done status */
 557                rcar_drif_bufs_clear(buf, RCAR_DRIF_BUF_DONE);
 558
 559                if (rcar_drif_bufs_overflow(buf)) {
 560                        overflow = true;
 561                        /* Clear the flag in status */
 562                        rcar_drif_bufs_clear(buf, RCAR_DRIF_BUF_OVERFLOW);
 563                }
 564        } else {
 565                buf[0] = &ch->buf[idx];
 566                if (buf[0]->status & RCAR_DRIF_BUF_OVERFLOW) {
 567                        overflow = true;
 568                        /* Clear the flag in status */
 569                        buf[0]->status &= ~RCAR_DRIF_BUF_OVERFLOW;
 570                }
 571        }
 572
 573        /* Buffer produced for consumption */
 574        produced = sdr->produced++;
 575        spin_unlock(&sdr->dma_lock);
 576
 577        rdrif_dbg(sdr, "ch%u: prod %u\n", ch->num, produced);
 578
 579        /* Get fbuf */
 580        fbuf = rcar_drif_get_fbuf(sdr);
 581        if (!fbuf)
 582                return;
 583
 584        for (i = 0; i < RCAR_DRIF_MAX_CHANNEL; i++)
 585                memcpy(vb2_plane_vaddr(&fbuf->vb.vb2_buf, 0) +
 586                       i * sdr->hwbuf_size, buf[i]->addr, sdr->hwbuf_size);
 587
 588        fbuf->vb.field = V4L2_FIELD_NONE;
 589        fbuf->vb.sequence = produced;
 590        fbuf->vb.vb2_buf.timestamp = ktime_get_ns();
 591        vb2_set_plane_payload(&fbuf->vb.vb2_buf, 0, sdr->fmt->buffersize);
 592
 593        /* Set error state on overflow */
 594        vb2_buffer_done(&fbuf->vb.vb2_buf,
 595                        overflow ? VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
 596}
 597
 598static int rcar_drif_qbuf(struct rcar_drif *ch)
 599{
 600        struct rcar_drif_sdr *sdr = ch->sdr;
 601        dma_addr_t addr = ch->dma_handle;
 602        struct dma_async_tx_descriptor *rxd;
 603        dma_cookie_t cookie;
 604        int ret = -EIO;
 605
 606        /* Setup cyclic DMA with given buffers */
 607        rxd = dmaengine_prep_dma_cyclic(ch->dmach, addr,
 608                                        sdr->hwbuf_size * RCAR_DRIF_NUM_HWBUFS,
 609                                        sdr->hwbuf_size, DMA_DEV_TO_MEM,
 610                                        DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 611        if (!rxd) {
 612                rdrif_err(sdr, "ch%u: prep dma cyclic failed\n", ch->num);
 613                return ret;
 614        }
 615
 616        /* Submit descriptor */
 617        rxd->callback = rcar_drif_dma_complete;
 618        rxd->callback_param = ch;
 619        cookie = dmaengine_submit(rxd);
 620        if (dma_submit_error(cookie)) {
 621                rdrif_err(sdr, "ch%u: dma submit failed\n", ch->num);
 622                return ret;
 623        }
 624
 625        dma_async_issue_pending(ch->dmach);
 626        return 0;
 627}
 628
 629/* Enable reception */
 630static int rcar_drif_enable_rx(struct rcar_drif_sdr *sdr)
 631{
 632        unsigned int i;
 633        u32 ctr;
 634        int ret = -EINVAL;
 635
 636        /*
 637         * When both internal channels are enabled, they can be synchronized
 638         * only by the master
 639         */
 640
 641        /* Enable receive */
 642        for_each_rcar_drif_channel(i, &sdr->cur_ch_mask) {
 643                ctr = rcar_drif_read(sdr->ch[i], RCAR_DRIF_SICTR);
 644                ctr |= (RCAR_DRIF_SICTR_RX_RISING_EDGE |
 645                         RCAR_DRIF_SICTR_RX_EN);
 646                rcar_drif_write(sdr->ch[i], RCAR_DRIF_SICTR, ctr);
 647        }
 648
 649        /* Check receive enabled */
 650        for_each_rcar_drif_channel(i, &sdr->cur_ch_mask) {
 651                ret = readl_poll_timeout(sdr->ch[i]->base + RCAR_DRIF_SICTR,
 652                                ctr, ctr & RCAR_DRIF_SICTR_RX_EN, 7, 100000);
 653                if (ret) {
 654                        rdrif_err(sdr, "ch%u: rx en failed. ctr 0x%08x\n", i,
 655                                  rcar_drif_read(sdr->ch[i], RCAR_DRIF_SICTR));
 656                        break;
 657                }
 658        }
 659        return ret;
 660}
 661
 662/* Disable reception */
 663static void rcar_drif_disable_rx(struct rcar_drif_sdr *sdr)
 664{
 665        unsigned int i;
 666        u32 ctr;
 667        int ret;
 668
 669        /* Disable receive */
 670        for_each_rcar_drif_channel(i, &sdr->cur_ch_mask) {
 671                ctr = rcar_drif_read(sdr->ch[i], RCAR_DRIF_SICTR);
 672                ctr &= ~RCAR_DRIF_SICTR_RX_EN;
 673                rcar_drif_write(sdr->ch[i], RCAR_DRIF_SICTR, ctr);
 674        }
 675
 676        /* Check receive disabled */
 677        for_each_rcar_drif_channel(i, &sdr->cur_ch_mask) {
 678                ret = readl_poll_timeout(sdr->ch[i]->base + RCAR_DRIF_SICTR,
 679                                ctr, !(ctr & RCAR_DRIF_SICTR_RX_EN), 7, 100000);
 680                if (ret)
 681                        dev_warn(&sdr->vdev->dev,
 682                        "ch%u: failed to disable rx. ctr 0x%08x\n",
 683                        i, rcar_drif_read(sdr->ch[i], RCAR_DRIF_SICTR));
 684        }
 685}
 686
 687/* Stop channel */
 688static void rcar_drif_stop_channel(struct rcar_drif *ch)
 689{
 690        /* Disable DMA receive interrupt */
 691        rcar_drif_write(ch, RCAR_DRIF_SIIER, 0x00000000);
 692
 693        /* Terminate all DMA transfers */
 694        dmaengine_terminate_sync(ch->dmach);
 695}
 696
 697/* Stop receive operation */
 698static void rcar_drif_stop(struct rcar_drif_sdr *sdr)
 699{
 700        unsigned int i;
 701
 702        /* Disable Rx */
 703        rcar_drif_disable_rx(sdr);
 704
 705        for_each_rcar_drif_channel(i, &sdr->cur_ch_mask)
 706                rcar_drif_stop_channel(sdr->ch[i]);
 707}
 708
 709/* Start channel */
 710static int rcar_drif_start_channel(struct rcar_drif *ch)
 711{
 712        struct rcar_drif_sdr *sdr = ch->sdr;
 713        u32 ctr, str;
 714        int ret;
 715
 716        /* Reset receive */
 717        rcar_drif_write(ch, RCAR_DRIF_SICTR, RCAR_DRIF_SICTR_RESET);
 718        ret = readl_poll_timeout(ch->base + RCAR_DRIF_SICTR, ctr,
 719                                 !(ctr & RCAR_DRIF_SICTR_RESET), 7, 100000);
 720        if (ret) {
 721                rdrif_err(sdr, "ch%u: failed to reset rx. ctr 0x%08x\n",
 722                          ch->num, rcar_drif_read(ch, RCAR_DRIF_SICTR));
 723                return ret;
 724        }
 725
 726        /* Queue buffers for DMA */
 727        ret = rcar_drif_qbuf(ch);
 728        if (ret)
 729                return ret;
 730
 731        /* Clear status register flags */
 732        str = RCAR_DRIF_RFFUL | RCAR_DRIF_REOF | RCAR_DRIF_RFSERR |
 733                RCAR_DRIF_RFUDF | RCAR_DRIF_RFOVF;
 734        rcar_drif_write(ch, RCAR_DRIF_SISTR, str);
 735
 736        /* Enable DMA receive interrupt */
 737        rcar_drif_write(ch, RCAR_DRIF_SIIER, 0x00009000);
 738
 739        return ret;
 740}
 741
 742/* Start receive operation */
 743static int rcar_drif_start(struct rcar_drif_sdr *sdr)
 744{
 745        unsigned long enabled = 0;
 746        unsigned int i;
 747        int ret;
 748
 749        for_each_rcar_drif_channel(i, &sdr->cur_ch_mask) {
 750                ret = rcar_drif_start_channel(sdr->ch[i]);
 751                if (ret)
 752                        goto start_error;
 753                enabled |= BIT(i);
 754        }
 755
 756        ret = rcar_drif_enable_rx(sdr);
 757        if (ret)
 758                goto enable_error;
 759
 760        sdr->produced = 0;
 761        return ret;
 762
 763enable_error:
 764        rcar_drif_disable_rx(sdr);
 765start_error:
 766        for_each_rcar_drif_channel(i, &enabled)
 767                rcar_drif_stop_channel(sdr->ch[i]);
 768
 769        return ret;
 770}
 771
 772/* Start streaming */
 773static int rcar_drif_start_streaming(struct vb2_queue *vq, unsigned int count)
 774{
 775        struct rcar_drif_sdr *sdr = vb2_get_drv_priv(vq);
 776        unsigned long enabled = 0;
 777        unsigned int i;
 778        int ret;
 779
 780        mutex_lock(&sdr->v4l2_mutex);
 781
 782        for_each_rcar_drif_channel(i, &sdr->cur_ch_mask) {
 783                ret = clk_prepare_enable(sdr->ch[i]->clk);
 784                if (ret)
 785                        goto error;
 786                enabled |= BIT(i);
 787        }
 788
 789        /* Set default MDRx settings */
 790        rcar_drif_set_mdr1(sdr);
 791
 792        /* Set new format */
 793        ret = rcar_drif_set_format(sdr);
 794        if (ret)
 795                goto error;
 796
 797        if (sdr->num_cur_ch == RCAR_DRIF_MAX_CHANNEL)
 798                sdr->hwbuf_size = sdr->fmt->buffersize / RCAR_DRIF_MAX_CHANNEL;
 799        else
 800                sdr->hwbuf_size = sdr->fmt->buffersize;
 801
 802        rdrif_dbg(sdr, "num hwbufs %u, hwbuf_size %u\n",
 803                RCAR_DRIF_NUM_HWBUFS, sdr->hwbuf_size);
 804
 805        /* Alloc DMA channel */
 806        ret = rcar_drif_alloc_dmachannels(sdr);
 807        if (ret)
 808                goto error;
 809
 810        /* Request buffers */
 811        ret = rcar_drif_request_buf(sdr);
 812        if (ret)
 813                goto error;
 814
 815        /* Start Rx */
 816        ret = rcar_drif_start(sdr);
 817        if (ret)
 818                goto error;
 819
 820        mutex_unlock(&sdr->v4l2_mutex);
 821
 822        return ret;
 823
 824error:
 825        rcar_drif_release_queued_bufs(sdr, VB2_BUF_STATE_QUEUED);
 826        rcar_drif_release_buf(sdr);
 827        rcar_drif_release_dmachannels(sdr);
 828        for_each_rcar_drif_channel(i, &enabled)
 829                clk_disable_unprepare(sdr->ch[i]->clk);
 830
 831        mutex_unlock(&sdr->v4l2_mutex);
 832
 833        return ret;
 834}
 835
 836/* Stop streaming */
 837static void rcar_drif_stop_streaming(struct vb2_queue *vq)
 838{
 839        struct rcar_drif_sdr *sdr = vb2_get_drv_priv(vq);
 840        unsigned int i;
 841
 842        mutex_lock(&sdr->v4l2_mutex);
 843
 844        /* Stop hardware streaming */
 845        rcar_drif_stop(sdr);
 846
 847        /* Return all queued buffers to vb2 */
 848        rcar_drif_release_queued_bufs(sdr, VB2_BUF_STATE_ERROR);
 849
 850        /* Release buf */
 851        rcar_drif_release_buf(sdr);
 852
 853        /* Release DMA channel resources */
 854        rcar_drif_release_dmachannels(sdr);
 855
 856        for_each_rcar_drif_channel(i, &sdr->cur_ch_mask)
 857                clk_disable_unprepare(sdr->ch[i]->clk);
 858
 859        mutex_unlock(&sdr->v4l2_mutex);
 860}
 861
 862/* Vb2 ops */
 863static const struct vb2_ops rcar_drif_vb2_ops = {
 864        .queue_setup            = rcar_drif_queue_setup,
 865        .buf_queue              = rcar_drif_buf_queue,
 866        .start_streaming        = rcar_drif_start_streaming,
 867        .stop_streaming         = rcar_drif_stop_streaming,
 868        .wait_prepare           = vb2_ops_wait_prepare,
 869        .wait_finish            = vb2_ops_wait_finish,
 870};
 871
 872static int rcar_drif_querycap(struct file *file, void *fh,
 873                              struct v4l2_capability *cap)
 874{
 875        struct rcar_drif_sdr *sdr = video_drvdata(file);
 876
 877        strscpy(cap->driver, KBUILD_MODNAME, sizeof(cap->driver));
 878        strscpy(cap->card, sdr->vdev->name, sizeof(cap->card));
 879        snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
 880                 sdr->vdev->name);
 881
 882        return 0;
 883}
 884
 885static int rcar_drif_set_default_format(struct rcar_drif_sdr *sdr)
 886{
 887        unsigned int i;
 888
 889        for (i = 0; i < ARRAY_SIZE(formats); i++) {
 890                /* Matching fmt based on required channels is set as default */
 891                if (sdr->num_hw_ch == formats[i].num_ch) {
 892                        sdr->fmt = &formats[i];
 893                        sdr->cur_ch_mask = sdr->hw_ch_mask;
 894                        sdr->num_cur_ch = sdr->num_hw_ch;
 895                        dev_dbg(sdr->dev, "default fmt[%u]: mask %lu num %u\n",
 896                                i, sdr->cur_ch_mask, sdr->num_cur_ch);
 897                        return 0;
 898                }
 899        }
 900        return -EINVAL;
 901}
 902
 903static int rcar_drif_enum_fmt_sdr_cap(struct file *file, void *priv,
 904                                      struct v4l2_fmtdesc *f)
 905{
 906        if (f->index >= ARRAY_SIZE(formats))
 907                return -EINVAL;
 908
 909        f->pixelformat = formats[f->index].pixelformat;
 910
 911        return 0;
 912}
 913
 914static int rcar_drif_g_fmt_sdr_cap(struct file *file, void *priv,
 915                                   struct v4l2_format *f)
 916{
 917        struct rcar_drif_sdr *sdr = video_drvdata(file);
 918
 919        f->fmt.sdr.pixelformat = sdr->fmt->pixelformat;
 920        f->fmt.sdr.buffersize = sdr->fmt->buffersize;
 921
 922        return 0;
 923}
 924
 925static int rcar_drif_s_fmt_sdr_cap(struct file *file, void *priv,
 926                                   struct v4l2_format *f)
 927{
 928        struct rcar_drif_sdr *sdr = video_drvdata(file);
 929        struct vb2_queue *q = &sdr->vb_queue;
 930        unsigned int i;
 931
 932        if (vb2_is_busy(q))
 933                return -EBUSY;
 934
 935        for (i = 0; i < ARRAY_SIZE(formats); i++) {
 936                if (formats[i].pixelformat == f->fmt.sdr.pixelformat)
 937                        break;
 938        }
 939
 940        if (i == ARRAY_SIZE(formats))
 941                i = 0;          /* Set the 1st format as default on no match */
 942
 943        sdr->fmt = &formats[i];
 944        f->fmt.sdr.pixelformat = sdr->fmt->pixelformat;
 945        f->fmt.sdr.buffersize = formats[i].buffersize;
 946        memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved));
 947
 948        /*
 949         * If a format demands one channel only out of two
 950         * enabled channels, pick the 0th channel.
 951         */
 952        if (formats[i].num_ch < sdr->num_hw_ch) {
 953                sdr->cur_ch_mask = BIT(0);
 954                sdr->num_cur_ch = formats[i].num_ch;
 955        } else {
 956                sdr->cur_ch_mask = sdr->hw_ch_mask;
 957                sdr->num_cur_ch = sdr->num_hw_ch;
 958        }
 959
 960        rdrif_dbg(sdr, "cur: idx %u mask %lu num %u\n",
 961                  i, sdr->cur_ch_mask, sdr->num_cur_ch);
 962
 963        return 0;
 964}
 965
 966static int rcar_drif_try_fmt_sdr_cap(struct file *file, void *priv,
 967                                     struct v4l2_format *f)
 968{
 969        unsigned int i;
 970
 971        for (i = 0; i < ARRAY_SIZE(formats); i++) {
 972                if (formats[i].pixelformat == f->fmt.sdr.pixelformat) {
 973                        f->fmt.sdr.buffersize = formats[i].buffersize;
 974                        return 0;
 975                }
 976        }
 977
 978        f->fmt.sdr.pixelformat = formats[0].pixelformat;
 979        f->fmt.sdr.buffersize = formats[0].buffersize;
 980        memset(f->fmt.sdr.reserved, 0, sizeof(f->fmt.sdr.reserved));
 981
 982        return 0;
 983}
 984
 985/* Tuner subdev ioctls */
 986static int rcar_drif_enum_freq_bands(struct file *file, void *priv,
 987                                     struct v4l2_frequency_band *band)
 988{
 989        struct rcar_drif_sdr *sdr = video_drvdata(file);
 990
 991        return v4l2_subdev_call(sdr->ep.subdev, tuner, enum_freq_bands, band);
 992}
 993
 994static int rcar_drif_g_frequency(struct file *file, void *priv,
 995                                 struct v4l2_frequency *f)
 996{
 997        struct rcar_drif_sdr *sdr = video_drvdata(file);
 998
 999        return v4l2_subdev_call(sdr->ep.subdev, tuner, g_frequency, f);
1000}
1001
1002static int rcar_drif_s_frequency(struct file *file, void *priv,
1003                                 const struct v4l2_frequency *f)
1004{
1005        struct rcar_drif_sdr *sdr = video_drvdata(file);
1006
1007        return v4l2_subdev_call(sdr->ep.subdev, tuner, s_frequency, f);
1008}
1009
1010static int rcar_drif_g_tuner(struct file *file, void *priv,
1011                             struct v4l2_tuner *vt)
1012{
1013        struct rcar_drif_sdr *sdr = video_drvdata(file);
1014
1015        return v4l2_subdev_call(sdr->ep.subdev, tuner, g_tuner, vt);
1016}
1017
1018static int rcar_drif_s_tuner(struct file *file, void *priv,
1019                             const struct v4l2_tuner *vt)
1020{
1021        struct rcar_drif_sdr *sdr = video_drvdata(file);
1022
1023        return v4l2_subdev_call(sdr->ep.subdev, tuner, s_tuner, vt);
1024}
1025
1026static const struct v4l2_ioctl_ops rcar_drif_ioctl_ops = {
1027        .vidioc_querycap          = rcar_drif_querycap,
1028
1029        .vidioc_enum_fmt_sdr_cap  = rcar_drif_enum_fmt_sdr_cap,
1030        .vidioc_g_fmt_sdr_cap     = rcar_drif_g_fmt_sdr_cap,
1031        .vidioc_s_fmt_sdr_cap     = rcar_drif_s_fmt_sdr_cap,
1032        .vidioc_try_fmt_sdr_cap   = rcar_drif_try_fmt_sdr_cap,
1033
1034        .vidioc_reqbufs           = vb2_ioctl_reqbufs,
1035        .vidioc_create_bufs       = vb2_ioctl_create_bufs,
1036        .vidioc_prepare_buf       = vb2_ioctl_prepare_buf,
1037        .vidioc_querybuf          = vb2_ioctl_querybuf,
1038        .vidioc_qbuf              = vb2_ioctl_qbuf,
1039        .vidioc_dqbuf             = vb2_ioctl_dqbuf,
1040
1041        .vidioc_streamon          = vb2_ioctl_streamon,
1042        .vidioc_streamoff         = vb2_ioctl_streamoff,
1043
1044        .vidioc_s_frequency       = rcar_drif_s_frequency,
1045        .vidioc_g_frequency       = rcar_drif_g_frequency,
1046        .vidioc_s_tuner           = rcar_drif_s_tuner,
1047        .vidioc_g_tuner           = rcar_drif_g_tuner,
1048        .vidioc_enum_freq_bands   = rcar_drif_enum_freq_bands,
1049        .vidioc_subscribe_event   = v4l2_ctrl_subscribe_event,
1050        .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1051        .vidioc_log_status        = v4l2_ctrl_log_status,
1052};
1053
1054static const struct v4l2_file_operations rcar_drif_fops = {
1055        .owner                    = THIS_MODULE,
1056        .open                     = v4l2_fh_open,
1057        .release                  = vb2_fop_release,
1058        .read                     = vb2_fop_read,
1059        .poll                     = vb2_fop_poll,
1060        .mmap                     = vb2_fop_mmap,
1061        .unlocked_ioctl           = video_ioctl2,
1062};
1063
1064static int rcar_drif_sdr_register(struct rcar_drif_sdr *sdr)
1065{
1066        int ret;
1067
1068        /* Init video_device structure */
1069        sdr->vdev = video_device_alloc();
1070        if (!sdr->vdev)
1071                return -ENOMEM;
1072
1073        snprintf(sdr->vdev->name, sizeof(sdr->vdev->name), "R-Car DRIF");
1074        sdr->vdev->fops = &rcar_drif_fops;
1075        sdr->vdev->ioctl_ops = &rcar_drif_ioctl_ops;
1076        sdr->vdev->release = video_device_release;
1077        sdr->vdev->lock = &sdr->v4l2_mutex;
1078        sdr->vdev->queue = &sdr->vb_queue;
1079        sdr->vdev->queue->lock = &sdr->vb_queue_mutex;
1080        sdr->vdev->ctrl_handler = &sdr->ctrl_hdl;
1081        sdr->vdev->v4l2_dev = &sdr->v4l2_dev;
1082        sdr->vdev->device_caps = V4L2_CAP_SDR_CAPTURE | V4L2_CAP_TUNER |
1083                V4L2_CAP_STREAMING | V4L2_CAP_READWRITE;
1084        video_set_drvdata(sdr->vdev, sdr);
1085
1086        /* Register V4L2 SDR device */
1087        ret = video_register_device(sdr->vdev, VFL_TYPE_SDR, -1);
1088        if (ret) {
1089                video_device_release(sdr->vdev);
1090                sdr->vdev = NULL;
1091                dev_err(sdr->dev, "failed video_register_device (%d)\n", ret);
1092        }
1093
1094        return ret;
1095}
1096
1097static void rcar_drif_sdr_unregister(struct rcar_drif_sdr *sdr)
1098{
1099        video_unregister_device(sdr->vdev);
1100        sdr->vdev = NULL;
1101}
1102
1103/* Sub-device bound callback */
1104static int rcar_drif_notify_bound(struct v4l2_async_notifier *notifier,
1105                                   struct v4l2_subdev *subdev,
1106                                   struct v4l2_async_subdev *asd)
1107{
1108        struct rcar_drif_sdr *sdr =
1109                container_of(notifier, struct rcar_drif_sdr, notifier);
1110
1111        if (sdr->ep.asd.match.fwnode !=
1112            of_fwnode_handle(subdev->dev->of_node)) {
1113                rdrif_err(sdr, "subdev %s cannot bind\n", subdev->name);
1114                return -EINVAL;
1115        }
1116
1117        v4l2_set_subdev_hostdata(subdev, sdr);
1118        sdr->ep.subdev = subdev;
1119        rdrif_dbg(sdr, "bound asd %s\n", subdev->name);
1120
1121        return 0;
1122}
1123
1124/* Sub-device unbind callback */
1125static void rcar_drif_notify_unbind(struct v4l2_async_notifier *notifier,
1126                                   struct v4l2_subdev *subdev,
1127                                   struct v4l2_async_subdev *asd)
1128{
1129        struct rcar_drif_sdr *sdr =
1130                container_of(notifier, struct rcar_drif_sdr, notifier);
1131
1132        if (sdr->ep.subdev != subdev) {
1133                rdrif_err(sdr, "subdev %s is not bound\n", subdev->name);
1134                return;
1135        }
1136
1137        /* Free ctrl handler if initialized */
1138        v4l2_ctrl_handler_free(&sdr->ctrl_hdl);
1139        sdr->v4l2_dev.ctrl_handler = NULL;
1140        sdr->ep.subdev = NULL;
1141
1142        rcar_drif_sdr_unregister(sdr);
1143        rdrif_dbg(sdr, "unbind asd %s\n", subdev->name);
1144}
1145
1146/* Sub-device registered notification callback */
1147static int rcar_drif_notify_complete(struct v4l2_async_notifier *notifier)
1148{
1149        struct rcar_drif_sdr *sdr =
1150                container_of(notifier, struct rcar_drif_sdr, notifier);
1151        int ret;
1152
1153        /*
1154         * The subdev tested at this point uses 4 controls. Using 10 as a worst
1155         * case scenario hint. When less controls are needed there will be some
1156         * unused memory and when more controls are needed the framework uses
1157         * hash to manage controls within this number.
1158         */
1159        ret = v4l2_ctrl_handler_init(&sdr->ctrl_hdl, 10);
1160        if (ret)
1161                return -ENOMEM;
1162
1163        sdr->v4l2_dev.ctrl_handler = &sdr->ctrl_hdl;
1164        ret = v4l2_device_register_subdev_nodes(&sdr->v4l2_dev);
1165        if (ret) {
1166                rdrif_err(sdr, "failed: register subdev nodes ret %d\n", ret);
1167                goto error;
1168        }
1169
1170        ret = v4l2_ctrl_add_handler(&sdr->ctrl_hdl,
1171                                    sdr->ep.subdev->ctrl_handler, NULL, true);
1172        if (ret) {
1173                rdrif_err(sdr, "failed: ctrl add hdlr ret %d\n", ret);
1174                goto error;
1175        }
1176
1177        ret = rcar_drif_sdr_register(sdr);
1178        if (ret)
1179                goto error;
1180
1181        return ret;
1182
1183error:
1184        v4l2_ctrl_handler_free(&sdr->ctrl_hdl);
1185
1186        return ret;
1187}
1188
1189static const struct v4l2_async_notifier_operations rcar_drif_notify_ops = {
1190        .bound = rcar_drif_notify_bound,
1191        .unbind = rcar_drif_notify_unbind,
1192        .complete = rcar_drif_notify_complete,
1193};
1194
1195/* Read endpoint properties */
1196static void rcar_drif_get_ep_properties(struct rcar_drif_sdr *sdr,
1197                                        struct fwnode_handle *fwnode)
1198{
1199        u32 val;
1200
1201        /* Set the I2S defaults for SIRMDR1*/
1202        sdr->mdr1 = RCAR_DRIF_SIRMDR1_SYNCMD_LR | RCAR_DRIF_SIRMDR1_MSB_FIRST |
1203                RCAR_DRIF_SIRMDR1_DTDL_1 | RCAR_DRIF_SIRMDR1_SYNCDL_0;
1204
1205        /* Parse sync polarity from endpoint */
1206        if (!fwnode_property_read_u32(fwnode, "sync-active", &val))
1207                sdr->mdr1 |= val ? RCAR_DRIF_SIRMDR1_SYNCAC_POL_HIGH :
1208                        RCAR_DRIF_SIRMDR1_SYNCAC_POL_LOW;
1209        else
1210                sdr->mdr1 |= RCAR_DRIF_SIRMDR1_SYNCAC_POL_HIGH; /* default */
1211
1212        dev_dbg(sdr->dev, "mdr1 0x%08x\n", sdr->mdr1);
1213}
1214
1215/* Parse sub-devs (tuner) to find a matching device */
1216static int rcar_drif_parse_subdevs(struct rcar_drif_sdr *sdr)
1217{
1218        struct v4l2_async_notifier *notifier = &sdr->notifier;
1219        struct fwnode_handle *fwnode, *ep;
1220
1221        notifier->subdevs = devm_kzalloc(sdr->dev, sizeof(*notifier->subdevs),
1222                                         GFP_KERNEL);
1223        if (!notifier->subdevs)
1224                return -ENOMEM;
1225
1226        ep = fwnode_graph_get_next_endpoint(of_fwnode_handle(sdr->dev->of_node),
1227                                            NULL);
1228        if (!ep)
1229                return 0;
1230
1231        notifier->subdevs[notifier->num_subdevs] = &sdr->ep.asd;
1232        fwnode = fwnode_graph_get_remote_port_parent(ep);
1233        if (!fwnode) {
1234                dev_warn(sdr->dev, "bad remote port parent\n");
1235                fwnode_handle_put(ep);
1236                return -EINVAL;
1237        }
1238
1239        sdr->ep.asd.match.fwnode = fwnode;
1240        sdr->ep.asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
1241        notifier->num_subdevs++;
1242
1243        /* Get the endpoint properties */
1244        rcar_drif_get_ep_properties(sdr, ep);
1245
1246        fwnode_handle_put(fwnode);
1247        fwnode_handle_put(ep);
1248
1249        return 0;
1250}
1251
1252/* Check if the given device is the primary bond */
1253static bool rcar_drif_primary_bond(struct platform_device *pdev)
1254{
1255        return of_property_read_bool(pdev->dev.of_node, "renesas,primary-bond");
1256}
1257
1258/* Check if both devices of the bond are enabled */
1259static struct device_node *rcar_drif_bond_enabled(struct platform_device *p)
1260{
1261        struct device_node *np;
1262
1263        np = of_parse_phandle(p->dev.of_node, "renesas,bonding", 0);
1264        if (np && of_device_is_available(np))
1265                return np;
1266
1267        return NULL;
1268}
1269
1270/* Check if the bonded device is probed */
1271static int rcar_drif_bond_available(struct rcar_drif_sdr *sdr,
1272                                    struct device_node *np)
1273{
1274        struct platform_device *pdev;
1275        struct rcar_drif *ch;
1276        int ret = 0;
1277
1278        pdev = of_find_device_by_node(np);
1279        if (!pdev) {
1280                dev_err(sdr->dev, "failed to get bonded device from node\n");
1281                return -ENODEV;
1282        }
1283
1284        device_lock(&pdev->dev);
1285        ch = platform_get_drvdata(pdev);
1286        if (ch) {
1287                /* Update sdr data in the bonded device */
1288                ch->sdr = sdr;
1289
1290                /* Update sdr with bonded device data */
1291                sdr->ch[ch->num] = ch;
1292                sdr->hw_ch_mask |= BIT(ch->num);
1293        } else {
1294                /* Defer */
1295                dev_info(sdr->dev, "defer probe\n");
1296                ret = -EPROBE_DEFER;
1297        }
1298        device_unlock(&pdev->dev);
1299
1300        put_device(&pdev->dev);
1301
1302        return ret;
1303}
1304
1305/* V4L2 SDR device probe */
1306static int rcar_drif_sdr_probe(struct rcar_drif_sdr *sdr)
1307{
1308        int ret;
1309
1310        /* Validate any supported format for enabled channels */
1311        ret = rcar_drif_set_default_format(sdr);
1312        if (ret) {
1313                dev_err(sdr->dev, "failed to set default format\n");
1314                return ret;
1315        }
1316
1317        /* Set defaults */
1318        sdr->hwbuf_size = RCAR_DRIF_DEFAULT_HWBUF_SIZE;
1319
1320        mutex_init(&sdr->v4l2_mutex);
1321        mutex_init(&sdr->vb_queue_mutex);
1322        spin_lock_init(&sdr->queued_bufs_lock);
1323        spin_lock_init(&sdr->dma_lock);
1324        INIT_LIST_HEAD(&sdr->queued_bufs);
1325
1326        /* Init videobuf2 queue structure */
1327        sdr->vb_queue.type = V4L2_BUF_TYPE_SDR_CAPTURE;
1328        sdr->vb_queue.io_modes = VB2_READ | VB2_MMAP | VB2_DMABUF;
1329        sdr->vb_queue.drv_priv = sdr;
1330        sdr->vb_queue.buf_struct_size = sizeof(struct rcar_drif_frame_buf);
1331        sdr->vb_queue.ops = &rcar_drif_vb2_ops;
1332        sdr->vb_queue.mem_ops = &vb2_vmalloc_memops;
1333        sdr->vb_queue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1334
1335        /* Init videobuf2 queue */
1336        ret = vb2_queue_init(&sdr->vb_queue);
1337        if (ret) {
1338                dev_err(sdr->dev, "failed: vb2_queue_init ret %d\n", ret);
1339                return ret;
1340        }
1341
1342        /* Register the v4l2_device */
1343        ret = v4l2_device_register(sdr->dev, &sdr->v4l2_dev);
1344        if (ret) {
1345                dev_err(sdr->dev, "failed: v4l2_device_register ret %d\n", ret);
1346                return ret;
1347        }
1348
1349        /*
1350         * Parse subdevs after v4l2_device_register because if the subdev
1351         * is already probed, bound and complete will be called immediately
1352         */
1353        ret = rcar_drif_parse_subdevs(sdr);
1354        if (ret)
1355                goto error;
1356
1357        sdr->notifier.ops = &rcar_drif_notify_ops;
1358
1359        /* Register notifier */
1360        ret = v4l2_async_notifier_register(&sdr->v4l2_dev, &sdr->notifier);
1361        if (ret < 0) {
1362                dev_err(sdr->dev, "failed: notifier register ret %d\n", ret);
1363                goto error;
1364        }
1365
1366        return ret;
1367
1368error:
1369        v4l2_device_unregister(&sdr->v4l2_dev);
1370
1371        return ret;
1372}
1373
1374/* V4L2 SDR device remove */
1375static void rcar_drif_sdr_remove(struct rcar_drif_sdr *sdr)
1376{
1377        v4l2_async_notifier_unregister(&sdr->notifier);
1378        v4l2_device_unregister(&sdr->v4l2_dev);
1379}
1380
1381/* DRIF channel probe */
1382static int rcar_drif_probe(struct platform_device *pdev)
1383{
1384        struct rcar_drif_sdr *sdr;
1385        struct device_node *np;
1386        struct rcar_drif *ch;
1387        struct resource *res;
1388        int ret;
1389
1390        /* Reserve memory for enabled channel */
1391        ch = devm_kzalloc(&pdev->dev, sizeof(*ch), GFP_KERNEL);
1392        if (!ch)
1393                return -ENOMEM;
1394
1395        ch->pdev = pdev;
1396
1397        /* Module clock */
1398        ch->clk = devm_clk_get(&pdev->dev, "fck");
1399        if (IS_ERR(ch->clk)) {
1400                ret = PTR_ERR(ch->clk);
1401                dev_err(&pdev->dev, "clk get failed (%d)\n", ret);
1402                return ret;
1403        }
1404
1405        /* Register map */
1406        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1407        ch->base = devm_ioremap_resource(&pdev->dev, res);
1408        if (IS_ERR(ch->base)) {
1409                ret = PTR_ERR(ch->base);
1410                dev_err(&pdev->dev, "ioremap failed (%d)\n", ret);
1411                return ret;
1412        }
1413        ch->start = res->start;
1414        platform_set_drvdata(pdev, ch);
1415
1416        /* Check if both channels of the bond are enabled */
1417        np = rcar_drif_bond_enabled(pdev);
1418        if (np) {
1419                /* Check if current channel acting as primary-bond */
1420                if (!rcar_drif_primary_bond(pdev)) {
1421                        ch->num = 1;    /* Primary bond is channel 0 always */
1422                        of_node_put(np);
1423                        return 0;
1424                }
1425        }
1426
1427        /* Reserve memory for SDR structure */
1428        sdr = devm_kzalloc(&pdev->dev, sizeof(*sdr), GFP_KERNEL);
1429        if (!sdr) {
1430                of_node_put(np);
1431                return -ENOMEM;
1432        }
1433        ch->sdr = sdr;
1434        sdr->dev = &pdev->dev;
1435
1436        /* Establish links between SDR and channel(s) */
1437        sdr->ch[ch->num] = ch;
1438        sdr->hw_ch_mask = BIT(ch->num);
1439        if (np) {
1440                /* Check if bonded device is ready */
1441                ret = rcar_drif_bond_available(sdr, np);
1442                of_node_put(np);
1443                if (ret)
1444                        return ret;
1445        }
1446        sdr->num_hw_ch = hweight_long(sdr->hw_ch_mask);
1447
1448        return rcar_drif_sdr_probe(sdr);
1449}
1450
1451/* DRIF channel remove */
1452static int rcar_drif_remove(struct platform_device *pdev)
1453{
1454        struct rcar_drif *ch = platform_get_drvdata(pdev);
1455        struct rcar_drif_sdr *sdr = ch->sdr;
1456
1457        /* Channel 0 will be the SDR instance */
1458        if (ch->num)
1459                return 0;
1460
1461        /* SDR instance */
1462        rcar_drif_sdr_remove(sdr);
1463
1464        return 0;
1465}
1466
1467/* FIXME: Implement suspend/resume support */
1468static int __maybe_unused rcar_drif_suspend(struct device *dev)
1469{
1470        return 0;
1471}
1472
1473static int __maybe_unused rcar_drif_resume(struct device *dev)
1474{
1475        return 0;
1476}
1477
1478static SIMPLE_DEV_PM_OPS(rcar_drif_pm_ops, rcar_drif_suspend,
1479                         rcar_drif_resume);
1480
1481static const struct of_device_id rcar_drif_of_table[] = {
1482        { .compatible = "renesas,rcar-gen3-drif" },
1483        { }
1484};
1485MODULE_DEVICE_TABLE(of, rcar_drif_of_table);
1486
1487#define RCAR_DRIF_DRV_NAME "rcar_drif"
1488static struct platform_driver rcar_drif_driver = {
1489        .driver = {
1490                .name = RCAR_DRIF_DRV_NAME,
1491                .of_match_table = of_match_ptr(rcar_drif_of_table),
1492                .pm = &rcar_drif_pm_ops,
1493                },
1494        .probe = rcar_drif_probe,
1495        .remove = rcar_drif_remove,
1496};
1497
1498module_platform_driver(rcar_drif_driver);
1499
1500MODULE_DESCRIPTION("Renesas R-Car Gen3 DRIF driver");
1501MODULE_ALIAS("platform:" RCAR_DRIF_DRV_NAME);
1502MODULE_LICENSE("GPL v2");
1503MODULE_AUTHOR("Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>");
1504