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16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/err.h>
20#include <linux/of.h>
21#include <linux/platform_device.h>
22#include <linux/regulator/driver.h>
23#include <linux/regulator/machine.h>
24#include <linux/slab.h>
25#include <linux/gpio.h>
26#include <linux/mfd/tps65910.h>
27#include <linux/regulator/of_regulator.h>
28
29#define TPS65910_SUPPLY_STATE_ENABLED 0x1
30#define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
31 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
32 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
33 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
34
35
36static const unsigned int VIO_VSEL_table[] = {
37 1500000, 1800000, 2500000, 3300000,
38};
39
40
41
42
43static const unsigned int VRTC_VSEL_table[] = {
44 1800000,
45};
46
47
48static const unsigned int VDD3_VSEL_table[] = {
49 5000000,
50};
51
52
53static const unsigned int VDIG1_VSEL_table[] = {
54 1200000, 1500000, 1800000, 2700000,
55};
56
57
58static const unsigned int VDIG2_VSEL_table[] = {
59 1000000, 1100000, 1200000, 1800000,
60};
61
62
63static const unsigned int VPLL_VSEL_table[] = {
64 1000000, 1100000, 1800000, 2500000,
65};
66
67
68static const unsigned int VDAC_VSEL_table[] = {
69 1800000, 2600000, 2800000, 2850000,
70};
71
72
73static const unsigned int VAUX1_VSEL_table[] = {
74 1800000, 2500000, 2800000, 2850000,
75};
76
77
78static const unsigned int VAUX2_VSEL_table[] = {
79 1800000, 2800000, 2900000, 3300000,
80};
81
82
83static const unsigned int VAUX33_VSEL_table[] = {
84 1800000, 2000000, 2800000, 3300000,
85};
86
87
88static const unsigned int VMMC_VSEL_table[] = {
89 1800000, 2800000, 3000000, 3300000,
90};
91
92
93static const unsigned int VBB_VSEL_table[] = {
94 3000000, 2520000, 3150000, 5000000,
95};
96
97struct tps_info {
98 const char *name;
99 const char *vin_name;
100 u8 n_voltages;
101 const unsigned int *voltage_table;
102 int enable_time_us;
103};
104
105static struct tps_info tps65910_regs[] = {
106 {
107 .name = "vrtc",
108 .vin_name = "vcc7",
109 .n_voltages = ARRAY_SIZE(VRTC_VSEL_table),
110 .voltage_table = VRTC_VSEL_table,
111 .enable_time_us = 2200,
112 },
113 {
114 .name = "vio",
115 .vin_name = "vccio",
116 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
117 .voltage_table = VIO_VSEL_table,
118 .enable_time_us = 350,
119 },
120 {
121 .name = "vdd1",
122 .vin_name = "vcc1",
123 .enable_time_us = 350,
124 },
125 {
126 .name = "vdd2",
127 .vin_name = "vcc2",
128 .enable_time_us = 350,
129 },
130 {
131 .name = "vdd3",
132 .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
133 .voltage_table = VDD3_VSEL_table,
134 .enable_time_us = 200,
135 },
136 {
137 .name = "vdig1",
138 .vin_name = "vcc6",
139 .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
140 .voltage_table = VDIG1_VSEL_table,
141 .enable_time_us = 100,
142 },
143 {
144 .name = "vdig2",
145 .vin_name = "vcc6",
146 .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
147 .voltage_table = VDIG2_VSEL_table,
148 .enable_time_us = 100,
149 },
150 {
151 .name = "vpll",
152 .vin_name = "vcc5",
153 .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
154 .voltage_table = VPLL_VSEL_table,
155 .enable_time_us = 100,
156 },
157 {
158 .name = "vdac",
159 .vin_name = "vcc5",
160 .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
161 .voltage_table = VDAC_VSEL_table,
162 .enable_time_us = 100,
163 },
164 {
165 .name = "vaux1",
166 .vin_name = "vcc4",
167 .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
168 .voltage_table = VAUX1_VSEL_table,
169 .enable_time_us = 100,
170 },
171 {
172 .name = "vaux2",
173 .vin_name = "vcc4",
174 .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
175 .voltage_table = VAUX2_VSEL_table,
176 .enable_time_us = 100,
177 },
178 {
179 .name = "vaux33",
180 .vin_name = "vcc3",
181 .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
182 .voltage_table = VAUX33_VSEL_table,
183 .enable_time_us = 100,
184 },
185 {
186 .name = "vmmc",
187 .vin_name = "vcc3",
188 .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
189 .voltage_table = VMMC_VSEL_table,
190 .enable_time_us = 100,
191 },
192 {
193 .name = "vbb",
194 .vin_name = "vcc7",
195 .n_voltages = ARRAY_SIZE(VBB_VSEL_table),
196 .voltage_table = VBB_VSEL_table,
197 },
198};
199
200static struct tps_info tps65911_regs[] = {
201 {
202 .name = "vrtc",
203 .vin_name = "vcc7",
204 .enable_time_us = 2200,
205 },
206 {
207 .name = "vio",
208 .vin_name = "vccio",
209 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
210 .voltage_table = VIO_VSEL_table,
211 .enable_time_us = 350,
212 },
213 {
214 .name = "vdd1",
215 .vin_name = "vcc1",
216 .n_voltages = 0x4C,
217 .enable_time_us = 350,
218 },
219 {
220 .name = "vdd2",
221 .vin_name = "vcc2",
222 .n_voltages = 0x4C,
223 .enable_time_us = 350,
224 },
225 {
226 .name = "vddctrl",
227 .n_voltages = 0x44,
228 .enable_time_us = 900,
229 },
230 {
231 .name = "ldo1",
232 .vin_name = "vcc6",
233 .n_voltages = 0x33,
234 .enable_time_us = 420,
235 },
236 {
237 .name = "ldo2",
238 .vin_name = "vcc6",
239 .n_voltages = 0x33,
240 .enable_time_us = 420,
241 },
242 {
243 .name = "ldo3",
244 .vin_name = "vcc5",
245 .n_voltages = 0x1A,
246 .enable_time_us = 230,
247 },
248 {
249 .name = "ldo4",
250 .vin_name = "vcc5",
251 .n_voltages = 0x33,
252 .enable_time_us = 230,
253 },
254 {
255 .name = "ldo5",
256 .vin_name = "vcc4",
257 .n_voltages = 0x1A,
258 .enable_time_us = 230,
259 },
260 {
261 .name = "ldo6",
262 .vin_name = "vcc3",
263 .n_voltages = 0x1A,
264 .enable_time_us = 230,
265 },
266 {
267 .name = "ldo7",
268 .vin_name = "vcc3",
269 .n_voltages = 0x1A,
270 .enable_time_us = 230,
271 },
272 {
273 .name = "ldo8",
274 .vin_name = "vcc3",
275 .n_voltages = 0x1A,
276 .enable_time_us = 230,
277 },
278};
279
280#define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
281static unsigned int tps65910_ext_sleep_control[] = {
282 0,
283 EXT_CONTROL_REG_BITS(VIO, 1, 0),
284 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
285 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
286 EXT_CONTROL_REG_BITS(VDD3, 1, 3),
287 EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
288 EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
289 EXT_CONTROL_REG_BITS(VPLL, 0, 6),
290 EXT_CONTROL_REG_BITS(VDAC, 0, 7),
291 EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
292 EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
293 EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
294 EXT_CONTROL_REG_BITS(VMMC, 0, 0),
295};
296
297static unsigned int tps65911_ext_sleep_control[] = {
298 0,
299 EXT_CONTROL_REG_BITS(VIO, 1, 0),
300 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
301 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
302 EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
303 EXT_CONTROL_REG_BITS(LDO1, 0, 1),
304 EXT_CONTROL_REG_BITS(LDO2, 0, 2),
305 EXT_CONTROL_REG_BITS(LDO3, 0, 7),
306 EXT_CONTROL_REG_BITS(LDO4, 0, 6),
307 EXT_CONTROL_REG_BITS(LDO5, 0, 3),
308 EXT_CONTROL_REG_BITS(LDO6, 0, 0),
309 EXT_CONTROL_REG_BITS(LDO7, 0, 5),
310 EXT_CONTROL_REG_BITS(LDO8, 0, 4),
311};
312
313struct tps65910_reg {
314 struct regulator_desc *desc;
315 struct tps65910 *mfd;
316 struct regulator_dev **rdev;
317 struct tps_info **info;
318 int num_regulators;
319 int mode;
320 int (*get_ctrl_reg)(int);
321 unsigned int *ext_sleep_control;
322 unsigned int board_ext_control[TPS65910_NUM_REGS];
323};
324
325static int tps65910_get_ctrl_register(int id)
326{
327 switch (id) {
328 case TPS65910_REG_VRTC:
329 return TPS65910_VRTC;
330 case TPS65910_REG_VIO:
331 return TPS65910_VIO;
332 case TPS65910_REG_VDD1:
333 return TPS65910_VDD1;
334 case TPS65910_REG_VDD2:
335 return TPS65910_VDD2;
336 case TPS65910_REG_VDD3:
337 return TPS65910_VDD3;
338 case TPS65910_REG_VDIG1:
339 return TPS65910_VDIG1;
340 case TPS65910_REG_VDIG2:
341 return TPS65910_VDIG2;
342 case TPS65910_REG_VPLL:
343 return TPS65910_VPLL;
344 case TPS65910_REG_VDAC:
345 return TPS65910_VDAC;
346 case TPS65910_REG_VAUX1:
347 return TPS65910_VAUX1;
348 case TPS65910_REG_VAUX2:
349 return TPS65910_VAUX2;
350 case TPS65910_REG_VAUX33:
351 return TPS65910_VAUX33;
352 case TPS65910_REG_VMMC:
353 return TPS65910_VMMC;
354 case TPS65910_REG_VBB:
355 return TPS65910_BBCH;
356 default:
357 return -EINVAL;
358 }
359}
360
361static int tps65911_get_ctrl_register(int id)
362{
363 switch (id) {
364 case TPS65910_REG_VRTC:
365 return TPS65910_VRTC;
366 case TPS65910_REG_VIO:
367 return TPS65910_VIO;
368 case TPS65910_REG_VDD1:
369 return TPS65910_VDD1;
370 case TPS65910_REG_VDD2:
371 return TPS65910_VDD2;
372 case TPS65911_REG_VDDCTRL:
373 return TPS65911_VDDCTRL;
374 case TPS65911_REG_LDO1:
375 return TPS65911_LDO1;
376 case TPS65911_REG_LDO2:
377 return TPS65911_LDO2;
378 case TPS65911_REG_LDO3:
379 return TPS65911_LDO3;
380 case TPS65911_REG_LDO4:
381 return TPS65911_LDO4;
382 case TPS65911_REG_LDO5:
383 return TPS65911_LDO5;
384 case TPS65911_REG_LDO6:
385 return TPS65911_LDO6;
386 case TPS65911_REG_LDO7:
387 return TPS65911_LDO7;
388 case TPS65911_REG_LDO8:
389 return TPS65911_LDO8;
390 default:
391 return -EINVAL;
392 }
393}
394
395static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
396{
397 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
398 struct tps65910 *mfd = pmic->mfd;
399 int reg, value, id = rdev_get_id(dev);
400
401 reg = pmic->get_ctrl_reg(id);
402 if (reg < 0)
403 return reg;
404
405 switch (mode) {
406 case REGULATOR_MODE_NORMAL:
407 return tps65910_reg_update_bits(pmic->mfd, reg,
408 LDO_ST_MODE_BIT | LDO_ST_ON_BIT,
409 LDO_ST_ON_BIT);
410 case REGULATOR_MODE_IDLE:
411 value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
412 return tps65910_reg_set_bits(mfd, reg, value);
413 case REGULATOR_MODE_STANDBY:
414 return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT);
415 }
416
417 return -EINVAL;
418}
419
420static unsigned int tps65910_get_mode(struct regulator_dev *dev)
421{
422 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
423 int ret, reg, value, id = rdev_get_id(dev);
424
425 reg = pmic->get_ctrl_reg(id);
426 if (reg < 0)
427 return reg;
428
429 ret = tps65910_reg_read(pmic->mfd, reg, &value);
430 if (ret < 0)
431 return ret;
432
433 if (!(value & LDO_ST_ON_BIT))
434 return REGULATOR_MODE_STANDBY;
435 else if (value & LDO_ST_MODE_BIT)
436 return REGULATOR_MODE_IDLE;
437 else
438 return REGULATOR_MODE_NORMAL;
439}
440
441static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
442{
443 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
444 int ret, id = rdev_get_id(dev);
445 int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
446
447 switch (id) {
448 case TPS65910_REG_VDD1:
449 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_OP, &opvsel);
450 if (ret < 0)
451 return ret;
452 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1, &mult);
453 if (ret < 0)
454 return ret;
455 mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
456 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_SR, &srvsel);
457 if (ret < 0)
458 return ret;
459 sr = opvsel & VDD1_OP_CMD_MASK;
460 opvsel &= VDD1_OP_SEL_MASK;
461 srvsel &= VDD1_SR_SEL_MASK;
462 vselmax = 75;
463 break;
464 case TPS65910_REG_VDD2:
465 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_OP, &opvsel);
466 if (ret < 0)
467 return ret;
468 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2, &mult);
469 if (ret < 0)
470 return ret;
471 mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
472 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_SR, &srvsel);
473 if (ret < 0)
474 return ret;
475 sr = opvsel & VDD2_OP_CMD_MASK;
476 opvsel &= VDD2_OP_SEL_MASK;
477 srvsel &= VDD2_SR_SEL_MASK;
478 vselmax = 75;
479 break;
480 case TPS65911_REG_VDDCTRL:
481 ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_OP,
482 &opvsel);
483 if (ret < 0)
484 return ret;
485 ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_SR,
486 &srvsel);
487 if (ret < 0)
488 return ret;
489 sr = opvsel & VDDCTRL_OP_CMD_MASK;
490 opvsel &= VDDCTRL_OP_SEL_MASK;
491 srvsel &= VDDCTRL_SR_SEL_MASK;
492 vselmax = 64;
493 break;
494 }
495
496
497 if (!mult)
498 mult = 1;
499
500 if (sr) {
501
502 if (srvsel < 3)
503 srvsel = 3;
504 if (srvsel > vselmax)
505 srvsel = vselmax;
506 return srvsel - 3;
507 } else {
508
509
510 if (opvsel < 3)
511 opvsel = 3;
512 if (opvsel > vselmax)
513 opvsel = vselmax;
514 return opvsel - 3;
515 }
516 return -EINVAL;
517}
518
519static int tps65910_get_voltage_sel(struct regulator_dev *dev)
520{
521 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
522 int ret, reg, value, id = rdev_get_id(dev);
523
524 reg = pmic->get_ctrl_reg(id);
525 if (reg < 0)
526 return reg;
527
528 ret = tps65910_reg_read(pmic->mfd, reg, &value);
529 if (ret < 0)
530 return ret;
531
532 switch (id) {
533 case TPS65910_REG_VIO:
534 case TPS65910_REG_VDIG1:
535 case TPS65910_REG_VDIG2:
536 case TPS65910_REG_VPLL:
537 case TPS65910_REG_VDAC:
538 case TPS65910_REG_VAUX1:
539 case TPS65910_REG_VAUX2:
540 case TPS65910_REG_VAUX33:
541 case TPS65910_REG_VMMC:
542 value &= LDO_SEL_MASK;
543 value >>= LDO_SEL_SHIFT;
544 break;
545 case TPS65910_REG_VBB:
546 value &= BBCH_BBSEL_MASK;
547 value >>= BBCH_BBSEL_SHIFT;
548 break;
549 default:
550 return -EINVAL;
551 }
552
553 return value;
554}
555
556static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
557{
558 return dev->desc->volt_table[0];
559}
560
561static int tps65911_get_voltage_sel(struct regulator_dev *dev)
562{
563 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
564 int ret, id = rdev_get_id(dev);
565 unsigned int value, reg;
566
567 reg = pmic->get_ctrl_reg(id);
568
569 ret = tps65910_reg_read(pmic->mfd, reg, &value);
570 if (ret < 0)
571 return ret;
572
573 switch (id) {
574 case TPS65911_REG_LDO1:
575 case TPS65911_REG_LDO2:
576 case TPS65911_REG_LDO4:
577 value &= LDO1_SEL_MASK;
578 value >>= LDO_SEL_SHIFT;
579 break;
580 case TPS65911_REG_LDO3:
581 case TPS65911_REG_LDO5:
582 case TPS65911_REG_LDO6:
583 case TPS65911_REG_LDO7:
584 case TPS65911_REG_LDO8:
585 value &= LDO3_SEL_MASK;
586 value >>= LDO_SEL_SHIFT;
587 break;
588 case TPS65910_REG_VIO:
589 value &= LDO_SEL_MASK;
590 value >>= LDO_SEL_SHIFT;
591 break;
592 default:
593 return -EINVAL;
594 }
595
596 return value;
597}
598
599static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
600 unsigned selector)
601{
602 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
603 int id = rdev_get_id(dev), vsel;
604 int dcdc_mult = 0;
605
606 switch (id) {
607 case TPS65910_REG_VDD1:
608 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
609 if (dcdc_mult == 1)
610 dcdc_mult--;
611 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
612
613 tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD1,
614 VDD1_VGAIN_SEL_MASK,
615 dcdc_mult << VDD1_VGAIN_SEL_SHIFT);
616 tps65910_reg_write(pmic->mfd, TPS65910_VDD1_OP, vsel);
617 break;
618 case TPS65910_REG_VDD2:
619 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
620 if (dcdc_mult == 1)
621 dcdc_mult--;
622 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
623
624 tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD2,
625 VDD1_VGAIN_SEL_MASK,
626 dcdc_mult << VDD2_VGAIN_SEL_SHIFT);
627 tps65910_reg_write(pmic->mfd, TPS65910_VDD2_OP, vsel);
628 break;
629 case TPS65911_REG_VDDCTRL:
630 vsel = selector + 3;
631 tps65910_reg_write(pmic->mfd, TPS65911_VDDCTRL_OP, vsel);
632 }
633
634 return 0;
635}
636
637static int tps65910_set_voltage_sel(struct regulator_dev *dev,
638 unsigned selector)
639{
640 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
641 int reg, id = rdev_get_id(dev);
642
643 reg = pmic->get_ctrl_reg(id);
644 if (reg < 0)
645 return reg;
646
647 switch (id) {
648 case TPS65910_REG_VIO:
649 case TPS65910_REG_VDIG1:
650 case TPS65910_REG_VDIG2:
651 case TPS65910_REG_VPLL:
652 case TPS65910_REG_VDAC:
653 case TPS65910_REG_VAUX1:
654 case TPS65910_REG_VAUX2:
655 case TPS65910_REG_VAUX33:
656 case TPS65910_REG_VMMC:
657 return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
658 selector << LDO_SEL_SHIFT);
659 case TPS65910_REG_VBB:
660 return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK,
661 selector << BBCH_BBSEL_SHIFT);
662 }
663
664 return -EINVAL;
665}
666
667static int tps65911_set_voltage_sel(struct regulator_dev *dev,
668 unsigned selector)
669{
670 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
671 int reg, id = rdev_get_id(dev);
672
673 reg = pmic->get_ctrl_reg(id);
674 if (reg < 0)
675 return reg;
676
677 switch (id) {
678 case TPS65911_REG_LDO1:
679 case TPS65911_REG_LDO2:
680 case TPS65911_REG_LDO4:
681 return tps65910_reg_update_bits(pmic->mfd, reg, LDO1_SEL_MASK,
682 selector << LDO_SEL_SHIFT);
683 case TPS65911_REG_LDO3:
684 case TPS65911_REG_LDO5:
685 case TPS65911_REG_LDO6:
686 case TPS65911_REG_LDO7:
687 case TPS65911_REG_LDO8:
688 return tps65910_reg_update_bits(pmic->mfd, reg, LDO3_SEL_MASK,
689 selector << LDO_SEL_SHIFT);
690 case TPS65910_REG_VIO:
691 return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
692 selector << LDO_SEL_SHIFT);
693 case TPS65910_REG_VBB:
694 return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK,
695 selector << BBCH_BBSEL_SHIFT);
696 }
697
698 return -EINVAL;
699}
700
701
702static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
703 unsigned selector)
704{
705 int volt, mult = 1, id = rdev_get_id(dev);
706
707 switch (id) {
708 case TPS65910_REG_VDD1:
709 case TPS65910_REG_VDD2:
710 mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
711 volt = VDD1_2_MIN_VOLT +
712 (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
713 break;
714 case TPS65911_REG_VDDCTRL:
715 volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
716 break;
717 default:
718 BUG();
719 return -EINVAL;
720 }
721
722 return volt * 100 * mult;
723}
724
725static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
726{
727 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
728 int step_mv = 0, id = rdev_get_id(dev);
729
730 switch (id) {
731 case TPS65911_REG_LDO1:
732 case TPS65911_REG_LDO2:
733 case TPS65911_REG_LDO4:
734
735 if (selector < 5)
736 selector = 0;
737 else
738 selector -= 4;
739
740 step_mv = 50;
741 break;
742 case TPS65911_REG_LDO3:
743 case TPS65911_REG_LDO5:
744 case TPS65911_REG_LDO6:
745 case TPS65911_REG_LDO7:
746 case TPS65911_REG_LDO8:
747
748 if (selector < 3)
749 selector = 0;
750 else
751 selector -= 2;
752
753 step_mv = 100;
754 break;
755 case TPS65910_REG_VIO:
756 return pmic->info[id]->voltage_table[selector];
757 default:
758 return -EINVAL;
759 }
760
761 return (LDO_MIN_VOLT + selector * step_mv) * 1000;
762}
763
764
765static struct regulator_ops tps65910_ops_dcdc = {
766 .is_enabled = regulator_is_enabled_regmap,
767 .enable = regulator_enable_regmap,
768 .disable = regulator_disable_regmap,
769 .set_mode = tps65910_set_mode,
770 .get_mode = tps65910_get_mode,
771 .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
772 .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
773 .set_voltage_time_sel = regulator_set_voltage_time_sel,
774 .list_voltage = tps65910_list_voltage_dcdc,
775 .map_voltage = regulator_map_voltage_ascend,
776};
777
778static struct regulator_ops tps65910_ops_vdd3 = {
779 .is_enabled = regulator_is_enabled_regmap,
780 .enable = regulator_enable_regmap,
781 .disable = regulator_disable_regmap,
782 .set_mode = tps65910_set_mode,
783 .get_mode = tps65910_get_mode,
784 .get_voltage = tps65910_get_voltage_vdd3,
785 .list_voltage = regulator_list_voltage_table,
786 .map_voltage = regulator_map_voltage_ascend,
787};
788
789static struct regulator_ops tps65910_ops_vbb = {
790 .is_enabled = regulator_is_enabled_regmap,
791 .enable = regulator_enable_regmap,
792 .disable = regulator_disable_regmap,
793 .set_mode = tps65910_set_mode,
794 .get_mode = tps65910_get_mode,
795 .get_voltage_sel = tps65910_get_voltage_sel,
796 .set_voltage_sel = tps65910_set_voltage_sel,
797 .list_voltage = regulator_list_voltage_table,
798 .map_voltage = regulator_map_voltage_iterate,
799};
800
801static struct regulator_ops tps65910_ops = {
802 .is_enabled = regulator_is_enabled_regmap,
803 .enable = regulator_enable_regmap,
804 .disable = regulator_disable_regmap,
805 .set_mode = tps65910_set_mode,
806 .get_mode = tps65910_get_mode,
807 .get_voltage_sel = tps65910_get_voltage_sel,
808 .set_voltage_sel = tps65910_set_voltage_sel,
809 .list_voltage = regulator_list_voltage_table,
810 .map_voltage = regulator_map_voltage_ascend,
811};
812
813static struct regulator_ops tps65911_ops = {
814 .is_enabled = regulator_is_enabled_regmap,
815 .enable = regulator_enable_regmap,
816 .disable = regulator_disable_regmap,
817 .set_mode = tps65910_set_mode,
818 .get_mode = tps65910_get_mode,
819 .get_voltage_sel = tps65911_get_voltage_sel,
820 .set_voltage_sel = tps65911_set_voltage_sel,
821 .list_voltage = tps65911_list_voltage,
822 .map_voltage = regulator_map_voltage_ascend,
823};
824
825static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
826 int id, int ext_sleep_config)
827{
828 struct tps65910 *mfd = pmic->mfd;
829 u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
830 u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
831 int ret;
832
833
834
835
836
837 if (ext_sleep_config & EXT_SLEEP_CONTROL) {
838 int en_count;
839 en_count = ((ext_sleep_config &
840 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
841 en_count += ((ext_sleep_config &
842 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
843 en_count += ((ext_sleep_config &
844 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
845 en_count += ((ext_sleep_config &
846 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
847 if (en_count > 1) {
848 dev_err(mfd->dev,
849 "External sleep control flag is not proper\n");
850 return -EINVAL;
851 }
852 }
853
854 pmic->board_ext_control[id] = ext_sleep_config;
855
856
857 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
858 ret = tps65910_reg_set_bits(mfd,
859 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
860 else
861 ret = tps65910_reg_clear_bits(mfd,
862 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
863 if (ret < 0) {
864 dev_err(mfd->dev,
865 "Error in configuring external control EN1\n");
866 return ret;
867 }
868
869
870 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
871 ret = tps65910_reg_set_bits(mfd,
872 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
873 else
874 ret = tps65910_reg_clear_bits(mfd,
875 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
876 if (ret < 0) {
877 dev_err(mfd->dev,
878 "Error in configuring external control EN2\n");
879 return ret;
880 }
881
882
883 if ((tps65910_chip_id(mfd) == TPS65910) &&
884 (id >= TPS65910_REG_VDIG1)) {
885 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
886 ret = tps65910_reg_set_bits(mfd,
887 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
888 else
889 ret = tps65910_reg_clear_bits(mfd,
890 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
891 if (ret < 0) {
892 dev_err(mfd->dev,
893 "Error in configuring external control EN3\n");
894 return ret;
895 }
896 }
897
898
899 if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
900
901 ret = tps65910_reg_clear_bits(mfd,
902 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
903 if (!ret)
904 ret = tps65910_reg_clear_bits(mfd,
905 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
906 if (ret < 0)
907 dev_err(mfd->dev,
908 "Error in configuring SLEEP register\n");
909 return ret;
910 }
911
912
913
914
915
916
917 if ((id == TPS65910_REG_VDD1) ||
918 (id == TPS65910_REG_VDD2) ||
919 ((id == TPS65911_REG_VDDCTRL) &&
920 (tps65910_chip_id(mfd) == TPS65911))) {
921 int op_reg_add = pmic->get_ctrl_reg(id) + 1;
922 int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
923 int opvsel, srvsel;
924
925 ret = tps65910_reg_read(pmic->mfd, op_reg_add, &opvsel);
926 if (ret < 0)
927 return ret;
928 ret = tps65910_reg_read(pmic->mfd, sr_reg_add, &srvsel);
929 if (ret < 0)
930 return ret;
931
932 if (opvsel & VDD1_OP_CMD_MASK) {
933 u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
934
935 ret = tps65910_reg_write(pmic->mfd, op_reg_add,
936 reg_val);
937 if (ret < 0) {
938 dev_err(mfd->dev,
939 "Error in configuring op register\n");
940 return ret;
941 }
942 }
943 ret = tps65910_reg_write(pmic->mfd, sr_reg_add, 0);
944 if (ret < 0) {
945 dev_err(mfd->dev, "Error in setting sr register\n");
946 return ret;
947 }
948 }
949
950 ret = tps65910_reg_clear_bits(mfd,
951 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
952 if (!ret) {
953 if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
954 ret = tps65910_reg_set_bits(mfd,
955 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
956 else
957 ret = tps65910_reg_clear_bits(mfd,
958 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
959 }
960 if (ret < 0)
961 dev_err(mfd->dev,
962 "Error in configuring SLEEP register\n");
963
964 return ret;
965}
966
967#ifdef CONFIG_OF
968
969static struct of_regulator_match tps65910_matches[] = {
970 { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] },
971 { .name = "vio", .driver_data = (void *) &tps65910_regs[1] },
972 { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] },
973 { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] },
974 { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] },
975 { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] },
976 { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] },
977 { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] },
978 { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] },
979 { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] },
980 { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] },
981 { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] },
982 { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] },
983 { .name = "vbb", .driver_data = (void *) &tps65910_regs[13] },
984};
985
986static struct of_regulator_match tps65911_matches[] = {
987 { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] },
988 { .name = "vio", .driver_data = (void *) &tps65911_regs[1] },
989 { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] },
990 { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] },
991 { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] },
992 { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] },
993 { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] },
994 { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] },
995 { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] },
996 { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] },
997 { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] },
998 { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] },
999 { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] },
1000};
1001
1002static struct tps65910_board *tps65910_parse_dt_reg_data(
1003 struct platform_device *pdev,
1004 struct of_regulator_match **tps65910_reg_matches)
1005{
1006 struct tps65910_board *pmic_plat_data;
1007 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
1008 struct device_node *np, *regulators;
1009 struct of_regulator_match *matches;
1010 unsigned int prop;
1011 int idx = 0, ret, count;
1012
1013 pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data),
1014 GFP_KERNEL);
1015 if (!pmic_plat_data)
1016 return NULL;
1017
1018 np = pdev->dev.parent->of_node;
1019 regulators = of_get_child_by_name(np, "regulators");
1020 if (!regulators) {
1021 dev_err(&pdev->dev, "regulator node not found\n");
1022 return NULL;
1023 }
1024
1025 switch (tps65910_chip_id(tps65910)) {
1026 case TPS65910:
1027 count = ARRAY_SIZE(tps65910_matches);
1028 matches = tps65910_matches;
1029 break;
1030 case TPS65911:
1031 count = ARRAY_SIZE(tps65911_matches);
1032 matches = tps65911_matches;
1033 break;
1034 default:
1035 of_node_put(regulators);
1036 dev_err(&pdev->dev, "Invalid tps chip version\n");
1037 return NULL;
1038 }
1039
1040 ret = of_regulator_match(&pdev->dev, regulators, matches, count);
1041 of_node_put(regulators);
1042 if (ret < 0) {
1043 dev_err(&pdev->dev, "Error parsing regulator init data: %d\n",
1044 ret);
1045 return NULL;
1046 }
1047
1048 *tps65910_reg_matches = matches;
1049
1050 for (idx = 0; idx < count; idx++) {
1051 if (!matches[idx].of_node)
1052 continue;
1053
1054 pmic_plat_data->tps65910_pmic_init_data[idx] =
1055 matches[idx].init_data;
1056
1057 ret = of_property_read_u32(matches[idx].of_node,
1058 "ti,regulator-ext-sleep-control", &prop);
1059 if (!ret)
1060 pmic_plat_data->regulator_ext_sleep_control[idx] = prop;
1061
1062 }
1063
1064 return pmic_plat_data;
1065}
1066#else
1067static inline struct tps65910_board *tps65910_parse_dt_reg_data(
1068 struct platform_device *pdev,
1069 struct of_regulator_match **tps65910_reg_matches)
1070{
1071 *tps65910_reg_matches = NULL;
1072 return NULL;
1073}
1074#endif
1075
1076static int tps65910_probe(struct platform_device *pdev)
1077{
1078 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
1079 struct regulator_config config = { };
1080 struct tps_info *info;
1081 struct regulator_dev *rdev;
1082 struct tps65910_reg *pmic;
1083 struct tps65910_board *pmic_plat_data;
1084 struct of_regulator_match *tps65910_reg_matches = NULL;
1085 int i, err;
1086
1087 pmic_plat_data = dev_get_platdata(tps65910->dev);
1088 if (!pmic_plat_data && tps65910->dev->of_node)
1089 pmic_plat_data = tps65910_parse_dt_reg_data(pdev,
1090 &tps65910_reg_matches);
1091
1092 if (!pmic_plat_data) {
1093 dev_err(&pdev->dev, "Platform data not found\n");
1094 return -EINVAL;
1095 }
1096
1097 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
1098 if (!pmic)
1099 return -ENOMEM;
1100
1101 pmic->mfd = tps65910;
1102 platform_set_drvdata(pdev, pmic);
1103
1104
1105 tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL,
1106 DEVCTRL_SR_CTL_I2C_SEL_MASK);
1107
1108 switch (tps65910_chip_id(tps65910)) {
1109 case TPS65910:
1110 BUILD_BUG_ON(TPS65910_NUM_REGS < ARRAY_SIZE(tps65910_regs));
1111 pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
1112 pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
1113 pmic->ext_sleep_control = tps65910_ext_sleep_control;
1114 info = tps65910_regs;
1115
1116
1117
1118
1119 tps65910_reg_clear_bits(pmic->mfd, TPS65910_DCDCCTRL,
1120 DCDCCTRL_DCDCCKSYNC_MASK);
1121 break;
1122 case TPS65911:
1123 BUILD_BUG_ON(TPS65910_NUM_REGS < ARRAY_SIZE(tps65911_regs));
1124 pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
1125 pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
1126 pmic->ext_sleep_control = tps65911_ext_sleep_control;
1127 info = tps65911_regs;
1128 break;
1129 default:
1130 dev_err(&pdev->dev, "Invalid tps chip version\n");
1131 return -ENODEV;
1132 }
1133
1134 pmic->desc = devm_kcalloc(&pdev->dev,
1135 pmic->num_regulators,
1136 sizeof(struct regulator_desc),
1137 GFP_KERNEL);
1138 if (!pmic->desc)
1139 return -ENOMEM;
1140
1141 pmic->info = devm_kcalloc(&pdev->dev,
1142 pmic->num_regulators,
1143 sizeof(struct tps_info *),
1144 GFP_KERNEL);
1145 if (!pmic->info)
1146 return -ENOMEM;
1147
1148 pmic->rdev = devm_kcalloc(&pdev->dev,
1149 pmic->num_regulators,
1150 sizeof(struct regulator_dev *),
1151 GFP_KERNEL);
1152 if (!pmic->rdev)
1153 return -ENOMEM;
1154
1155 for (i = 0; i < pmic->num_regulators; i++, info++) {
1156
1157 pmic->info[i] = info;
1158
1159 pmic->desc[i].name = info->name;
1160 pmic->desc[i].supply_name = info->vin_name;
1161 pmic->desc[i].id = i;
1162 pmic->desc[i].n_voltages = info->n_voltages;
1163 pmic->desc[i].enable_time = info->enable_time_us;
1164
1165 if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
1166 pmic->desc[i].ops = &tps65910_ops_dcdc;
1167 pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
1168 VDD1_2_NUM_VOLT_COARSE;
1169 pmic->desc[i].ramp_delay = 12500;
1170 } else if (i == TPS65910_REG_VDD3) {
1171 if (tps65910_chip_id(tps65910) == TPS65910) {
1172 pmic->desc[i].ops = &tps65910_ops_vdd3;
1173 pmic->desc[i].volt_table = info->voltage_table;
1174 } else {
1175 pmic->desc[i].ops = &tps65910_ops_dcdc;
1176 pmic->desc[i].ramp_delay = 5000;
1177 }
1178 } else if (i == TPS65910_REG_VBB &&
1179 tps65910_chip_id(tps65910) == TPS65910) {
1180 pmic->desc[i].ops = &tps65910_ops_vbb;
1181 pmic->desc[i].volt_table = info->voltage_table;
1182 } else {
1183 if (tps65910_chip_id(tps65910) == TPS65910) {
1184 pmic->desc[i].ops = &tps65910_ops;
1185 pmic->desc[i].volt_table = info->voltage_table;
1186 } else {
1187 pmic->desc[i].ops = &tps65911_ops;
1188 }
1189 }
1190
1191 err = tps65910_set_ext_sleep_config(pmic, i,
1192 pmic_plat_data->regulator_ext_sleep_control[i]);
1193
1194
1195
1196
1197 if (err < 0)
1198 dev_warn(tps65910->dev,
1199 "Failed to initialise ext control config\n");
1200
1201 pmic->desc[i].type = REGULATOR_VOLTAGE;
1202 pmic->desc[i].owner = THIS_MODULE;
1203 pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i);
1204 pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;
1205
1206 config.dev = tps65910->dev;
1207 config.init_data = pmic_plat_data->tps65910_pmic_init_data[i];
1208 config.driver_data = pmic;
1209 config.regmap = tps65910->regmap;
1210
1211 if (tps65910_reg_matches)
1212 config.of_node = tps65910_reg_matches[i].of_node;
1213
1214 rdev = devm_regulator_register(&pdev->dev, &pmic->desc[i],
1215 &config);
1216 if (IS_ERR(rdev)) {
1217 dev_err(tps65910->dev,
1218 "failed to register %s regulator\n",
1219 pdev->name);
1220 return PTR_ERR(rdev);
1221 }
1222
1223
1224 pmic->rdev[i] = rdev;
1225 }
1226 return 0;
1227}
1228
1229static void tps65910_shutdown(struct platform_device *pdev)
1230{
1231 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
1232 int i;
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247 for (i = 0; i < pmic->num_regulators; i++) {
1248 int err;
1249 if (!pmic->rdev[i])
1250 continue;
1251
1252 err = tps65910_set_ext_sleep_config(pmic, i, 0);
1253 if (err < 0)
1254 dev_err(&pdev->dev,
1255 "Error in clearing external control\n");
1256 }
1257}
1258
1259static struct platform_driver tps65910_driver = {
1260 .driver = {
1261 .name = "tps65910-pmic",
1262 },
1263 .probe = tps65910_probe,
1264 .shutdown = tps65910_shutdown,
1265};
1266
1267static int __init tps65910_init(void)
1268{
1269 return platform_driver_register(&tps65910_driver);
1270}
1271subsys_initcall(tps65910_init);
1272
1273static void __exit tps65910_cleanup(void)
1274{
1275 platform_driver_unregister(&tps65910_driver);
1276}
1277module_exit(tps65910_cleanup);
1278
1279MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1280MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
1281MODULE_LICENSE("GPL v2");
1282MODULE_ALIAS("platform:tps65910-pmic");
1283
