1/******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017-2021 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 * Copyright (C) 2010-2015 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * * 10 * This program is free software; you can redistribute it and/or * 11 * modify it under the terms of version 2 of the GNU General * 12 * Public License as published by the Free Software Foundation. * 13 * This program is distributed in the hope that it will be useful. * 14 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 15 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 16 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 17 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 18 * TO BE LEGALLY INVALID. See the GNU General Public License for * 19 * more details, a copy of which can be found in the file COPYING * 20 * included with this package. * 21 *******************************************************************/ 22/* bsg definitions 23 * No pointers to user data are allowed, all application buffers and sizes will 24 * derived through the bsg interface. 25 * 26 * These are the vendor unique structures passed in using the bsg 27 * FC_BSG_HST_VENDOR message code type. 28 */ 29#define LPFC_BSG_VENDOR_SET_CT_EVENT 1 30#define LPFC_BSG_VENDOR_GET_CT_EVENT 2 31#define LPFC_BSG_VENDOR_SEND_MGMT_RESP 3 32#define LPFC_BSG_VENDOR_DIAG_MODE 4 33#define LPFC_BSG_VENDOR_DIAG_RUN_LOOPBACK 5 34#define LPFC_BSG_VENDOR_GET_MGMT_REV 6 35#define LPFC_BSG_VENDOR_MBOX 7 36#define LPFC_BSG_VENDOR_MENLO_CMD 8 37#define LPFC_BSG_VENDOR_MENLO_DATA 9 38#define LPFC_BSG_VENDOR_DIAG_MODE_END 10 39#define LPFC_BSG_VENDOR_LINK_DIAG_TEST 11 40#define LPFC_BSG_VENDOR_FORCED_LINK_SPEED 14 41#define LPFC_BSG_VENDOR_RAS_GET_LWPD 16 42#define LPFC_BSG_VENDOR_RAS_GET_FWLOG 17 43#define LPFC_BSG_VENDOR_RAS_GET_CONFIG 18 44#define LPFC_BSG_VENDOR_RAS_SET_CONFIG 19 45#define LPFC_BSG_VENDOR_GET_TRUNK_INFO 20 46#define LPFC_BSG_VENDOR_GET_CGNBUF_INFO 21 47 48struct set_ct_event { 49 uint32_t command; 50 uint32_t type_mask; 51 uint32_t ev_req_id; 52 uint32_t ev_reg_id; 53}; 54 55struct get_ct_event { 56 uint32_t command; 57 uint32_t ev_reg_id; 58 uint32_t ev_req_id; 59}; 60 61struct get_ct_event_reply { 62 uint32_t immed_data; 63 uint32_t type; 64}; 65 66struct send_mgmt_resp { 67 uint32_t command; 68 uint32_t tag; 69}; 70 71 72#define DISABLE_LOOP_BACK 0x0 /* disables loop back */ 73#define INTERNAL_LOOP_BACK 0x1 /* adapter short cuts the loop internally */ 74#define EXTERNAL_LOOP_BACK 0x2 /* requires an external loopback plug */ 75 76struct diag_mode_set { 77 uint32_t command; 78 uint32_t type; 79 uint32_t timeout; 80 uint32_t physical_link; 81}; 82 83struct sli4_link_diag { 84 uint32_t command; 85 uint32_t timeout; 86 uint32_t test_id; 87 uint32_t loops; 88 uint32_t test_version; 89 uint32_t error_action; 90}; 91 92struct diag_mode_test { 93 uint32_t command; 94}; 95 96struct diag_status { 97 uint32_t mbox_status; 98 uint32_t shdr_status; 99 uint32_t shdr_add_status; 100}; 101 102#define LPFC_WWNN_TYPE 0 103#define LPFC_WWPN_TYPE 1 104 105struct get_mgmt_rev { 106 uint32_t command; 107}; 108 109#define MANAGEMENT_MAJOR_REV 1 110#define MANAGEMENT_MINOR_REV 1 111 112/* the MgmtRevInfo structure */ 113struct MgmtRevInfo { 114 uint32_t a_Major; 115 uint32_t a_Minor; 116}; 117 118struct get_mgmt_rev_reply { 119 struct MgmtRevInfo info; 120}; 121 122#define BSG_MBOX_SIZE 4096 /* mailbox command plus extended data */ 123 124/* BSG mailbox request header */ 125struct dfc_mbox_req { 126 uint32_t command; 127 uint32_t mbOffset; 128 uint32_t inExtWLen; 129 uint32_t outExtWLen; 130 uint32_t extMboxTag; 131 uint32_t extSeqNum; 132}; 133 134/* Used for menlo command or menlo data. The xri is only used for menlo data */ 135struct menlo_command { 136 uint32_t cmd; 137 uint32_t xri; 138}; 139 140struct menlo_response { 141 uint32_t xri; /* return the xri of the iocb exchange */ 142}; 143 144/* 145 * macros and data structures for handling sli-config mailbox command 146 * pass-through support, this header file is shared between user and 147 * kernel spaces, note the set of macros are duplicates from lpfc_hw4.h, 148 * with macro names prefixed with bsg_, as the macros defined in 149 * lpfc_hw4.h are not accessible from user space. 150 */ 151 152/* Macros to deal with bit fields. Each bit field must have 3 #defines 153 * associated with it (_SHIFT, _MASK, and _WORD). 154 * EG. For a bit field that is in the 7th bit of the "field4" field of a 155 * structure and is 2 bits in size the following #defines must exist: 156 * struct temp { 157 * uint32_t field1; 158 * uint32_t field2; 159 * uint32_t field3; 160 * uint32_t field4; 161 * #define example_bit_field_SHIFT 7 162 * #define example_bit_field_MASK 0x03 163 * #define example_bit_field_WORD field4 164 * uint32_t field5; 165 * }; 166 * Then the macros below may be used to get or set the value of that field. 167 * EG. To get the value of the bit field from the above example: 168 * struct temp t1; 169 * value = bsg_bf_get(example_bit_field, &t1); 170 * And then to set that bit field: 171 * bsg_bf_set(example_bit_field, &t1, 2); 172 * Or clear that bit field: 173 * bsg_bf_set(example_bit_field, &t1, 0); 174 */ 175#define bsg_bf_get_le32(name, ptr) \ 176 ((le32_to_cpu((ptr)->name##_WORD) >> name##_SHIFT) & name##_MASK) 177#define bsg_bf_get(name, ptr) \ 178 (((ptr)->name##_WORD >> name##_SHIFT) & name##_MASK) 179#define bsg_bf_set_le32(name, ptr, value) \ 180 ((ptr)->name##_WORD = cpu_to_le32(((((value) & \ 181 name##_MASK) << name##_SHIFT) | (le32_to_cpu((ptr)->name##_WORD) & \ 182 ~(name##_MASK << name##_SHIFT))))) 183#define bsg_bf_set(name, ptr, value) \ 184 ((ptr)->name##_WORD = ((((value) & name##_MASK) << name##_SHIFT) | \ 185 ((ptr)->name##_WORD & ~(name##_MASK << name##_SHIFT)))) 186 187/* 188 * The sli_config structure specified here is based on the following 189 * restriction: 190 * 191 * -- SLI_CONFIG EMB=0, carrying MSEs, will carry subcommands without 192 * carrying HBD. 193 * -- SLI_CONFIG EMB=1, not carrying MSE, will carry subcommands with or 194 * without carrying HBDs. 195 */ 196 197struct lpfc_sli_config_mse { 198 uint32_t pa_lo; 199 uint32_t pa_hi; 200 uint32_t buf_len; 201#define lpfc_mbox_sli_config_mse_len_SHIFT 0 202#define lpfc_mbox_sli_config_mse_len_MASK 0xffffff 203#define lpfc_mbox_sli_config_mse_len_WORD buf_len 204}; 205 206struct lpfc_sli_config_hbd { 207 uint32_t buf_len; 208#define lpfc_mbox_sli_config_ecmn_hbd_len_SHIFT 0 209#define lpfc_mbox_sli_config_ecmn_hbd_len_MASK 0xffffff 210#define lpfc_mbox_sli_config_ecmn_hbd_len_WORD buf_len 211 uint32_t pa_lo; 212 uint32_t pa_hi; 213}; 214 215struct lpfc_sli_config_hdr { 216 uint32_t word1; 217#define lpfc_mbox_hdr_emb_SHIFT 0 218#define lpfc_mbox_hdr_emb_MASK 0x00000001 219#define lpfc_mbox_hdr_emb_WORD word1 220#define lpfc_mbox_hdr_mse_cnt_SHIFT 3 221#define lpfc_mbox_hdr_mse_cnt_MASK 0x0000001f 222#define lpfc_mbox_hdr_mse_cnt_WORD word1 223 uint32_t payload_length; 224 uint32_t tag_lo; 225 uint32_t tag_hi; 226 uint32_t reserved5; 227}; 228 229#define LPFC_CSF_BOOT_DEV 0x1D 230#define LPFC_CSF_QUERY 0 231#define LPFC_CSF_SAVE 1 232 233struct lpfc_sli_config_emb0_subsys { 234 struct lpfc_sli_config_hdr sli_config_hdr; 235#define LPFC_MBX_SLI_CONFIG_MAX_MSE 19 236 struct lpfc_sli_config_mse mse[LPFC_MBX_SLI_CONFIG_MAX_MSE]; 237 uint32_t padding; 238 uint32_t word64; 239#define lpfc_emb0_subcmnd_opcode_SHIFT 0 240#define lpfc_emb0_subcmnd_opcode_MASK 0xff 241#define lpfc_emb0_subcmnd_opcode_WORD word64 242#define lpfc_emb0_subcmnd_subsys_SHIFT 8 243#define lpfc_emb0_subcmnd_subsys_MASK 0xff 244#define lpfc_emb0_subcmnd_subsys_WORD word64 245/* Subsystem FCOE (0x0C) OpCodes */ 246#define SLI_CONFIG_SUBSYS_FCOE 0x0C 247#define FCOE_OPCODE_READ_FCF 0x08 248#define FCOE_OPCODE_ADD_FCF 0x09 249#define FCOE_OPCODE_SET_DPORT_MODE 0x27 250#define FCOE_OPCODE_GET_DPORT_RESULTS 0x28 251 uint32_t timeout; /* comn_set_feature timeout */ 252 uint32_t request_length; /* comn_set_feature request len */ 253 uint32_t version; /* comn_set_feature version */ 254 uint32_t csf_feature; /* comn_set_feature feature */ 255 uint32_t word69; /* comn_set_feature parameter len */ 256 uint32_t word70; /* comn_set_feature parameter val0 */ 257#define lpfc_emb0_subcmnd_csf_p0_SHIFT 0 258#define lpfc_emb0_subcmnd_csf_p0_MASK 0x3 259#define lpfc_emb0_subcmnd_csf_p0_WORD word70 260}; 261 262struct lpfc_sli_config_emb1_subsys { 263 struct lpfc_sli_config_hdr sli_config_hdr; 264 uint32_t word6; 265#define lpfc_emb1_subcmnd_opcode_SHIFT 0 266#define lpfc_emb1_subcmnd_opcode_MASK 0xff 267#define lpfc_emb1_subcmnd_opcode_WORD word6 268#define lpfc_emb1_subcmnd_subsys_SHIFT 8 269#define lpfc_emb1_subcmnd_subsys_MASK 0xff 270#define lpfc_emb1_subcmnd_subsys_WORD word6 271/* Subsystem COMN (0x01) OpCodes */ 272#define SLI_CONFIG_SUBSYS_COMN 0x01 273#define COMN_OPCODE_GET_PROFILE_CONFIG 0xA4 274#define COMN_OPCODE_READ_OBJECT 0xAB 275#define COMN_OPCODE_WRITE_OBJECT 0xAC 276#define COMN_OPCODE_READ_OBJECT_LIST 0xAD 277#define COMN_OPCODE_DELETE_OBJECT 0xAE 278#define COMN_OPCODE_SET_FEATURES 0xBF 279#define COMN_OPCODE_GET_CNTL_ADDL_ATTRIBUTES 0x79 280#define COMN_OPCODE_GET_CNTL_ATTRIBUTES 0x20 281 uint32_t timeout; 282 uint32_t request_length; 283 uint32_t word9; 284#define lpfc_subcmnd_version_SHIFT 0 285#define lpfc_subcmnd_version_MASK 0xff 286#define lpfc_subcmnd_version_WORD word9 287 uint32_t word10; 288#define lpfc_subcmnd_ask_rd_len_SHIFT 0 289#define lpfc_subcmnd_ask_rd_len_MASK 0xffffff 290#define lpfc_subcmnd_ask_rd_len_WORD word10 291 uint32_t rd_offset; 292 uint32_t obj_name[26]; 293 uint32_t hbd_count; 294#define LPFC_MBX_SLI_CONFIG_MAX_HBD 8 295 struct lpfc_sli_config_hbd hbd[LPFC_MBX_SLI_CONFIG_MAX_HBD]; 296}; 297 298struct lpfc_sli_config_mbox { 299 uint32_t word0; 300#define lpfc_mqe_status_SHIFT 16 301#define lpfc_mqe_status_MASK 0x0000FFFF 302#define lpfc_mqe_status_WORD word0 303#define lpfc_mqe_command_SHIFT 8 304#define lpfc_mqe_command_MASK 0x000000FF 305#define lpfc_mqe_command_WORD word0 306 union { 307 struct lpfc_sli_config_emb0_subsys sli_config_emb0_subsys; 308 struct lpfc_sli_config_emb1_subsys sli_config_emb1_subsys; 309 } un; 310}; 311 312#define LPFC_FORCED_LINK_SPEED_NOT_SUPPORTED 0 313#define LPFC_FORCED_LINK_SPEED_SUPPORTED 1 314struct get_forced_link_speed_support { 315 uint32_t command; 316}; 317struct forced_link_speed_support_reply { 318 uint8_t supported; 319}; 320 321struct lpfc_bsg_ras_req { 322 uint32_t command; 323}; 324 325struct lpfc_bsg_get_fwlog_req { 326 uint32_t command; 327 uint32_t read_size; 328 uint32_t read_offset; 329}; 330 331struct lpfc_bsg_get_ras_lwpd { 332 uint32_t offset; 333 uint32_t wrap_count; 334}; 335 336struct lpfc_bsg_set_ras_config_req { 337 uint32_t command; 338 uint8_t action; 339#define LPFC_RASACTION_STOP_LOGGING 0x00 340#define LPFC_RASACTION_START_LOGGING 0x01 341 uint8_t log_level; 342}; 343 344struct lpfc_bsg_get_ras_config_reply { 345 uint8_t state; 346#define LPFC_RASLOG_STATE_STOPPED 0x00 347#define LPFC_RASLOG_STATE_RUNNING 0x01 348 uint8_t log_level; 349 uint32_t log_buff_sz; 350}; 351 352struct lpfc_trunk_info { 353 uint32_t word0; 354#define lpfc_trunk_info_link_status_SHIFT 0 355#define lpfc_trunk_info_link_status_MASK 1 356#define lpfc_trunk_info_link_status_WORD word0 357#define lpfc_trunk_info_trunk_active0_SHIFT 8 358#define lpfc_trunk_info_trunk_active0_MASK 1 359#define lpfc_trunk_info_trunk_active0_WORD word0 360#define lpfc_trunk_info_trunk_active1_SHIFT 9 361#define lpfc_trunk_info_trunk_active1_MASK 1 362#define lpfc_trunk_info_trunk_active1_WORD word0 363#define lpfc_trunk_info_trunk_active2_SHIFT 10 364#define lpfc_trunk_info_trunk_active2_MASK 1 365#define lpfc_trunk_info_trunk_active2_WORD word0 366#define lpfc_trunk_info_trunk_active3_SHIFT 11 367#define lpfc_trunk_info_trunk_active3_MASK 1 368#define lpfc_trunk_info_trunk_active3_WORD word0 369#define lpfc_trunk_info_trunk_config0_SHIFT 12 370#define lpfc_trunk_info_trunk_config0_MASK 1 371#define lpfc_trunk_info_trunk_config0_WORD word0 372#define lpfc_trunk_info_trunk_config1_SHIFT 13 373#define lpfc_trunk_info_trunk_config1_MASK 1 374#define lpfc_trunk_info_trunk_config1_WORD word0 375#define lpfc_trunk_info_trunk_config2_SHIFT 14 376#define lpfc_trunk_info_trunk_config2_MASK 1 377#define lpfc_trunk_info_trunk_config2_WORD word0 378#define lpfc_trunk_info_trunk_config3_SHIFT 15 379#define lpfc_trunk_info_trunk_config3_MASK 1 380#define lpfc_trunk_info_trunk_config3_WORD word0 381 uint16_t port_speed; 382 uint16_t logical_speed; 383 uint32_t reserved3; 384}; 385 386struct get_trunk_info_req { 387 uint32_t command; 388}; 389 390struct get_cgnbuf_info_req { 391 uint32_t command; 392 uint32_t read_size; 393 uint32_t reset; 394#define LPFC_BSG_CGN_RESET_STAT 1 395}; 396 397/* driver only */ 398#define SLI_CONFIG_NOT_HANDLED 0 399#define SLI_CONFIG_HANDLED 1 400