linux/drivers/spi/spi-bitbang.c
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   1/*
   2 * polling/bitbanging SPI master controller driver utilities
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License as published by
   6 * the Free Software Foundation; either version 2 of the License, or
   7 * (at your option) any later version.
   8 *
   9 * This program is distributed in the hope that it will be useful,
  10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 * GNU General Public License for more details.
  13 */
  14
  15#include <linux/spinlock.h>
  16#include <linux/workqueue.h>
  17#include <linux/interrupt.h>
  18#include <linux/module.h>
  19#include <linux/delay.h>
  20#include <linux/errno.h>
  21#include <linux/platform_device.h>
  22#include <linux/slab.h>
  23
  24#include <linux/spi/spi.h>
  25#include <linux/spi/spi_bitbang.h>
  26
  27#define SPI_BITBANG_CS_DELAY    100
  28
  29
  30/*----------------------------------------------------------------------*/
  31
  32/*
  33 * FIRST PART (OPTIONAL):  word-at-a-time spi_transfer support.
  34 * Use this for GPIO or shift-register level hardware APIs.
  35 *
  36 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
  37 * to glue code.  These bitbang setup() and cleanup() routines are always
  38 * used, though maybe they're called from controller-aware code.
  39 *
  40 * chipselect() and friends may use spi_device->controller_data and
  41 * controller registers as appropriate.
  42 *
  43 *
  44 * NOTE:  SPI controller pins can often be used as GPIO pins instead,
  45 * which means you could use a bitbang driver either to get hardware
  46 * working quickly, or testing for differences that aren't speed related.
  47 */
  48
  49struct spi_bitbang_cs {
  50        unsigned        nsecs;  /* (clock cycle time)/2 */
  51        u32             (*txrx_word)(struct spi_device *spi, unsigned nsecs,
  52                                        u32 word, u8 bits, unsigned flags);
  53        unsigned        (*txrx_bufs)(struct spi_device *,
  54                                        u32 (*txrx_word)(
  55                                                struct spi_device *spi,
  56                                                unsigned nsecs,
  57                                                u32 word, u8 bits,
  58                                                unsigned flags),
  59                                        unsigned, struct spi_transfer *,
  60                                        unsigned);
  61};
  62
  63static unsigned bitbang_txrx_8(
  64        struct spi_device       *spi,
  65        u32                     (*txrx_word)(struct spi_device *spi,
  66                                        unsigned nsecs,
  67                                        u32 word, u8 bits,
  68                                        unsigned flags),
  69        unsigned                ns,
  70        struct spi_transfer     *t,
  71        unsigned flags
  72) {
  73        unsigned                bits = t->bits_per_word;
  74        unsigned                count = t->len;
  75        const u8                *tx = t->tx_buf;
  76        u8                      *rx = t->rx_buf;
  77
  78        while (likely(count > 0)) {
  79                u8              word = 0;
  80
  81                if (tx)
  82                        word = *tx++;
  83                word = txrx_word(spi, ns, word, bits, flags);
  84                if (rx)
  85                        *rx++ = word;
  86                count -= 1;
  87        }
  88        return t->len - count;
  89}
  90
  91static unsigned bitbang_txrx_16(
  92        struct spi_device       *spi,
  93        u32                     (*txrx_word)(struct spi_device *spi,
  94                                        unsigned nsecs,
  95                                        u32 word, u8 bits,
  96                                        unsigned flags),
  97        unsigned                ns,
  98        struct spi_transfer     *t,
  99        unsigned flags
 100) {
 101        unsigned                bits = t->bits_per_word;
 102        unsigned                count = t->len;
 103        const u16               *tx = t->tx_buf;
 104        u16                     *rx = t->rx_buf;
 105
 106        while (likely(count > 1)) {
 107                u16             word = 0;
 108
 109                if (tx)
 110                        word = *tx++;
 111                word = txrx_word(spi, ns, word, bits, flags);
 112                if (rx)
 113                        *rx++ = word;
 114                count -= 2;
 115        }
 116        return t->len - count;
 117}
 118
 119static unsigned bitbang_txrx_32(
 120        struct spi_device       *spi,
 121        u32                     (*txrx_word)(struct spi_device *spi,
 122                                        unsigned nsecs,
 123                                        u32 word, u8 bits,
 124                                        unsigned flags),
 125        unsigned                ns,
 126        struct spi_transfer     *t,
 127        unsigned flags
 128) {
 129        unsigned                bits = t->bits_per_word;
 130        unsigned                count = t->len;
 131        const u32               *tx = t->tx_buf;
 132        u32                     *rx = t->rx_buf;
 133
 134        while (likely(count > 3)) {
 135                u32             word = 0;
 136
 137                if (tx)
 138                        word = *tx++;
 139                word = txrx_word(spi, ns, word, bits, flags);
 140                if (rx)
 141                        *rx++ = word;
 142                count -= 4;
 143        }
 144        return t->len - count;
 145}
 146
 147int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
 148{
 149        struct spi_bitbang_cs   *cs = spi->controller_state;
 150        u8                      bits_per_word;
 151        u32                     hz;
 152
 153        if (t) {
 154                bits_per_word = t->bits_per_word;
 155                hz = t->speed_hz;
 156        } else {
 157                bits_per_word = 0;
 158                hz = 0;
 159        }
 160
 161        /* spi_transfer level calls that work per-word */
 162        if (!bits_per_word)
 163                bits_per_word = spi->bits_per_word;
 164        if (bits_per_word <= 8)
 165                cs->txrx_bufs = bitbang_txrx_8;
 166        else if (bits_per_word <= 16)
 167                cs->txrx_bufs = bitbang_txrx_16;
 168        else if (bits_per_word <= 32)
 169                cs->txrx_bufs = bitbang_txrx_32;
 170        else
 171                return -EINVAL;
 172
 173        /* nsecs = (clock period)/2 */
 174        if (!hz)
 175                hz = spi->max_speed_hz;
 176        if (hz) {
 177                cs->nsecs = (1000000000/2) / hz;
 178                if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
 179                        return -EINVAL;
 180        }
 181
 182        return 0;
 183}
 184EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
 185
 186/**
 187 * spi_bitbang_setup - default setup for per-word I/O loops
 188 */
 189int spi_bitbang_setup(struct spi_device *spi)
 190{
 191        struct spi_bitbang_cs   *cs = spi->controller_state;
 192        struct spi_bitbang      *bitbang;
 193
 194        bitbang = spi_master_get_devdata(spi->master);
 195
 196        if (!cs) {
 197                cs = kzalloc(sizeof(*cs), GFP_KERNEL);
 198                if (!cs)
 199                        return -ENOMEM;
 200                spi->controller_state = cs;
 201        }
 202
 203        /* per-word shift register access, in hardware or bitbanging */
 204        cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
 205        if (!cs->txrx_word)
 206                return -EINVAL;
 207
 208        if (bitbang->setup_transfer) {
 209                int retval = bitbang->setup_transfer(spi, NULL);
 210                if (retval < 0)
 211                        return retval;
 212        }
 213
 214        dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs);
 215
 216        /* NOTE we _need_ to call chipselect() early, ideally with adapter
 217         * setup, unless the hardware defaults cooperate to avoid confusion
 218         * between normal (active low) and inverted chipselects.
 219         */
 220
 221        /* deselect chip (low or high) */
 222        mutex_lock(&bitbang->lock);
 223        if (!bitbang->busy) {
 224                bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
 225                ndelay(cs->nsecs);
 226        }
 227        mutex_unlock(&bitbang->lock);
 228
 229        return 0;
 230}
 231EXPORT_SYMBOL_GPL(spi_bitbang_setup);
 232
 233/**
 234 * spi_bitbang_cleanup - default cleanup for per-word I/O loops
 235 */
 236void spi_bitbang_cleanup(struct spi_device *spi)
 237{
 238        kfree(spi->controller_state);
 239}
 240EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
 241
 242static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
 243{
 244        struct spi_bitbang_cs   *cs = spi->controller_state;
 245        unsigned                nsecs = cs->nsecs;
 246        struct spi_bitbang      *bitbang;
 247
 248        bitbang = spi_master_get_devdata(spi->master);
 249        if (bitbang->set_line_direction) {
 250                int err;
 251
 252                err = bitbang->set_line_direction(spi, !!(t->tx_buf));
 253                if (err < 0)
 254                        return err;
 255        }
 256
 257        if (spi->mode & SPI_3WIRE) {
 258                unsigned flags;
 259
 260                flags = t->tx_buf ? SPI_MASTER_NO_RX : SPI_MASTER_NO_TX;
 261                return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, flags);
 262        }
 263        return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, 0);
 264}
 265
 266/*----------------------------------------------------------------------*/
 267
 268/*
 269 * SECOND PART ... simple transfer queue runner.
 270 *
 271 * This costs a task context per controller, running the queue by
 272 * performing each transfer in sequence.  Smarter hardware can queue
 273 * several DMA transfers at once, and process several controller queues
 274 * in parallel; this driver doesn't match such hardware very well.
 275 *
 276 * Drivers can provide word-at-a-time i/o primitives, or provide
 277 * transfer-at-a-time ones to leverage dma or fifo hardware.
 278 */
 279
 280static int spi_bitbang_prepare_hardware(struct spi_master *spi)
 281{
 282        struct spi_bitbang      *bitbang;
 283
 284        bitbang = spi_master_get_devdata(spi);
 285
 286        mutex_lock(&bitbang->lock);
 287        bitbang->busy = 1;
 288        mutex_unlock(&bitbang->lock);
 289
 290        return 0;
 291}
 292
 293static int spi_bitbang_transfer_one(struct spi_master *master,
 294                                    struct spi_device *spi,
 295                                    struct spi_transfer *transfer)
 296{
 297        struct spi_bitbang *bitbang = spi_master_get_devdata(master);
 298        int status = 0;
 299
 300        if (bitbang->setup_transfer) {
 301                status = bitbang->setup_transfer(spi, transfer);
 302                if (status < 0)
 303                        goto out;
 304        }
 305
 306        if (transfer->len)
 307                status = bitbang->txrx_bufs(spi, transfer);
 308
 309        if (status == transfer->len)
 310                status = 0;
 311        else if (status >= 0)
 312                status = -EREMOTEIO;
 313
 314out:
 315        spi_finalize_current_transfer(master);
 316
 317        return status;
 318}
 319
 320static int spi_bitbang_unprepare_hardware(struct spi_master *spi)
 321{
 322        struct spi_bitbang      *bitbang;
 323
 324        bitbang = spi_master_get_devdata(spi);
 325
 326        mutex_lock(&bitbang->lock);
 327        bitbang->busy = 0;
 328        mutex_unlock(&bitbang->lock);
 329
 330        return 0;
 331}
 332
 333static void spi_bitbang_set_cs(struct spi_device *spi, bool enable)
 334{
 335        struct spi_bitbang *bitbang = spi_master_get_devdata(spi->master);
 336
 337        /* SPI core provides CS high / low, but bitbang driver
 338         * expects CS active
 339         * spi device driver takes care of handling SPI_CS_HIGH
 340         */
 341        enable = (!!(spi->mode & SPI_CS_HIGH) == enable);
 342
 343        ndelay(SPI_BITBANG_CS_DELAY);
 344        bitbang->chipselect(spi, enable ? BITBANG_CS_ACTIVE :
 345                            BITBANG_CS_INACTIVE);
 346        ndelay(SPI_BITBANG_CS_DELAY);
 347}
 348
 349/*----------------------------------------------------------------------*/
 350
 351/**
 352 * spi_bitbang_start - start up a polled/bitbanging SPI master driver
 353 * @bitbang: driver handle
 354 *
 355 * Caller should have zero-initialized all parts of the structure, and then
 356 * provided callbacks for chip selection and I/O loops.  If the master has
 357 * a transfer method, its final step should call spi_bitbang_transfer; or,
 358 * that's the default if the transfer routine is not initialized.  It should
 359 * also set up the bus number and number of chipselects.
 360 *
 361 * For i/o loops, provide callbacks either per-word (for bitbanging, or for
 362 * hardware that basically exposes a shift register) or per-spi_transfer
 363 * (which takes better advantage of hardware like fifos or DMA engines).
 364 *
 365 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
 366 * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
 367 * master methods.  Those methods are the defaults if the bitbang->txrx_bufs
 368 * routine isn't initialized.
 369 *
 370 * This routine registers the spi_master, which will process requests in a
 371 * dedicated task, keeping IRQs unblocked most of the time.  To stop
 372 * processing those requests, call spi_bitbang_stop().
 373 *
 374 * On success, this routine will take a reference to master. The caller is
 375 * responsible for calling spi_bitbang_stop() to decrement the reference and
 376 * spi_master_put() as counterpart of spi_alloc_master() to prevent a memory
 377 * leak.
 378 */
 379int spi_bitbang_start(struct spi_bitbang *bitbang)
 380{
 381        struct spi_master *master = bitbang->master;
 382        int ret;
 383
 384        if (!master || !bitbang->chipselect)
 385                return -EINVAL;
 386
 387        mutex_init(&bitbang->lock);
 388
 389        if (!master->mode_bits)
 390                master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags;
 391
 392        if (master->transfer || master->transfer_one_message)
 393                return -EINVAL;
 394
 395        master->prepare_transfer_hardware = spi_bitbang_prepare_hardware;
 396        master->unprepare_transfer_hardware = spi_bitbang_unprepare_hardware;
 397        master->transfer_one = spi_bitbang_transfer_one;
 398        master->set_cs = spi_bitbang_set_cs;
 399
 400        if (!bitbang->txrx_bufs) {
 401                bitbang->use_dma = 0;
 402                bitbang->txrx_bufs = spi_bitbang_bufs;
 403                if (!master->setup) {
 404                        if (!bitbang->setup_transfer)
 405                                bitbang->setup_transfer =
 406                                         spi_bitbang_setup_transfer;
 407                        master->setup = spi_bitbang_setup;
 408                        master->cleanup = spi_bitbang_cleanup;
 409                }
 410        }
 411
 412        /* driver may get busy before register() returns, especially
 413         * if someone registered boardinfo for devices
 414         */
 415        ret = spi_register_master(spi_master_get(master));
 416        if (ret)
 417                spi_master_put(master);
 418
 419        return 0;
 420}
 421EXPORT_SYMBOL_GPL(spi_bitbang_start);
 422
 423/**
 424 * spi_bitbang_stop - stops the task providing spi communication
 425 */
 426void spi_bitbang_stop(struct spi_bitbang *bitbang)
 427{
 428        spi_unregister_master(bitbang->master);
 429}
 430EXPORT_SYMBOL_GPL(spi_bitbang_stop);
 431
 432MODULE_LICENSE("GPL");
 433
 434