1
2#ifndef _IDE_H
3#define _IDE_H
4
5
6
7
8
9
10#include <linux/init.h>
11#include <linux/ioport.h>
12#include <linux/ata.h>
13#include <linux/blk-mq.h>
14#include <linux/proc_fs.h>
15#include <linux/interrupt.h>
16#include <linux/bitops.h>
17#include <linux/bio.h>
18#include <linux/pci.h>
19#include <linux/completion.h>
20#include <linux/pm.h>
21#include <linux/mutex.h>
22
23#include <linux/cdrom.h>
24#include <scsi/scsi_cmnd.h>
25#include <asm/byteorder.h>
26#include <asm/io.h>
27
28
29
30
31#define SUPPORT_VLB_SYNC 1
32#define IDE_DEFAULT_MAX_FAILURES 1
33#define ERROR_MAX 8
34#define ERROR_RESET 3
35#define ERROR_RECAL 1
36
37struct device;
38
39
40enum ata_priv_type {
41 ATA_PRIV_MISC,
42 ATA_PRIV_TASKFILE,
43 ATA_PRIV_PC,
44 ATA_PRIV_SENSE,
45 ATA_PRIV_PM_SUSPEND,
46 ATA_PRIV_PM_RESUME,
47};
48
49struct ide_request {
50 struct scsi_request sreq;
51 u8 sense[SCSI_SENSE_BUFFERSIZE];
52 u8 type;
53 void *special;
54};
55
56static inline struct ide_request *ide_req(struct request *rq)
57{
58 return blk_mq_rq_to_pdu(rq);
59}
60
61static inline bool ata_misc_request(struct request *rq)
62{
63 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_MISC;
64}
65
66static inline bool ata_taskfile_request(struct request *rq)
67{
68 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_TASKFILE;
69}
70
71static inline bool ata_pc_request(struct request *rq)
72{
73 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_PC;
74}
75
76static inline bool ata_sense_request(struct request *rq)
77{
78 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_SENSE;
79}
80
81static inline bool ata_pm_request(struct request *rq)
82{
83 return blk_rq_is_private(rq) &&
84 (ide_req(rq)->type == ATA_PRIV_PM_SUSPEND ||
85 ide_req(rq)->type == ATA_PRIV_PM_RESUME);
86}
87
88
89enum {
90 IDE_DRV_ERROR_GENERAL = 101,
91 IDE_DRV_ERROR_FILEMARK = 102,
92 IDE_DRV_ERROR_EOD = 103,
93};
94
95
96
97
98#define IDE_NR_PORTS (10)
99
100struct ide_io_ports {
101 unsigned long data_addr;
102
103 union {
104 unsigned long error_addr;
105 unsigned long feature_addr;
106 };
107
108 unsigned long nsect_addr;
109 unsigned long lbal_addr;
110 unsigned long lbam_addr;
111 unsigned long lbah_addr;
112
113 unsigned long device_addr;
114
115 union {
116 unsigned long status_addr;
117 unsigned long command_addr;
118 };
119
120 unsigned long ctl_addr;
121
122 unsigned long irq_addr;
123};
124
125#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
126
127#define BAD_R_STAT (ATA_BUSY | ATA_ERR)
128#define BAD_W_STAT (BAD_R_STAT | ATA_DF)
129#define BAD_STAT (BAD_R_STAT | ATA_DRQ)
130#define DRIVE_READY (ATA_DRDY | ATA_DSC)
131
132#define BAD_CRC (ATA_ABORTED | ATA_ICRC)
133
134#define SATA_NR_PORTS (3)
135
136#define SATA_STATUS_OFFSET (0)
137#define SATA_ERROR_OFFSET (1)
138#define SATA_CONTROL_OFFSET (2)
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156#define PRD_BYTES 8
157#define PRD_ENTRIES 256
158
159
160
161
162#define PARTN_BITS 6
163#define MAX_DRIVES 2
164
165
166
167
168enum {
169
170 WAIT_DRQ = 1 * HZ,
171
172 WAIT_READY = 5 * HZ,
173
174 WAIT_PIDENTIFY = 10 * HZ,
175
176 WAIT_WORSTCASE = 30 * HZ,
177
178 WAIT_CMD = 10 * HZ,
179
180 WAIT_FLOPPY_CMD = 50 * HZ,
181
182
183
184
185
186 WAIT_TAPE_CMD = 900 * HZ,
187
188 WAIT_MIN_SLEEP = HZ / 50,
189};
190
191
192
193
194
195#define REQ_DRIVE_RESET 0x20
196#define REQ_DEVSET_EXEC 0x21
197#define REQ_PARK_HEADS 0x22
198#define REQ_UNPARK_HEADS 0x23
199
200
201
202
203
204enum { ide_unknown, ide_generic, ide_pci,
205 ide_cmd640, ide_dtc2278, ide_ali14xx,
206 ide_qd65xx, ide_umc8672, ide_ht6560b,
207 ide_4drives, ide_pmac, ide_acorn,
208 ide_au1xxx, ide_palm3710
209};
210
211typedef u8 hwif_chipset_t;
212
213
214
215
216struct ide_hw {
217 union {
218 struct ide_io_ports io_ports;
219 unsigned long io_ports_array[IDE_NR_PORTS];
220 };
221
222 int irq;
223 struct device *dev, *parent;
224 unsigned long config;
225};
226
227static inline void ide_std_init_ports(struct ide_hw *hw,
228 unsigned long io_addr,
229 unsigned long ctl_addr)
230{
231 unsigned int i;
232
233 for (i = 0; i <= 7; i++)
234 hw->io_ports_array[i] = io_addr++;
235
236 hw->io_ports.ctl_addr = ctl_addr;
237}
238
239#define MAX_HWIFS 10
240
241
242
243
244
245#define ide_scsi 0x21
246#define ide_disk 0x20
247#define ide_optical 0x7
248#define ide_cdrom 0x5
249#define ide_tape 0x1
250#define ide_floppy 0x0
251
252
253
254
255enum {
256 IDE_SFLAG_SET_GEOMETRY = (1 << 0),
257 IDE_SFLAG_RECALIBRATE = (1 << 1),
258 IDE_SFLAG_SET_MULTMODE = (1 << 2),
259};
260
261
262
263
264typedef enum {
265 ide_stopped,
266 ide_started,
267} ide_startstop_t;
268
269enum {
270 IDE_VALID_ERROR = (1 << 1),
271 IDE_VALID_FEATURE = IDE_VALID_ERROR,
272 IDE_VALID_NSECT = (1 << 2),
273 IDE_VALID_LBAL = (1 << 3),
274 IDE_VALID_LBAM = (1 << 4),
275 IDE_VALID_LBAH = (1 << 5),
276 IDE_VALID_DEVICE = (1 << 6),
277 IDE_VALID_LBA = IDE_VALID_LBAL |
278 IDE_VALID_LBAM |
279 IDE_VALID_LBAH,
280 IDE_VALID_OUT_TF = IDE_VALID_FEATURE |
281 IDE_VALID_NSECT |
282 IDE_VALID_LBA,
283 IDE_VALID_IN_TF = IDE_VALID_NSECT |
284 IDE_VALID_LBA,
285 IDE_VALID_OUT_HOB = IDE_VALID_OUT_TF,
286 IDE_VALID_IN_HOB = IDE_VALID_ERROR |
287 IDE_VALID_NSECT |
288 IDE_VALID_LBA,
289};
290
291enum {
292 IDE_TFLAG_LBA48 = (1 << 0),
293 IDE_TFLAG_WRITE = (1 << 1),
294 IDE_TFLAG_CUSTOM_HANDLER = (1 << 2),
295 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 3),
296
297 IDE_TFLAG_IO_16BIT = (1 << 4),
298
299 IDE_TFLAG_DYN = (1 << 5),
300 IDE_TFLAG_FS = (1 << 6),
301 IDE_TFLAG_MULTI_PIO = (1 << 7),
302 IDE_TFLAG_SET_XFER = (1 << 8),
303};
304
305enum {
306 IDE_FTFLAG_FLAGGED = (1 << 0),
307 IDE_FTFLAG_SET_IN_FLAGS = (1 << 1),
308 IDE_FTFLAG_OUT_DATA = (1 << 2),
309 IDE_FTFLAG_IN_DATA = (1 << 3),
310};
311
312struct ide_taskfile {
313 u8 data;
314 union {
315 u8 error;
316 u8 feature;
317 };
318 u8 nsect;
319 u8 lbal;
320 u8 lbam;
321 u8 lbah;
322 u8 device;
323 union {
324 u8 status;
325 u8 command;
326 };
327};
328
329struct ide_cmd {
330 struct ide_taskfile tf;
331 struct ide_taskfile hob;
332 struct {
333 struct {
334 u8 tf;
335 u8 hob;
336 } out, in;
337 } valid;
338
339 u16 tf_flags;
340 u8 ftf_flags;
341 int protocol;
342
343 int sg_nents;
344 int orig_sg_nents;
345 int sg_dma_direction;
346
347 unsigned int nbytes;
348 unsigned int nleft;
349 unsigned int last_xfer_len;
350
351 struct scatterlist *cursg;
352 unsigned int cursg_ofs;
353
354 struct request *rq;
355};
356
357
358enum {
359
360 PC_FLAG_ABORT = (1 << 0),
361 PC_FLAG_SUPPRESS_ERROR = (1 << 1),
362 PC_FLAG_WAIT_FOR_DSC = (1 << 2),
363 PC_FLAG_DMA_OK = (1 << 3),
364 PC_FLAG_DMA_IN_PROGRESS = (1 << 4),
365 PC_FLAG_DMA_ERROR = (1 << 5),
366 PC_FLAG_WRITING = (1 << 6),
367};
368
369#define ATAPI_WAIT_PC (60 * HZ)
370
371struct ide_atapi_pc {
372
373 u8 c[12];
374
375 int retries;
376 int error;
377
378
379 int req_xfer;
380
381
382 struct request *rq;
383
384 unsigned long flags;
385
386
387
388
389
390 unsigned long timeout;
391};
392
393struct ide_devset;
394struct ide_driver;
395
396#ifdef CONFIG_BLK_DEV_IDEACPI
397struct ide_acpi_drive_link;
398struct ide_acpi_hwif_link;
399#endif
400
401struct ide_drive_s;
402
403struct ide_disk_ops {
404 int (*check)(struct ide_drive_s *, const char *);
405 int (*get_capacity)(struct ide_drive_s *);
406 void (*unlock_native_capacity)(struct ide_drive_s *);
407 void (*setup)(struct ide_drive_s *);
408 void (*flush)(struct ide_drive_s *);
409 int (*init_media)(struct ide_drive_s *, struct gendisk *);
410 int (*set_doorlock)(struct ide_drive_s *, struct gendisk *,
411 int);
412 ide_startstop_t (*do_request)(struct ide_drive_s *, struct request *,
413 sector_t);
414 int (*ioctl)(struct ide_drive_s *, struct block_device *,
415 fmode_t, unsigned int, unsigned long);
416};
417
418
419enum {
420 IDE_AFLAG_DRQ_INTERRUPT = (1 << 0),
421
422
423
424 IDE_AFLAG_NO_EJECT = (1 << 1),
425
426 IDE_AFLAG_PRE_ATAPI12 = (1 << 2),
427
428 IDE_AFLAG_TOCADDR_AS_BCD = (1 << 3),
429
430 IDE_AFLAG_TOCTRACKS_AS_BCD = (1 << 4),
431
432 IDE_AFLAG_TOC_VALID = (1 << 6),
433
434 IDE_AFLAG_DOOR_LOCKED = (1 << 7),
435
436 IDE_AFLAG_NO_SPEED_SELECT = (1 << 8),
437 IDE_AFLAG_VERTOS_300_SSD = (1 << 9),
438 IDE_AFLAG_VERTOS_600_ESD = (1 << 10),
439 IDE_AFLAG_SANYO_3CD = (1 << 11),
440 IDE_AFLAG_FULL_CAPS_PAGE = (1 << 12),
441 IDE_AFLAG_PLAY_AUDIO_OK = (1 << 13),
442 IDE_AFLAG_LE_SPEED_FIELDS = (1 << 14),
443
444
445
446 IDE_AFLAG_CLIK_DRIVE = (1 << 15),
447
448 IDE_AFLAG_ZIP_DRIVE = (1 << 16),
449
450 IDE_AFLAG_SRFP = (1 << 17),
451
452
453 IDE_AFLAG_IGNORE_DSC = (1 << 18),
454
455 IDE_AFLAG_ADDRESS_VALID = (1 << 19),
456
457 IDE_AFLAG_BUSY = (1 << 20),
458
459 IDE_AFLAG_DETECT_BS = (1 << 21),
460
461 IDE_AFLAG_FILEMARK = (1 << 22),
462
463 IDE_AFLAG_MEDIUM_PRESENT = (1 << 23),
464
465 IDE_AFLAG_NO_AUTOCLOSE = (1 << 24),
466};
467
468
469enum {
470
471 IDE_DFLAG_KEEP_SETTINGS = (1 << 0),
472
473 IDE_DFLAG_USING_DMA = (1 << 1),
474
475 IDE_DFLAG_UNMASK = (1 << 2),
476
477 IDE_DFLAG_NOFLUSH = (1 << 3),
478
479 IDE_DFLAG_DSC_OVERLAP = (1 << 4),
480
481 IDE_DFLAG_NICE1 = (1 << 5),
482
483 IDE_DFLAG_PRESENT = (1 << 6),
484
485 IDE_DFLAG_NOHPA = (1 << 7),
486
487 IDE_DFLAG_ID_READ = (1 << 8),
488 IDE_DFLAG_NOPROBE = (1 << 9),
489
490 IDE_DFLAG_REMOVABLE = (1 << 10),
491
492 IDE_DFLAG_ATTACH = (1 << 11),
493 IDE_DFLAG_FORCED_GEOM = (1 << 12),
494
495 IDE_DFLAG_NO_UNMASK = (1 << 13),
496
497 IDE_DFLAG_NO_IO_32BIT = (1 << 14),
498
499 IDE_DFLAG_DOORLOCKING = (1 << 15),
500
501 IDE_DFLAG_NODMA = (1 << 16),
502
503 IDE_DFLAG_BLOCKED = (1 << 17),
504
505 IDE_DFLAG_SLEEPING = (1 << 18),
506 IDE_DFLAG_POST_RESET = (1 << 19),
507 IDE_DFLAG_UDMA33_WARNED = (1 << 20),
508 IDE_DFLAG_LBA48 = (1 << 21),
509
510 IDE_DFLAG_WCACHE = (1 << 22),
511
512 IDE_DFLAG_NOWERR = (1 << 23),
513
514 IDE_DFLAG_DMA_PIO_RETRY = (1 << 24),
515 IDE_DFLAG_LBA = (1 << 25),
516
517 IDE_DFLAG_NO_UNLOAD = (1 << 26),
518
519 IDE_DFLAG_PARKED = (1 << 27),
520 IDE_DFLAG_MEDIA_CHANGED = (1 << 28),
521
522 IDE_DFLAG_WP = (1 << 29),
523 IDE_DFLAG_FORMAT_IN_PROGRESS = (1 << 30),
524 IDE_DFLAG_NIEN_QUIRK = (1 << 31),
525};
526
527struct ide_drive_s {
528 char name[4];
529 char driver_req[10];
530
531 struct request_queue *queue;
532
533 bool (*prep_rq)(struct ide_drive_s *, struct request *);
534
535 struct blk_mq_tag_set tag_set;
536
537 struct request *rq;
538 void *driver_data;
539 u16 *id;
540#ifdef CONFIG_IDE_PROC_FS
541 struct proc_dir_entry *proc;
542 const struct ide_proc_devset *settings;
543#endif
544 struct hwif_s *hwif;
545
546 const struct ide_disk_ops *disk_ops;
547
548 unsigned long dev_flags;
549
550 unsigned long sleep;
551 unsigned long timeout;
552
553 u8 special_flags;
554
555 u8 select;
556 u8 retry_pio;
557 u8 waiting_for_dma;
558 u8 dma;
559
560 u8 init_speed;
561 u8 current_speed;
562 u8 desired_speed;
563 u8 pio_mode;
564 u8 dma_mode;
565 u8 dn;
566 u8 acoustic;
567 u8 media;
568 u8 ready_stat;
569 u8 mult_count;
570 u8 mult_req;
571 u8 io_32bit;
572 u8 bad_wstat;
573 u8 head;
574 u8 sect;
575 u8 bios_head;
576 u8 bios_sect;
577
578
579 u8 pc_delay;
580
581 unsigned int bios_cyl;
582 unsigned int cyl;
583 void *drive_data;
584 unsigned int failures;
585 unsigned int max_failures;
586 u64 probed_capacity;
587 u64 capacity64;
588
589 int lun;
590 int crc_count;
591
592 unsigned long debug_mask;
593
594#ifdef CONFIG_BLK_DEV_IDEACPI
595 struct ide_acpi_drive_link *acpidata;
596#endif
597 struct list_head list;
598 struct device gendev;
599 struct completion gendev_rel_comp;
600
601
602 struct ide_atapi_pc *pc;
603
604
605 struct ide_atapi_pc *failed_pc;
606
607
608 int (*pc_callback)(struct ide_drive_s *, int);
609
610 ide_startstop_t (*irq_handler)(struct ide_drive_s *);
611
612 unsigned long atapi_flags;
613
614 struct ide_atapi_pc request_sense_pc;
615
616
617 bool sense_rq_armed;
618 struct request *sense_rq;
619 struct request_sense sense_data;
620
621
622 struct work_struct rq_work;
623 struct list_head rq_list;
624};
625
626typedef struct ide_drive_s ide_drive_t;
627
628#define to_ide_device(dev) container_of(dev, ide_drive_t, gendev)
629
630#define to_ide_drv(obj, cont_type) \
631 container_of(obj, struct cont_type, dev)
632
633#define ide_drv_g(disk, cont_type) \
634 container_of((disk)->private_data, struct cont_type, driver)
635
636struct ide_port_info;
637
638struct ide_tp_ops {
639 void (*exec_command)(struct hwif_s *, u8);
640 u8 (*read_status)(struct hwif_s *);
641 u8 (*read_altstatus)(struct hwif_s *);
642 void (*write_devctl)(struct hwif_s *, u8);
643
644 void (*dev_select)(ide_drive_t *);
645 void (*tf_load)(ide_drive_t *, struct ide_taskfile *, u8);
646 void (*tf_read)(ide_drive_t *, struct ide_taskfile *, u8);
647
648 void (*input_data)(ide_drive_t *, struct ide_cmd *,
649 void *, unsigned int);
650 void (*output_data)(ide_drive_t *, struct ide_cmd *,
651 void *, unsigned int);
652};
653
654extern const struct ide_tp_ops default_tp_ops;
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674struct ide_port_ops {
675 void (*init_dev)(ide_drive_t *);
676 void (*set_pio_mode)(struct hwif_s *, ide_drive_t *);
677 void (*set_dma_mode)(struct hwif_s *, ide_drive_t *);
678 blk_status_t (*reset_poll)(ide_drive_t *);
679 void (*pre_reset)(ide_drive_t *);
680 void (*resetproc)(ide_drive_t *);
681 void (*maskproc)(ide_drive_t *, int);
682 void (*quirkproc)(ide_drive_t *);
683 void (*clear_irq)(ide_drive_t *);
684 int (*test_irq)(struct hwif_s *);
685
686 u8 (*mdma_filter)(ide_drive_t *);
687 u8 (*udma_filter)(ide_drive_t *);
688
689 u8 (*cable_detect)(struct hwif_s *);
690};
691
692struct ide_dma_ops {
693 void (*dma_host_set)(struct ide_drive_s *, int);
694 int (*dma_setup)(struct ide_drive_s *, struct ide_cmd *);
695 void (*dma_start)(struct ide_drive_s *);
696 int (*dma_end)(struct ide_drive_s *);
697 int (*dma_test_irq)(struct ide_drive_s *);
698 void (*dma_lost_irq)(struct ide_drive_s *);
699
700 int (*dma_check)(struct ide_drive_s *, struct ide_cmd *);
701 int (*dma_timer_expiry)(struct ide_drive_s *);
702 void (*dma_clear)(struct ide_drive_s *);
703
704
705
706
707 u8 (*dma_sff_read_status)(struct hwif_s *);
708};
709
710enum {
711 IDE_PFLAG_PROBING = (1 << 0),
712};
713
714struct ide_host;
715
716typedef struct hwif_s {
717 struct hwif_s *mate;
718 struct proc_dir_entry *proc;
719
720 struct ide_host *host;
721
722 char name[6];
723
724 struct ide_io_ports io_ports;
725
726 unsigned long sata_scr[SATA_NR_PORTS];
727
728 ide_drive_t *devices[MAX_DRIVES + 1];
729
730 unsigned long port_flags;
731
732 u8 major;
733 u8 index;
734 u8 channel;
735
736 u32 host_flags;
737
738 u8 pio_mask;
739
740 u8 ultra_mask;
741 u8 mwdma_mask;
742 u8 swdma_mask;
743
744 u8 cbl;
745
746 hwif_chipset_t chipset;
747
748 struct device *dev;
749
750 void (*rw_disk)(ide_drive_t *, struct request *);
751
752 const struct ide_tp_ops *tp_ops;
753 const struct ide_port_ops *port_ops;
754 const struct ide_dma_ops *dma_ops;
755
756
757 unsigned int *dmatable_cpu;
758
759 dma_addr_t dmatable_dma;
760
761
762 int prd_max_nents;
763
764 int prd_ent_size;
765
766
767 struct scatterlist *sg_table;
768 int sg_max_nents;
769
770 struct ide_cmd cmd;
771
772 int rqsize;
773 int irq;
774
775 unsigned long dma_base;
776
777 unsigned long config_data;
778 unsigned long select_data;
779
780 unsigned long extra_base;
781 unsigned extra_ports;
782
783 unsigned present : 1;
784 unsigned busy : 1;
785
786 struct device gendev;
787 struct device *portdev;
788
789 struct completion gendev_rel_comp;
790
791 void *hwif_data;
792
793#ifdef CONFIG_BLK_DEV_IDEACPI
794 struct ide_acpi_hwif_link *acpidata;
795#endif
796
797
798 ide_startstop_t (*handler)(ide_drive_t *);
799
800
801 unsigned int polling : 1;
802
803
804 ide_drive_t *cur_dev;
805
806
807 struct request *rq;
808
809
810 struct timer_list timer;
811
812 unsigned long poll_timeout;
813
814 int (*expiry)(ide_drive_t *);
815
816 int req_gen;
817 int req_gen_timer;
818
819 spinlock_t lock;
820} ____cacheline_internodealigned_in_smp ide_hwif_t;
821
822#define MAX_HOST_PORTS 4
823
824struct ide_host {
825 ide_hwif_t *ports[MAX_HOST_PORTS + 1];
826 unsigned int n_ports;
827 struct device *dev[2];
828
829 int (*init_chipset)(struct pci_dev *);
830
831 void (*get_lock)(irq_handler_t, void *);
832 void (*release_lock)(void);
833
834 irq_handler_t irq_handler;
835
836 unsigned long host_flags;
837
838 int irq_flags;
839
840 void *host_priv;
841 ide_hwif_t *cur_port;
842
843
844 volatile unsigned long host_busy;
845};
846
847#define IDE_HOST_BUSY 0
848
849
850
851
852typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
853typedef int (ide_expiry_t)(ide_drive_t *);
854
855
856typedef void (xfer_func_t)(ide_drive_t *, struct ide_cmd *, void *, unsigned);
857
858extern struct mutex ide_setting_mtx;
859
860
861
862
863
864#define DS_SYNC (1 << 0)
865
866struct ide_devset {
867 int (*get)(ide_drive_t *);
868 int (*set)(ide_drive_t *, int);
869 unsigned int flags;
870};
871
872#define __DEVSET(_flags, _get, _set) { \
873 .flags = _flags, \
874 .get = _get, \
875 .set = _set, \
876}
877
878#define ide_devset_get(name, field) \
879static int get_##name(ide_drive_t *drive) \
880{ \
881 return drive->field; \
882}
883
884#define ide_devset_set(name, field) \
885static int set_##name(ide_drive_t *drive, int arg) \
886{ \
887 drive->field = arg; \
888 return 0; \
889}
890
891#define ide_devset_get_flag(name, flag) \
892static int get_##name(ide_drive_t *drive) \
893{ \
894 return !!(drive->dev_flags & flag); \
895}
896
897#define ide_devset_set_flag(name, flag) \
898static int set_##name(ide_drive_t *drive, int arg) \
899{ \
900 if (arg) \
901 drive->dev_flags |= flag; \
902 else \
903 drive->dev_flags &= ~flag; \
904 return 0; \
905}
906
907#define __IDE_DEVSET(_name, _flags, _get, _set) \
908const struct ide_devset ide_devset_##_name = \
909 __DEVSET(_flags, _get, _set)
910
911#define IDE_DEVSET(_name, _flags, _get, _set) \
912static __IDE_DEVSET(_name, _flags, _get, _set)
913
914#define ide_devset_rw(_name, _func) \
915IDE_DEVSET(_name, 0, get_##_func, set_##_func)
916
917#define ide_devset_w(_name, _func) \
918IDE_DEVSET(_name, 0, NULL, set_##_func)
919
920#define ide_ext_devset_rw(_name, _func) \
921__IDE_DEVSET(_name, 0, get_##_func, set_##_func)
922
923#define ide_ext_devset_rw_sync(_name, _func) \
924__IDE_DEVSET(_name, DS_SYNC, get_##_func, set_##_func)
925
926#define ide_decl_devset(_name) \
927extern const struct ide_devset ide_devset_##_name
928
929ide_decl_devset(io_32bit);
930ide_decl_devset(keepsettings);
931ide_decl_devset(pio_mode);
932ide_decl_devset(unmaskirq);
933ide_decl_devset(using_dma);
934
935#ifdef CONFIG_IDE_PROC_FS
936
937
938
939
940#define ide_devset_rw_field(_name, _field) \
941ide_devset_get(_name, _field); \
942ide_devset_set(_name, _field); \
943IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
944
945#define ide_devset_rw_flag(_name, _field) \
946ide_devset_get_flag(_name, _field); \
947ide_devset_set_flag(_name, _field); \
948IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
949
950struct ide_proc_devset {
951 const char *name;
952 const struct ide_devset *setting;
953 int min, max;
954 int (*mulf)(ide_drive_t *);
955 int (*divf)(ide_drive_t *);
956};
957
958#define __IDE_PROC_DEVSET(_name, _min, _max, _mulf, _divf) { \
959 .name = __stringify(_name), \
960 .setting = &ide_devset_##_name, \
961 .min = _min, \
962 .max = _max, \
963 .mulf = _mulf, \
964 .divf = _divf, \
965}
966
967#define IDE_PROC_DEVSET(_name, _min, _max) \
968__IDE_PROC_DEVSET(_name, _min, _max, NULL, NULL)
969
970typedef struct {
971 const char *name;
972 umode_t mode;
973 int (*show)(struct seq_file *, void *);
974} ide_proc_entry_t;
975
976void proc_ide_create(void);
977void proc_ide_destroy(void);
978void ide_proc_register_port(ide_hwif_t *);
979void ide_proc_port_register_devices(ide_hwif_t *);
980void ide_proc_unregister_device(ide_drive_t *);
981void ide_proc_unregister_port(ide_hwif_t *);
982void ide_proc_register_driver(ide_drive_t *, struct ide_driver *);
983void ide_proc_unregister_driver(ide_drive_t *, struct ide_driver *);
984
985int ide_capacity_proc_show(struct seq_file *m, void *v);
986int ide_geometry_proc_show(struct seq_file *m, void *v);
987#else
988static inline void proc_ide_create(void) { ; }
989static inline void proc_ide_destroy(void) { ; }
990static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
991static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
992static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
993static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
994static inline void ide_proc_register_driver(ide_drive_t *drive,
995 struct ide_driver *driver) { ; }
996static inline void ide_proc_unregister_driver(ide_drive_t *drive,
997 struct ide_driver *driver) { ; }
998#endif
999
1000enum {
1001
1002 IDE_DBG_FUNC = (1 << 0),
1003
1004 IDE_DBG_SENSE = (1 << 1),
1005
1006 IDE_DBG_PC = (1 << 2),
1007
1008 IDE_DBG_RQ = (1 << 3),
1009
1010 IDE_DBG_PROBE = (1 << 4),
1011};
1012
1013
1014#define __ide_debug_log(lvl, fmt, args...) \
1015{ \
1016 if (unlikely(drive->debug_mask & lvl)) \
1017 printk(KERN_INFO DRV_NAME ": %s: " fmt "\n", \
1018 __func__, ## args); \
1019}
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039enum {
1040 IDE_PM_START_SUSPEND,
1041 IDE_PM_FLUSH_CACHE = IDE_PM_START_SUSPEND,
1042 IDE_PM_STANDBY,
1043
1044 IDE_PM_START_RESUME,
1045 IDE_PM_RESTORE_PIO = IDE_PM_START_RESUME,
1046 IDE_PM_IDLE,
1047 IDE_PM_RESTORE_DMA,
1048
1049 IDE_PM_COMPLETED,
1050};
1051
1052int generic_ide_suspend(struct device *, pm_message_t);
1053int generic_ide_resume(struct device *);
1054
1055void ide_complete_power_step(ide_drive_t *, struct request *);
1056ide_startstop_t ide_start_power_step(ide_drive_t *, struct request *);
1057void ide_complete_pm_rq(ide_drive_t *, struct request *);
1058void ide_check_pm_state(ide_drive_t *, struct request *);
1059
1060
1061
1062
1063
1064
1065
1066struct ide_driver {
1067 const char *version;
1068 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
1069 struct device_driver gen_driver;
1070 int (*probe)(ide_drive_t *);
1071 void (*remove)(ide_drive_t *);
1072 void (*resume)(ide_drive_t *);
1073 void (*shutdown)(ide_drive_t *);
1074#ifdef CONFIG_IDE_PROC_FS
1075 ide_proc_entry_t * (*proc_entries)(ide_drive_t *);
1076 const struct ide_proc_devset * (*proc_devsets)(ide_drive_t *);
1077#endif
1078};
1079
1080#define to_ide_driver(drv) container_of(drv, struct ide_driver, gen_driver)
1081
1082int ide_device_get(ide_drive_t *);
1083void ide_device_put(ide_drive_t *);
1084
1085struct ide_ioctl_devset {
1086 unsigned int get_ioctl;
1087 unsigned int set_ioctl;
1088 const struct ide_devset *setting;
1089};
1090
1091int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int,
1092 unsigned long, const struct ide_ioctl_devset *);
1093
1094int generic_ide_ioctl(ide_drive_t *, struct block_device *, unsigned, unsigned long);
1095
1096extern int ide_vlb_clk;
1097extern int ide_pci_clk;
1098
1099int ide_end_rq(ide_drive_t *, struct request *, blk_status_t, unsigned int);
1100void ide_kill_rq(ide_drive_t *, struct request *);
1101void ide_insert_request_head(ide_drive_t *, struct request *);
1102
1103void __ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int);
1104void ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int);
1105
1106void ide_execute_command(ide_drive_t *, struct ide_cmd *, ide_handler_t *,
1107 unsigned int);
1108
1109void ide_pad_transfer(ide_drive_t *, int, int);
1110
1111ide_startstop_t ide_error(ide_drive_t *, const char *, u8);
1112
1113void ide_fix_driveid(u16 *);
1114
1115extern void ide_fixstring(u8 *, const int, const int);
1116
1117int ide_busy_sleep(ide_drive_t *, unsigned long, int);
1118
1119int __ide_wait_stat(ide_drive_t *, u8, u8, unsigned long, u8 *);
1120int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1121
1122ide_startstop_t ide_do_park_unpark(ide_drive_t *, struct request *);
1123ide_startstop_t ide_do_devset(ide_drive_t *, struct request *);
1124
1125extern ide_startstop_t ide_do_reset (ide_drive_t *);
1126
1127extern int ide_devset_execute(ide_drive_t *drive,
1128 const struct ide_devset *setting, int arg);
1129
1130void ide_complete_cmd(ide_drive_t *, struct ide_cmd *, u8, u8);
1131int ide_complete_rq(ide_drive_t *, blk_status_t, unsigned int);
1132
1133void ide_tf_readback(ide_drive_t *drive, struct ide_cmd *cmd);
1134void ide_tf_dump(const char *, struct ide_cmd *);
1135
1136void ide_exec_command(ide_hwif_t *, u8);
1137u8 ide_read_status(ide_hwif_t *);
1138u8 ide_read_altstatus(ide_hwif_t *);
1139void ide_write_devctl(ide_hwif_t *, u8);
1140
1141void ide_dev_select(ide_drive_t *);
1142void ide_tf_load(ide_drive_t *, struct ide_taskfile *, u8);
1143void ide_tf_read(ide_drive_t *, struct ide_taskfile *, u8);
1144
1145void ide_input_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int);
1146void ide_output_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int);
1147
1148void SELECT_MASK(ide_drive_t *, int);
1149
1150u8 ide_read_error(ide_drive_t *);
1151void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *);
1152
1153int ide_check_ireason(ide_drive_t *, struct request *, int, int, int);
1154
1155int ide_check_atapi_device(ide_drive_t *, const char *);
1156
1157void ide_init_pc(struct ide_atapi_pc *);
1158
1159
1160extern wait_queue_head_t ide_park_wq;
1161ssize_t ide_park_show(struct device *dev, struct device_attribute *attr,
1162 char *buf);
1163ssize_t ide_park_store(struct device *dev, struct device_attribute *attr,
1164 const char *buf, size_t len);
1165
1166
1167
1168
1169
1170
1171
1172enum {
1173 REQ_IDETAPE_PC1 = (1 << 0),
1174 REQ_IDETAPE_PC2 = (1 << 1),
1175 REQ_IDETAPE_READ = (1 << 2),
1176 REQ_IDETAPE_WRITE = (1 << 3),
1177};
1178
1179int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *,
1180 void *, unsigned int);
1181
1182int ide_do_test_unit_ready(ide_drive_t *, struct gendisk *);
1183int ide_do_start_stop(ide_drive_t *, struct gendisk *, int);
1184int ide_set_media_lock(ide_drive_t *, struct gendisk *, int);
1185void ide_create_request_sense_cmd(ide_drive_t *, struct ide_atapi_pc *);
1186void ide_retry_pc(ide_drive_t *drive);
1187
1188void ide_prep_sense(ide_drive_t *drive, struct request *rq);
1189int ide_queue_sense_rq(ide_drive_t *drive, void *special);
1190
1191int ide_cd_expiry(ide_drive_t *);
1192
1193int ide_cd_get_xferlen(struct request *);
1194
1195ide_startstop_t ide_issue_pc(ide_drive_t *, struct ide_cmd *);
1196
1197ide_startstop_t do_rw_taskfile(ide_drive_t *, struct ide_cmd *);
1198
1199void ide_pio_bytes(ide_drive_t *, struct ide_cmd *, unsigned int, unsigned int);
1200
1201void ide_finish_cmd(ide_drive_t *, struct ide_cmd *, u8);
1202
1203int ide_raw_taskfile(ide_drive_t *, struct ide_cmd *, u8 *, u16);
1204int ide_no_data_taskfile(ide_drive_t *, struct ide_cmd *);
1205
1206int ide_taskfile_ioctl(ide_drive_t *, unsigned long);
1207
1208int ide_dev_read_id(ide_drive_t *, u8, u16 *, int);
1209
1210extern int ide_driveid_update(ide_drive_t *);
1211extern int ide_config_drive_speed(ide_drive_t *, u8);
1212extern u8 eighty_ninty_three (ide_drive_t *);
1213extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1214
1215extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1216
1217extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1218
1219extern void ide_timer_expiry(struct timer_list *t);
1220extern irqreturn_t ide_intr(int irq, void *dev_id);
1221extern blk_status_t ide_queue_rq(struct blk_mq_hw_ctx *, const struct blk_mq_queue_data *);
1222extern void ide_requeue_and_plug(ide_drive_t *drive, struct request *rq);
1223
1224void ide_init_disk(struct gendisk *, ide_drive_t *);
1225
1226#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
1227extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1228#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
1229#else
1230#define ide_pci_register_driver(d) pci_register_driver(d)
1231#endif
1232
1233static inline int ide_pci_is_in_compatibility_mode(struct pci_dev *dev)
1234{
1235 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5)
1236 return 1;
1237 return 0;
1238}
1239
1240void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *,
1241 struct ide_hw *, struct ide_hw **);
1242void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1243
1244#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1245int ide_pci_set_master(struct pci_dev *, const char *);
1246unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
1247int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *);
1248int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
1249#else
1250static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
1251 const struct ide_port_info *d)
1252{
1253 return -EINVAL;
1254}
1255#endif
1256
1257struct ide_pci_enablebit {
1258 u8 reg;
1259 u8 mask;
1260 u8 val;
1261};
1262
1263enum {
1264
1265 IDE_HFLAG_ISA_PORTS = (1 << 0),
1266
1267 IDE_HFLAG_SINGLE = (1 << 1),
1268
1269 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1270
1271 IDE_HFLAG_QD_2ND_PORT = (1 << 3),
1272
1273 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1274
1275 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1276
1277 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
1278
1279
1280
1281
1282 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
1283
1284 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1285
1286 IDE_HFLAG_NO_SET_MODE = (1 << 9),
1287
1288 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
1289
1290 IDE_HFLAG_CS5520 = (1 << 11),
1291
1292 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
1293
1294 IDE_HFLAG_NON_BOOTABLE = (1 << 13),
1295
1296 IDE_HFLAG_NO_DMA = (1 << 14),
1297
1298 IDE_HFLAG_NO_AUTODMA = (1 << 15),
1299
1300 IDE_HFLAG_MMIO = (1 << 16),
1301
1302 IDE_HFLAG_NO_LBA48 = (1 << 17),
1303
1304 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
1305
1306 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1307
1308 IDE_HFLAG_SERIALIZE = (1 << 20),
1309
1310 IDE_HFLAG_DTC2278 = (1 << 21),
1311
1312 IDE_HFLAG_4DRIVES = (1 << 22),
1313
1314 IDE_HFLAG_TRM290 = (1 << 23),
1315
1316 IDE_HFLAG_IO_32BIT = (1 << 24),
1317
1318 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
1319 IDE_HFLAG_BROKEN_ALTSTATUS = (1 << 26),
1320
1321 IDE_HFLAG_SERIALIZE_DMA = (1 << 27),
1322
1323 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
1324
1325 IDE_HFLAG_NO_DSC = (1 << 29),
1326
1327 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1328
1329 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1330};
1331
1332#ifdef CONFIG_BLK_DEV_OFFBOARD
1333# define IDE_HFLAG_OFF_BOARD 0
1334#else
1335# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
1336#endif
1337
1338struct ide_port_info {
1339 char *name;
1340
1341 int (*init_chipset)(struct pci_dev *);
1342
1343 void (*get_lock)(irq_handler_t, void *);
1344 void (*release_lock)(void);
1345
1346 void (*init_iops)(ide_hwif_t *);
1347 void (*init_hwif)(ide_hwif_t *);
1348 int (*init_dma)(ide_hwif_t *,
1349 const struct ide_port_info *);
1350
1351 const struct ide_tp_ops *tp_ops;
1352 const struct ide_port_ops *port_ops;
1353 const struct ide_dma_ops *dma_ops;
1354
1355 struct ide_pci_enablebit enablebits[2];
1356
1357 hwif_chipset_t chipset;
1358
1359 u16 max_sectors;
1360
1361 u32 host_flags;
1362
1363 int irq_flags;
1364
1365 u8 pio_mask;
1366 u8 swdma_mask;
1367 u8 mwdma_mask;
1368 u8 udma_mask;
1369};
1370
1371
1372
1373
1374
1375struct ide_pm_state {
1376
1377 int pm_step;
1378
1379 u32 pm_state;
1380 void* data;
1381};
1382
1383
1384int ide_pci_init_one(struct pci_dev *, const struct ide_port_info *, void *);
1385int ide_pci_init_two(struct pci_dev *, struct pci_dev *,
1386 const struct ide_port_info *, void *);
1387void ide_pci_remove(struct pci_dev *);
1388
1389#ifdef CONFIG_PM
1390int ide_pci_suspend(struct pci_dev *, pm_message_t);
1391int ide_pci_resume(struct pci_dev *);
1392#else
1393#define ide_pci_suspend NULL
1394#define ide_pci_resume NULL
1395#endif
1396
1397void ide_map_sg(ide_drive_t *, struct ide_cmd *);
1398void ide_init_sg_cmd(struct ide_cmd *, unsigned int);
1399
1400#define BAD_DMA_DRIVE 0
1401#define GOOD_DMA_DRIVE 1
1402
1403struct drive_list_entry {
1404 const char *id_model;
1405 const char *id_firmware;
1406};
1407
1408int ide_in_drive_list(u16 *, const struct drive_list_entry *);
1409
1410#ifdef CONFIG_BLK_DEV_IDEDMA
1411int ide_dma_good_drive(ide_drive_t *);
1412int __ide_dma_bad_drive(ide_drive_t *);
1413
1414u8 ide_find_dma_mode(ide_drive_t *, u8);
1415
1416static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1417{
1418 return ide_find_dma_mode(drive, XFER_UDMA_6);
1419}
1420
1421void ide_dma_off_quietly(ide_drive_t *);
1422void ide_dma_off(ide_drive_t *);
1423void ide_dma_on(ide_drive_t *);
1424int ide_set_dma(ide_drive_t *);
1425void ide_check_dma_crc(ide_drive_t *);
1426ide_startstop_t ide_dma_intr(ide_drive_t *);
1427
1428int ide_allocate_dma_engine(ide_hwif_t *);
1429void ide_release_dma_engine(ide_hwif_t *);
1430
1431int ide_dma_prepare(ide_drive_t *, struct ide_cmd *);
1432void ide_dma_unmap_sg(ide_drive_t *, struct ide_cmd *);
1433
1434#ifdef CONFIG_BLK_DEV_IDEDMA_SFF
1435int config_drive_for_dma(ide_drive_t *);
1436int ide_build_dmatable(ide_drive_t *, struct ide_cmd *);
1437void ide_dma_host_set(ide_drive_t *, int);
1438int ide_dma_setup(ide_drive_t *, struct ide_cmd *);
1439extern void ide_dma_start(ide_drive_t *);
1440int ide_dma_end(ide_drive_t *);
1441int ide_dma_test_irq(ide_drive_t *);
1442int ide_dma_sff_timer_expiry(ide_drive_t *);
1443u8 ide_dma_sff_read_status(ide_hwif_t *);
1444extern const struct ide_dma_ops sff_dma_ops;
1445#else
1446static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; }
1447#endif
1448
1449void ide_dma_lost_irq(ide_drive_t *);
1450ide_startstop_t ide_dma_timeout_retry(ide_drive_t *, int);
1451
1452#else
1453static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
1454static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
1455static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
1456static inline void ide_dma_off(ide_drive_t *drive) { ; }
1457static inline void ide_dma_on(ide_drive_t *drive) { ; }
1458static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
1459static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
1460static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
1461static inline ide_startstop_t ide_dma_intr(ide_drive_t *drive) { return ide_stopped; }
1462static inline ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error) { return ide_stopped; }
1463static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
1464static inline int ide_dma_prepare(ide_drive_t *drive,
1465 struct ide_cmd *cmd) { return 1; }
1466static inline void ide_dma_unmap_sg(ide_drive_t *drive,
1467 struct ide_cmd *cmd) { ; }
1468#endif
1469
1470#ifdef CONFIG_BLK_DEV_IDEACPI
1471int ide_acpi_init(void);
1472bool ide_port_acpi(ide_hwif_t *hwif);
1473extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1474extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1475extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1476void ide_acpi_init_port(ide_hwif_t *);
1477void ide_acpi_port_init_devices(ide_hwif_t *);
1478extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
1479#else
1480static inline int ide_acpi_init(void) { return 0; }
1481static inline bool ide_port_acpi(ide_hwif_t *hwif) { return 0; }
1482static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1483static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1484static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1485static inline void ide_acpi_init_port(ide_hwif_t *hwif) { ; }
1486static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
1487static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
1488#endif
1489
1490void ide_check_nien_quirk_list(ide_drive_t *);
1491void ide_undecoded_slave(ide_drive_t *);
1492
1493void ide_port_apply_params(ide_hwif_t *);
1494int ide_sysfs_register_port(ide_hwif_t *);
1495
1496struct ide_host *ide_host_alloc(const struct ide_port_info *, struct ide_hw **,
1497 unsigned int);
1498void ide_host_free(struct ide_host *);
1499int ide_host_register(struct ide_host *, const struct ide_port_info *,
1500 struct ide_hw **);
1501int ide_host_add(const struct ide_port_info *, struct ide_hw **, unsigned int,
1502 struct ide_host **);
1503void ide_host_remove(struct ide_host *);
1504int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
1505void ide_port_unregister_devices(ide_hwif_t *);
1506void ide_port_scan(ide_hwif_t *);
1507
1508static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1509{
1510 return hwif->hwif_data;
1511}
1512
1513static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1514{
1515 hwif->hwif_data = data;
1516}
1517
1518u64 ide_get_lba_addr(struct ide_cmd *, int);
1519u8 ide_dump_status(ide_drive_t *, const char *, u8);
1520
1521struct ide_timing {
1522 u8 mode;
1523 u8 setup;
1524 u16 act8b;
1525 u16 rec8b;
1526 u16 cyc8b;
1527 u16 active;
1528 u16 recover;
1529 u16 cycle;
1530 u16 udma;
1531};
1532
1533enum {
1534 IDE_TIMING_SETUP = (1 << 0),
1535 IDE_TIMING_ACT8B = (1 << 1),
1536 IDE_TIMING_REC8B = (1 << 2),
1537 IDE_TIMING_CYC8B = (1 << 3),
1538 IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B |
1539 IDE_TIMING_CYC8B,
1540 IDE_TIMING_ACTIVE = (1 << 4),
1541 IDE_TIMING_RECOVER = (1 << 5),
1542 IDE_TIMING_CYCLE = (1 << 6),
1543 IDE_TIMING_UDMA = (1 << 7),
1544 IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT |
1545 IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER |
1546 IDE_TIMING_CYCLE | IDE_TIMING_UDMA,
1547};
1548
1549struct ide_timing *ide_timing_find_mode(u8);
1550u16 ide_pio_cycle_time(ide_drive_t *, u8);
1551void ide_timing_merge(struct ide_timing *, struct ide_timing *,
1552 struct ide_timing *, unsigned int);
1553int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int);
1554
1555#ifdef CONFIG_IDE_XFER_MODE
1556int ide_scan_pio_blacklist(char *);
1557const char *ide_xfer_verbose(u8);
1558int ide_pio_need_iordy(ide_drive_t *, const u8);
1559int ide_set_pio_mode(ide_drive_t *, u8);
1560int ide_set_dma_mode(ide_drive_t *, u8);
1561void ide_set_pio(ide_drive_t *, u8);
1562int ide_set_xfer_rate(ide_drive_t *, u8);
1563#else
1564static inline void ide_set_pio(ide_drive_t *drive, u8 pio) { ; }
1565static inline int ide_set_xfer_rate(ide_drive_t *drive, u8 rate) { return -1; }
1566#endif
1567
1568static inline void ide_set_max_pio(ide_drive_t *drive)
1569{
1570 ide_set_pio(drive, 255);
1571}
1572
1573char *ide_media_string(ide_drive_t *);
1574
1575extern const struct attribute_group *ide_dev_groups[];
1576extern struct bus_type ide_bus_type;
1577extern struct class *ide_port_class;
1578
1579static inline void ide_dump_identify(u8 *id)
1580{
1581 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1582}
1583
1584static inline int hwif_to_node(ide_hwif_t *hwif)
1585{
1586 return hwif->dev ? dev_to_node(hwif->dev) : -1;
1587}
1588
1589static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive)
1590{
1591 ide_drive_t *peer = drive->hwif->devices[(drive->dn ^ 1) & 1];
1592
1593 return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL;
1594}
1595
1596static inline void *ide_get_drivedata(ide_drive_t *drive)
1597{
1598 return drive->drive_data;
1599}
1600
1601static inline void ide_set_drivedata(ide_drive_t *drive, void *data)
1602{
1603 drive->drive_data = data;
1604}
1605
1606#define ide_port_for_each_dev(i, dev, port) \
1607 for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++)
1608
1609#define ide_port_for_each_present_dev(i, dev, port) \
1610 for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++) \
1611 if ((dev)->dev_flags & IDE_DFLAG_PRESENT)
1612
1613#define ide_host_for_each_port(i, port, host) \
1614 for ((i) = 0; ((port) = (host)->ports[i]) || (i) < MAX_HOST_PORTS; (i)++)
1615
1616
1617#endif
1618