1/* 2 * Copyright (C) 2015-2017 Dialog Semiconductor 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 2 7 * of the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 */ 14 15#ifndef __DA9062_H__ 16#define __DA9062_H__ 17 18#define DA9062_PMIC_DEVICE_ID 0x62 19#define DA9062_PMIC_VARIANT_MRC_AA 0x01 20#define DA9062_PMIC_VARIANT_VRC_DA9061 0x01 21#define DA9062_PMIC_VARIANT_VRC_DA9062 0x02 22 23#define DA9062_I2C_PAGE_SEL_SHIFT 1 24 25/* 26 * Registers 27 */ 28 29#define DA9062AA_PAGE_CON 0x000 30#define DA9062AA_STATUS_A 0x001 31#define DA9062AA_STATUS_B 0x002 32#define DA9062AA_STATUS_D 0x004 33#define DA9062AA_FAULT_LOG 0x005 34#define DA9062AA_EVENT_A 0x006 35#define DA9062AA_EVENT_B 0x007 36#define DA9062AA_EVENT_C 0x008 37#define DA9062AA_IRQ_MASK_A 0x00A 38#define DA9062AA_IRQ_MASK_B 0x00B 39#define DA9062AA_IRQ_MASK_C 0x00C 40#define DA9062AA_CONTROL_A 0x00E 41#define DA9062AA_CONTROL_B 0x00F 42#define DA9062AA_CONTROL_C 0x010 43#define DA9062AA_CONTROL_D 0x011 44#define DA9062AA_CONTROL_E 0x012 45#define DA9062AA_CONTROL_F 0x013 46#define DA9062AA_PD_DIS 0x014 47#define DA9062AA_GPIO_0_1 0x015 48#define DA9062AA_GPIO_2_3 0x016 49#define DA9062AA_GPIO_4 0x017 50#define DA9062AA_GPIO_WKUP_MODE 0x01C 51#define DA9062AA_GPIO_MODE0_4 0x01D 52#define DA9062AA_GPIO_OUT0_2 0x01E 53#define DA9062AA_GPIO_OUT3_4 0x01F 54#define DA9062AA_BUCK2_CONT 0x020 55#define DA9062AA_BUCK1_CONT 0x021 56#define DA9062AA_BUCK4_CONT 0x022 57#define DA9062AA_BUCK3_CONT 0x024 58#define DA9062AA_LDO1_CONT 0x026 59#define DA9062AA_LDO2_CONT 0x027 60#define DA9062AA_LDO3_CONT 0x028 61#define DA9062AA_LDO4_CONT 0x029 62#define DA9062AA_DVC_1 0x032 63#define DA9062AA_COUNT_S 0x040 64#define DA9062AA_COUNT_MI 0x041 65#define DA9062AA_COUNT_H 0x042 66#define DA9062AA_COUNT_D 0x043 67#define DA9062AA_COUNT_MO 0x044 68#define DA9062AA_COUNT_Y 0x045 69#define DA9062AA_ALARM_S 0x046 70#define DA9062AA_ALARM_MI 0x047 71#define DA9062AA_ALARM_H 0x048 72#define DA9062AA_ALARM_D 0x049 73#define DA9062AA_ALARM_MO 0x04A 74#define DA9062AA_ALARM_Y 0x04B 75#define DA9062AA_SECOND_A 0x04C 76#define DA9062AA_SECOND_B 0x04D 77#define DA9062AA_SECOND_C 0x04E 78#define DA9062AA_SECOND_D 0x04F 79#define DA9062AA_SEQ 0x081 80#define DA9062AA_SEQ_TIMER 0x082 81#define DA9062AA_ID_2_1 0x083 82#define DA9062AA_ID_4_3 0x084 83#define DA9062AA_ID_12_11 0x088 84#define DA9062AA_ID_14_13 0x089 85#define DA9062AA_ID_16_15 0x08A 86#define DA9062AA_ID_22_21 0x08D 87#define DA9062AA_ID_24_23 0x08E 88#define DA9062AA_ID_26_25 0x08F 89#define DA9062AA_ID_28_27 0x090 90#define DA9062AA_ID_30_29 0x091 91#define DA9062AA_ID_32_31 0x092 92#define DA9062AA_SEQ_A 0x095 93#define DA9062AA_SEQ_B 0x096 94#define DA9062AA_WAIT 0x097 95#define DA9062AA_EN_32K 0x098 96#define DA9062AA_RESET 0x099 97#define DA9062AA_BUCK_ILIM_A 0x09A 98#define DA9062AA_BUCK_ILIM_B 0x09B 99#define DA9062AA_BUCK_ILIM_C 0x09C 100#define DA9062AA_BUCK2_CFG 0x09D 101#define DA9062AA_BUCK1_CFG 0x09E 102#define DA9062AA_BUCK4_CFG 0x09F 103#define DA9062AA_BUCK3_CFG 0x0A0 104#define DA9062AA_VBUCK2_A 0x0A3 105#define DA9062AA_VBUCK1_A 0x0A4 106#define DA9062AA_VBUCK4_A 0x0A5 107#define DA9062AA_VBUCK3_A 0x0A7 108#define DA9062AA_VLDO1_A 0x0A9 109#define DA9062AA_VLDO2_A 0x0AA 110#define DA9062AA_VLDO3_A 0x0AB 111#define DA9062AA_VLDO4_A 0x0AC 112#define DA9062AA_VBUCK2_B 0x0B4 113#define DA9062AA_VBUCK1_B 0x0B5 114#define DA9062AA_VBUCK4_B 0x0B6 115#define DA9062AA_VBUCK3_B 0x0B8 116#define DA9062AA_VLDO1_B 0x0BA 117#define DA9062AA_VLDO2_B 0x0BB 118#define DA9062AA_VLDO3_B 0x0BC 119#define DA9062AA_VLDO4_B 0x0BD 120#define DA9062AA_BBAT_CONT 0x0C5 121#define DA9062AA_INTERFACE 0x105 122#define DA9062AA_CONFIG_A 0x106 123#define DA9062AA_CONFIG_B 0x107 124#define DA9062AA_CONFIG_C 0x108 125#define DA9062AA_CONFIG_D 0x109 126#define DA9062AA_CONFIG_E 0x10A 127#define DA9062AA_CONFIG_G 0x10C 128#define DA9062AA_CONFIG_H 0x10D 129#define DA9062AA_CONFIG_I 0x10E 130#define DA9062AA_CONFIG_J 0x10F 131#define DA9062AA_CONFIG_K 0x110 132#define DA9062AA_CONFIG_M 0x112 133#define DA9062AA_TRIM_CLDR 0x120 134#define DA9062AA_GP_ID_0 0x121 135#define DA9062AA_GP_ID_1 0x122 136#define DA9062AA_GP_ID_2 0x123 137#define DA9062AA_GP_ID_3 0x124 138#define DA9062AA_GP_ID_4 0x125 139#define DA9062AA_GP_ID_5 0x126 140#define DA9062AA_GP_ID_6 0x127 141#define DA9062AA_GP_ID_7 0x128 142#define DA9062AA_GP_ID_8 0x129 143#define DA9062AA_GP_ID_9 0x12A 144#define DA9062AA_GP_ID_10 0x12B 145#define DA9062AA_GP_ID_11 0x12C 146#define DA9062AA_GP_ID_12 0x12D 147#define DA9062AA_GP_ID_13 0x12E 148#define DA9062AA_GP_ID_14 0x12F 149#define DA9062AA_GP_ID_15 0x130 150#define DA9062AA_GP_ID_16 0x131 151#define DA9062AA_GP_ID_17 0x132 152#define DA9062AA_GP_ID_18 0x133 153#define DA9062AA_GP_ID_19 0x134 154#define DA9062AA_DEVICE_ID 0x181 155#define DA9062AA_VARIANT_ID 0x182 156#define DA9062AA_CUSTOMER_ID 0x183 157#define DA9062AA_CONFIG_ID 0x184 158 159/* 160 * Bit fields 161 */ 162 163/* DA9062AA_PAGE_CON = 0x000 */ 164#define DA9062AA_PAGE_SHIFT 0 165#define DA9062AA_PAGE_MASK 0x3f 166#define DA9062AA_WRITE_MODE_SHIFT 6 167#define DA9062AA_WRITE_MODE_MASK BIT(6) 168#define DA9062AA_REVERT_SHIFT 7 169#define DA9062AA_REVERT_MASK BIT(7) 170 171/* DA9062AA_STATUS_A = 0x001 */ 172#define DA9062AA_NONKEY_SHIFT 0 173#define DA9062AA_NONKEY_MASK 0x01 174#define DA9062AA_DVC_BUSY_SHIFT 2 175#define DA9062AA_DVC_BUSY_MASK BIT(2) 176 177/* DA9062AA_STATUS_B = 0x002 */ 178#define DA9062AA_GPI0_SHIFT 0 179#define DA9062AA_GPI0_MASK 0x01 180#define DA9062AA_GPI1_SHIFT 1 181#define DA9062AA_GPI1_MASK BIT(1) 182#define DA9062AA_GPI2_SHIFT 2 183#define DA9062AA_GPI2_MASK BIT(2) 184#define DA9062AA_GPI3_SHIFT 3 185#define DA9062AA_GPI3_MASK BIT(3) 186#define DA9062AA_GPI4_SHIFT 4 187#define DA9062AA_GPI4_MASK BIT(4) 188 189/* DA9062AA_STATUS_D = 0x004 */ 190#define DA9062AA_LDO1_ILIM_SHIFT 0 191#define DA9062AA_LDO1_ILIM_MASK 0x01 192#define DA9062AA_LDO2_ILIM_SHIFT 1 193#define DA9062AA_LDO2_ILIM_MASK BIT(1) 194#define DA9062AA_LDO3_ILIM_SHIFT 2 195#define DA9062AA_LDO3_ILIM_MASK BIT(2) 196#define DA9062AA_LDO4_ILIM_SHIFT 3 197#define DA9062AA_LDO4_ILIM_MASK BIT(3) 198 199/* DA9062AA_FAULT_LOG = 0x005 */ 200#define DA9062AA_TWD_ERROR_SHIFT 0 201#define DA9062AA_TWD_ERROR_MASK 0x01 202#define DA9062AA_POR_SHIFT 1 203#define DA9062AA_POR_MASK BIT(1) 204#define DA9062AA_VDD_FAULT_SHIFT 2 205#define DA9062AA_VDD_FAULT_MASK BIT(2) 206#define DA9062AA_VDD_START_SHIFT 3 207#define DA9062AA_VDD_START_MASK BIT(3) 208#define DA9062AA_TEMP_CRIT_SHIFT 4 209#define DA9062AA_TEMP_CRIT_MASK BIT(4) 210#define DA9062AA_KEY_RESET_SHIFT 5 211#define DA9062AA_KEY_RESET_MASK BIT(5) 212#define DA9062AA_NSHUTDOWN_SHIFT 6 213#define DA9062AA_NSHUTDOWN_MASK BIT(6) 214#define DA9062AA_WAIT_SHUT_SHIFT 7 215#define DA9062AA_WAIT_SHUT_MASK BIT(7) 216 217/* DA9062AA_EVENT_A = 0x006 */ 218#define DA9062AA_E_NONKEY_SHIFT 0 219#define DA9062AA_E_NONKEY_MASK 0x01 220#define DA9062AA_E_ALARM_SHIFT 1 221#define DA9062AA_E_ALARM_MASK BIT(1) 222#define DA9062AA_E_TICK_SHIFT 2 223#define DA9062AA_E_TICK_MASK BIT(2) 224#define DA9062AA_E_WDG_WARN_SHIFT 3 225#define DA9062AA_E_WDG_WARN_MASK BIT(3) 226#define DA9062AA_E_SEQ_RDY_SHIFT 4 227#define DA9062AA_E_SEQ_RDY_MASK BIT(4) 228#define DA9062AA_EVENTS_B_SHIFT 5 229#define DA9062AA_EVENTS_B_MASK BIT(5) 230#define DA9062AA_EVENTS_C_SHIFT 6 231#define DA9062AA_EVENTS_C_MASK BIT(6) 232 233/* DA9062AA_EVENT_B = 0x007 */ 234#define DA9062AA_E_TEMP_SHIFT 1 235#define DA9062AA_E_TEMP_MASK BIT(1) 236#define DA9062AA_E_LDO_LIM_SHIFT 3 237#define DA9062AA_E_LDO_LIM_MASK BIT(3) 238#define DA9062AA_E_DVC_RDY_SHIFT 5 239#define DA9062AA_E_DVC_RDY_MASK BIT(5) 240#define DA9062AA_E_VDD_WARN_SHIFT 7 241#define DA9062AA_E_VDD_WARN_MASK BIT(7) 242 243/* DA9062AA_EVENT_C = 0x008 */ 244#define DA9062AA_E_GPI0_SHIFT 0 245#define DA9062AA_E_GPI0_MASK 0x01 246#define DA9062AA_E_GPI1_SHIFT 1 247#define DA9062AA_E_GPI1_MASK BIT(1) 248#define DA9062AA_E_GPI2_SHIFT 2 249#define DA9062AA_E_GPI2_MASK BIT(2) 250#define DA9062AA_E_GPI3_SHIFT 3 251#define DA9062AA_E_GPI3_MASK BIT(3) 252#define DA9062AA_E_GPI4_SHIFT 4 253#define DA9062AA_E_GPI4_MASK BIT(4) 254 255/* DA9062AA_IRQ_MASK_A = 0x00A */ 256#define DA9062AA_M_NONKEY_SHIFT 0 257#define DA9062AA_M_NONKEY_MASK 0x01 258#define DA9062AA_M_ALARM_SHIFT 1 259#define DA9062AA_M_ALARM_MASK BIT(1) 260#define DA9062AA_M_TICK_SHIFT 2 261#define DA9062AA_M_TICK_MASK BIT(2) 262#define DA9062AA_M_WDG_WARN_SHIFT 3 263#define DA9062AA_M_WDG_WARN_MASK BIT(3) 264#define DA9062AA_M_SEQ_RDY_SHIFT 4 265#define DA9062AA_M_SEQ_RDY_MASK BIT(4) 266 267/* DA9062AA_IRQ_MASK_B = 0x00B */ 268#define DA9062AA_M_TEMP_SHIFT 1 269#define DA9062AA_M_TEMP_MASK BIT(1) 270#define DA9062AA_M_LDO_LIM_SHIFT 3 271#define DA9062AA_M_LDO_LIM_MASK BIT(3) 272#define DA9062AA_M_DVC_RDY_SHIFT 5 273#define DA9062AA_M_DVC_RDY_MASK BIT(5) 274#define DA9062AA_M_VDD_WARN_SHIFT 7 275#define DA9062AA_M_VDD_WARN_MASK BIT(7) 276 277/* DA9062AA_IRQ_MASK_C = 0x00C */ 278#define DA9062AA_M_GPI0_SHIFT 0 279#define DA9062AA_M_GPI0_MASK 0x01 280#define DA9062AA_M_GPI1_SHIFT 1 281#define DA9062AA_M_GPI1_MASK BIT(1) 282#define DA9062AA_M_GPI2_SHIFT 2 283#define DA9062AA_M_GPI2_MASK BIT(2) 284#define DA9062AA_M_GPI3_SHIFT 3 285#define DA9062AA_M_GPI3_MASK BIT(3) 286#define DA9062AA_M_GPI4_SHIFT 4 287#define DA9062AA_M_GPI4_MASK BIT(4) 288 289/* DA9062AA_CONTROL_A = 0x00E */ 290#define DA9062AA_SYSTEM_EN_SHIFT 0 291#define DA9062AA_SYSTEM_EN_MASK 0x01 292#define DA9062AA_POWER_EN_SHIFT 1 293#define DA9062AA_POWER_EN_MASK BIT(1) 294#define DA9062AA_POWER1_EN_SHIFT 2 295#define DA9062AA_POWER1_EN_MASK BIT(2) 296#define DA9062AA_STANDBY_SHIFT 3 297#define DA9062AA_STANDBY_MASK BIT(3) 298#define DA9062AA_M_SYSTEM_EN_SHIFT 4 299#define DA9062AA_M_SYSTEM_EN_MASK BIT(4) 300#define DA9062AA_M_POWER_EN_SHIFT 5 301#define DA9062AA_M_POWER_EN_MASK BIT(5) 302#define DA9062AA_M_POWER1_EN_SHIFT 6 303#define DA9062AA_M_POWER1_EN_MASK BIT(6) 304 305/* DA9062AA_CONTROL_B = 0x00F */ 306#define DA9062AA_WATCHDOG_PD_SHIFT 1 307#define DA9062AA_WATCHDOG_PD_MASK BIT(1) 308#define DA9062AA_FREEZE_EN_SHIFT 2 309#define DA9062AA_FREEZE_EN_MASK BIT(2) 310#define DA9062AA_NRES_MODE_SHIFT 3 311#define DA9062AA_NRES_MODE_MASK BIT(3) 312#define DA9062AA_NONKEY_LOCK_SHIFT 4 313#define DA9062AA_NONKEY_LOCK_MASK BIT(4) 314#define DA9062AA_NFREEZE_SHIFT 5 315#define DA9062AA_NFREEZE_MASK (0x03 << 5) 316#define DA9062AA_BUCK_SLOWSTART_SHIFT 7 317#define DA9062AA_BUCK_SLOWSTART_MASK BIT(7) 318 319/* DA9062AA_CONTROL_C = 0x010 */ 320#define DA9062AA_DEBOUNCING_SHIFT 0 321#define DA9062AA_DEBOUNCING_MASK 0x07 322#define DA9062AA_AUTO_BOOT_SHIFT 3 323#define DA9062AA_AUTO_BOOT_MASK BIT(3) 324#define DA9062AA_OTPREAD_EN_SHIFT 4 325#define DA9062AA_OTPREAD_EN_MASK BIT(4) 326#define DA9062AA_SLEW_RATE_SHIFT 5 327#define DA9062AA_SLEW_RATE_MASK (0x03 << 5) 328#define DA9062AA_DEF_SUPPLY_SHIFT 7 329#define DA9062AA_DEF_SUPPLY_MASK BIT(7) 330 331/* DA9062AA_CONTROL_D = 0x011 */ 332#define DA9062AA_TWDSCALE_SHIFT 0 333#define DA9062AA_TWDSCALE_MASK 0x07 334 335/* DA9062AA_CONTROL_E = 0x012 */ 336#define DA9062AA_RTC_MODE_PD_SHIFT 0 337#define DA9062AA_RTC_MODE_PD_MASK 0x01 338#define DA9062AA_RTC_MODE_SD_SHIFT 1 339#define DA9062AA_RTC_MODE_SD_MASK BIT(1) 340#define DA9062AA_RTC_EN_SHIFT 2 341#define DA9062AA_RTC_EN_MASK BIT(2) 342#define DA9062AA_V_LOCK_SHIFT 7 343#define DA9062AA_V_LOCK_MASK BIT(7) 344 345/* DA9062AA_CONTROL_F = 0x013 */ 346#define DA9062AA_WATCHDOG_SHIFT 0 347#define DA9062AA_WATCHDOG_MASK 0x01 348#define DA9062AA_SHUTDOWN_SHIFT 1 349#define DA9062AA_SHUTDOWN_MASK BIT(1) 350#define DA9062AA_WAKE_UP_SHIFT 2 351#define DA9062AA_WAKE_UP_MASK BIT(2) 352 353/* DA9062AA_PD_DIS = 0x014 */ 354#define DA9062AA_GPI_DIS_SHIFT 0 355#define DA9062AA_GPI_DIS_MASK 0x01 356#define DA9062AA_PMIF_DIS_SHIFT 2 357#define DA9062AA_PMIF_DIS_MASK BIT(2) 358#define DA9062AA_CLDR_PAUSE_SHIFT 4 359#define DA9062AA_CLDR_PAUSE_MASK BIT(4) 360#define DA9062AA_BBAT_DIS_SHIFT 5 361#define DA9062AA_BBAT_DIS_MASK BIT(5) 362#define DA9062AA_OUT32K_PAUSE_SHIFT 6 363#define DA9062AA_OUT32K_PAUSE_MASK BIT(6) 364#define DA9062AA_PMCONT_DIS_SHIFT 7 365#define DA9062AA_PMCONT_DIS_MASK BIT(7) 366 367/* DA9062AA_GPIO_0_1 = 0x015 */ 368#define DA9062AA_GPIO0_PIN_SHIFT 0 369#define DA9062AA_GPIO0_PIN_MASK 0x03 370#define DA9062AA_GPIO0_TYPE_SHIFT 2 371#define DA9062AA_GPIO0_TYPE_MASK BIT(2) 372#define DA9062AA_GPIO0_WEN_SHIFT 3 373#define DA9062AA_GPIO0_WEN_MASK BIT(3) 374#define DA9062AA_GPIO1_PIN_SHIFT 4 375#define DA9062AA_GPIO1_PIN_MASK (0x03 << 4) 376#define DA9062AA_GPIO1_TYPE_SHIFT 6 377#define DA9062AA_GPIO1_TYPE_MASK BIT(6) 378#define DA9062AA_GPIO1_WEN_SHIFT 7 379#define DA9062AA_GPIO1_WEN_MASK BIT(7) 380 381/* DA9062AA_GPIO_2_3 = 0x016 */ 382#define DA9062AA_GPIO2_PIN_SHIFT 0 383#define DA9062AA_GPIO2_PIN_MASK 0x03 384#define DA9062AA_GPIO2_TYPE_SHIFT 2 385#define DA9062AA_GPIO2_TYPE_MASK BIT(2) 386#define DA9062AA_GPIO2_WEN_SHIFT 3 387#define DA9062AA_GPIO2_WEN_MASK BIT(3) 388#define DA9062AA_GPIO3_PIN_SHIFT 4 389#define DA9062AA_GPIO3_PIN_MASK (0x03 << 4) 390#define DA9062AA_GPIO3_TYPE_SHIFT 6 391#define DA9062AA_GPIO3_TYPE_MASK BIT(6) 392#define DA9062AA_GPIO3_WEN_SHIFT 7 393#define DA9062AA_GPIO3_WEN_MASK BIT(7) 394 395/* DA9062AA_GPIO_4 = 0x017 */ 396#define DA9062AA_GPIO4_PIN_SHIFT 0 397#define DA9062AA_GPIO4_PIN_MASK 0x03 398#define DA9062AA_GPIO4_TYPE_SHIFT 2 399#define DA9062AA_GPIO4_TYPE_MASK BIT(2) 400#define DA9062AA_GPIO4_WEN_SHIFT 3 401#define DA9062AA_GPIO4_WEN_MASK BIT(3) 402 403/* DA9062AA_GPIO_WKUP_MODE = 0x01C */ 404#define DA9062AA_GPIO0_WKUP_MODE_SHIFT 0 405#define DA9062AA_GPIO0_WKUP_MODE_MASK 0x01 406#define DA9062AA_GPIO1_WKUP_MODE_SHIFT 1 407#define DA9062AA_GPIO1_WKUP_MODE_MASK BIT(1) 408#define DA9062AA_GPIO2_WKUP_MODE_SHIFT 2 409#define DA9062AA_GPIO2_WKUP_MODE_MASK BIT(2) 410#define DA9062AA_GPIO3_WKUP_MODE_SHIFT 3 411#define DA9062AA_GPIO3_WKUP_MODE_MASK BIT(3) 412#define DA9062AA_GPIO4_WKUP_MODE_SHIFT 4 413#define DA9062AA_GPIO4_WKUP_MODE_MASK BIT(4) 414 415/* DA9062AA_GPIO_MODE0_4 = 0x01D */ 416#define DA9062AA_GPIO0_MODE_SHIFT 0 417#define DA9062AA_GPIO0_MODE_MASK 0x01 418#define DA9062AA_GPIO1_MODE_SHIFT 1 419#define DA9062AA_GPIO1_MODE_MASK BIT(1) 420#define DA9062AA_GPIO2_MODE_SHIFT 2 421#define DA9062AA_GPIO2_MODE_MASK BIT(2) 422#define DA9062AA_GPIO3_MODE_SHIFT 3 423#define DA9062AA_GPIO3_MODE_MASK BIT(3) 424#define DA9062AA_GPIO4_MODE_SHIFT 4 425#define DA9062AA_GPIO4_MODE_MASK BIT(4) 426 427/* DA9062AA_GPIO_OUT0_2 = 0x01E */ 428#define DA9062AA_GPIO0_OUT_SHIFT 0 429#define DA9062AA_GPIO0_OUT_MASK 0x07 430#define DA9062AA_GPIO1_OUT_SHIFT 3 431#define DA9062AA_GPIO1_OUT_MASK (0x07 << 3) 432#define DA9062AA_GPIO2_OUT_SHIFT 6 433#define DA9062AA_GPIO2_OUT_MASK (0x03 << 6) 434 435/* DA9062AA_GPIO_OUT3_4 = 0x01F */ 436#define DA9062AA_GPIO3_OUT_SHIFT 0 437#define DA9062AA_GPIO3_OUT_MASK 0x07 438#define DA9062AA_GPIO4_OUT_SHIFT 3 439#define DA9062AA_GPIO4_OUT_MASK (0x03 << 3) 440 441/* DA9062AA_BUCK2_CONT = 0x020 */ 442#define DA9062AA_BUCK2_EN_SHIFT 0 443#define DA9062AA_BUCK2_EN_MASK 0x01 444#define DA9062AA_BUCK2_GPI_SHIFT 1 445#define DA9062AA_BUCK2_GPI_MASK (0x03 << 1) 446#define DA9062AA_BUCK2_CONF_SHIFT 3 447#define DA9062AA_BUCK2_CONF_MASK BIT(3) 448#define DA9062AA_VBUCK2_GPI_SHIFT 5 449#define DA9062AA_VBUCK2_GPI_MASK (0x03 << 5) 450 451/* DA9062AA_BUCK1_CONT = 0x021 */ 452#define DA9062AA_BUCK1_EN_SHIFT 0 453#define DA9062AA_BUCK1_EN_MASK 0x01 454#define DA9062AA_BUCK1_GPI_SHIFT 1 455#define DA9062AA_BUCK1_GPI_MASK (0x03 << 1) 456#define DA9062AA_BUCK1_CONF_SHIFT 3 457#define DA9062AA_BUCK1_CONF_MASK BIT(3) 458#define DA9062AA_VBUCK1_GPI_SHIFT 5 459#define DA9062AA_VBUCK1_GPI_MASK (0x03 << 5) 460 461/* DA9062AA_BUCK4_CONT = 0x022 */ 462#define DA9062AA_BUCK4_EN_SHIFT 0 463#define DA9062AA_BUCK4_EN_MASK 0x01 464#define DA9062AA_BUCK4_GPI_SHIFT 1 465#define DA9062AA_BUCK4_GPI_MASK (0x03 << 1) 466#define DA9062AA_BUCK4_CONF_SHIFT 3 467#define DA9062AA_BUCK4_CONF_MASK BIT(3) 468#define DA9062AA_VBUCK4_GPI_SHIFT 5 469#define DA9062AA_VBUCK4_GPI_MASK (0x03 << 5) 470 471/* DA9062AA_BUCK3_CONT = 0x024 */ 472#define DA9062AA_BUCK3_EN_SHIFT 0 473#define DA9062AA_BUCK3_EN_MASK 0x01 474#define DA9062AA_BUCK3_GPI_SHIFT 1 475#define DA9062AA_BUCK3_GPI_MASK (0x03 << 1) 476#define DA9062AA_BUCK3_CONF_SHIFT 3 477#define DA9062AA_BUCK3_CONF_MASK BIT(3) 478#define DA9062AA_VBUCK3_GPI_SHIFT 5 479#define DA9062AA_VBUCK3_GPI_MASK (0x03 << 5) 480 481/* DA9062AA_LDO1_CONT = 0x026 */ 482#define DA9062AA_LDO1_EN_SHIFT 0 483#define DA9062AA_LDO1_EN_MASK 0x01 484#define DA9062AA_LDO1_GPI_SHIFT 1 485#define DA9062AA_LDO1_GPI_MASK (0x03 << 1) 486#define DA9062AA_LDO1_PD_DIS_SHIFT 3 487#define DA9062AA_LDO1_PD_DIS_MASK BIT(3) 488#define DA9062AA_VLDO1_GPI_SHIFT 5 489#define DA9062AA_VLDO1_GPI_MASK (0x03 << 5) 490#define DA9062AA_LDO1_CONF_SHIFT 7 491#define DA9062AA_LDO1_CONF_MASK BIT(7) 492 493/* DA9062AA_LDO2_CONT = 0x027 */ 494#define DA9062AA_LDO2_EN_SHIFT 0 495#define DA9062AA_LDO2_EN_MASK 0x01 496#define DA9062AA_LDO2_GPI_SHIFT 1 497#define DA9062AA_LDO2_GPI_MASK (0x03 << 1) 498#define DA9062AA_LDO2_PD_DIS_SHIFT 3 499#define DA9062AA_LDO2_PD_DIS_MASK BIT(3) 500#define DA9062AA_VLDO2_GPI_SHIFT 5 501#define DA9062AA_VLDO2_GPI_MASK (0x03 << 5) 502#define DA9062AA_LDO2_CONF_SHIFT 7 503#define DA9062AA_LDO2_CONF_MASK BIT(7) 504 505/* DA9062AA_LDO3_CONT = 0x028 */ 506#define DA9062AA_LDO3_EN_SHIFT 0 507#define DA9062AA_LDO3_EN_MASK 0x01 508#define DA9062AA_LDO3_GPI_SHIFT 1 509#define DA9062AA_LDO3_GPI_MASK (0x03 << 1) 510#define DA9062AA_LDO3_PD_DIS_SHIFT 3 511#define DA9062AA_LDO3_PD_DIS_MASK BIT(3) 512#define DA9062AA_VLDO3_GPI_SHIFT 5 513#define DA9062AA_VLDO3_GPI_MASK (0x03 << 5) 514#define DA9062AA_LDO3_CONF_SHIFT 7 515#define DA9062AA_LDO3_CONF_MASK BIT(7) 516 517/* DA9062AA_LDO4_CONT = 0x029 */ 518#define DA9062AA_LDO4_EN_SHIFT 0 519#define DA9062AA_LDO4_EN_MASK 0x01 520#define DA9062AA_LDO4_GPI_SHIFT 1 521#define DA9062AA_LDO4_GPI_MASK (0x03 << 1) 522#define DA9062AA_LDO4_PD_DIS_SHIFT 3 523#define DA9062AA_LDO4_PD_DIS_MASK BIT(3) 524#define DA9062AA_VLDO4_GPI_SHIFT 5 525#define DA9062AA_VLDO4_GPI_MASK (0x03 << 5) 526#define DA9062AA_LDO4_CONF_SHIFT 7 527#define DA9062AA_LDO4_CONF_MASK BIT(7) 528 529/* DA9062AA_DVC_1 = 0x032 */ 530#define DA9062AA_VBUCK1_SEL_SHIFT 0 531#define DA9062AA_VBUCK1_SEL_MASK 0x01 532#define DA9062AA_VBUCK2_SEL_SHIFT 1 533#define DA9062AA_VBUCK2_SEL_MASK BIT(1) 534#define DA9062AA_VBUCK4_SEL_SHIFT 2 535#define DA9062AA_VBUCK4_SEL_MASK BIT(2) 536#define DA9062AA_VBUCK3_SEL_SHIFT 3 537#define DA9062AA_VBUCK3_SEL_MASK BIT(3) 538#define DA9062AA_VLDO1_SEL_SHIFT 4 539#define DA9062AA_VLDO1_SEL_MASK BIT(4) 540#define DA9062AA_VLDO2_SEL_SHIFT 5 541#define DA9062AA_VLDO2_SEL_MASK BIT(5) 542#define DA9062AA_VLDO3_SEL_SHIFT 6 543#define DA9062AA_VLDO3_SEL_MASK BIT(6) 544#define DA9062AA_VLDO4_SEL_SHIFT 7 545#define DA9062AA_VLDO4_SEL_MASK BIT(7) 546 547/* DA9062AA_COUNT_S = 0x040 */ 548#define DA9062AA_COUNT_SEC_SHIFT 0 549#define DA9062AA_COUNT_SEC_MASK 0x3f 550#define DA9062AA_RTC_READ_SHIFT 7 551#define DA9062AA_RTC_READ_MASK BIT(7) 552 553/* DA9062AA_COUNT_MI = 0x041 */ 554#define DA9062AA_COUNT_MIN_SHIFT 0 555#define DA9062AA_COUNT_MIN_MASK 0x3f 556 557/* DA9062AA_COUNT_H = 0x042 */ 558#define DA9062AA_COUNT_HOUR_SHIFT 0 559#define DA9062AA_COUNT_HOUR_MASK 0x1f 560 561/* DA9062AA_COUNT_D = 0x043 */ 562#define DA9062AA_COUNT_DAY_SHIFT 0 563#define DA9062AA_COUNT_DAY_MASK 0x1f 564 565/* DA9062AA_COUNT_MO = 0x044 */ 566#define DA9062AA_COUNT_MONTH_SHIFT 0 567#define DA9062AA_COUNT_MONTH_MASK 0x0f 568 569/* DA9062AA_COUNT_Y = 0x045 */ 570#define DA9062AA_COUNT_YEAR_SHIFT 0 571#define DA9062AA_COUNT_YEAR_MASK 0x3f 572#define DA9062AA_MONITOR_SHIFT 6 573#define DA9062AA_MONITOR_MASK BIT(6) 574 575/* DA9062AA_ALARM_S = 0x046 */ 576#define DA9062AA_ALARM_SEC_SHIFT 0 577#define DA9062AA_ALARM_SEC_MASK 0x3f 578#define DA9062AA_ALARM_STATUS_SHIFT 6 579#define DA9062AA_ALARM_STATUS_MASK (0x03 << 6) 580 581/* DA9062AA_ALARM_MI = 0x047 */ 582#define DA9062AA_ALARM_MIN_SHIFT 0 583#define DA9062AA_ALARM_MIN_MASK 0x3f 584 585/* DA9062AA_ALARM_H = 0x048 */ 586#define DA9062AA_ALARM_HOUR_SHIFT 0 587#define DA9062AA_ALARM_HOUR_MASK 0x1f 588 589/* DA9062AA_ALARM_D = 0x049 */ 590#define DA9062AA_ALARM_DAY_SHIFT 0 591#define DA9062AA_ALARM_DAY_MASK 0x1f 592 593/* DA9062AA_ALARM_MO = 0x04A */ 594#define DA9062AA_ALARM_MONTH_SHIFT 0 595#define DA9062AA_ALARM_MONTH_MASK 0x0f 596#define DA9062AA_TICK_TYPE_SHIFT 4 597#define DA9062AA_TICK_TYPE_MASK BIT(4) 598#define DA9062AA_TICK_WAKE_SHIFT 5 599#define DA9062AA_TICK_WAKE_MASK BIT(5) 600 601/* DA9062AA_ALARM_Y = 0x04B */ 602#define DA9062AA_ALARM_YEAR_SHIFT 0 603#define DA9062AA_ALARM_YEAR_MASK 0x3f 604#define DA9062AA_ALARM_ON_SHIFT 6 605#define DA9062AA_ALARM_ON_MASK BIT(6) 606#define DA9062AA_TICK_ON_SHIFT 7 607#define DA9062AA_TICK_ON_MASK BIT(7) 608 609/* DA9062AA_SECOND_A = 0x04C */ 610#define DA9062AA_SECONDS_A_SHIFT 0 611#define DA9062AA_SECONDS_A_MASK 0xff 612 613/* DA9062AA_SECOND_B = 0x04D */ 614#define DA9062AA_SECONDS_B_SHIFT 0 615#define DA9062AA_SECONDS_B_MASK 0xff 616 617/* DA9062AA_SECOND_C = 0x04E */ 618#define DA9062AA_SECONDS_C_SHIFT 0 619#define DA9062AA_SECONDS_C_MASK 0xff 620 621/* DA9062AA_SECOND_D = 0x04F */ 622#define DA9062AA_SECONDS_D_SHIFT 0 623#define DA9062AA_SECONDS_D_MASK 0xff 624 625/* DA9062AA_SEQ = 0x081 */ 626#define DA9062AA_SEQ_POINTER_SHIFT 0 627#define DA9062AA_SEQ_POINTER_MASK 0x0f 628#define DA9062AA_NXT_SEQ_START_SHIFT 4 629#define DA9062AA_NXT_SEQ_START_MASK (0x0f << 4) 630 631/* DA9062AA_SEQ_TIMER = 0x082 */ 632#define DA9062AA_SEQ_TIME_SHIFT 0 633#define DA9062AA_SEQ_TIME_MASK 0x0f 634#define DA9062AA_SEQ_DUMMY_SHIFT 4 635#define DA9062AA_SEQ_DUMMY_MASK (0x0f << 4) 636 637/* DA9062AA_ID_2_1 = 0x083 */ 638#define DA9062AA_LDO1_STEP_SHIFT 0 639#define DA9062AA_LDO1_STEP_MASK 0x0f 640#define DA9062AA_LDO2_STEP_SHIFT 4 641#define DA9062AA_LDO2_STEP_MASK (0x0f << 4) 642 643/* DA9062AA_ID_4_3 = 0x084 */ 644#define DA9062AA_LDO3_STEP_SHIFT 0 645#define DA9062AA_LDO3_STEP_MASK 0x0f 646#define DA9062AA_LDO4_STEP_SHIFT 4 647#define DA9062AA_LDO4_STEP_MASK (0x0f << 4) 648 649/* DA9062AA_ID_12_11 = 0x088 */ 650#define DA9062AA_PD_DIS_STEP_SHIFT 4 651#define DA9062AA_PD_DIS_STEP_MASK (0x0f << 4) 652 653/* DA9062AA_ID_14_13 = 0x089 */ 654#define DA9062AA_BUCK1_STEP_SHIFT 0 655#define DA9062AA_BUCK1_STEP_MASK 0x0f 656#define DA9062AA_BUCK2_STEP_SHIFT 4 657#define DA9062AA_BUCK2_STEP_MASK (0x0f << 4) 658 659/* DA9062AA_ID_16_15 = 0x08A */ 660#define DA9062AA_BUCK4_STEP_SHIFT 0 661#define DA9062AA_BUCK4_STEP_MASK 0x0f 662#define DA9062AA_BUCK3_STEP_SHIFT 4 663#define DA9062AA_BUCK3_STEP_MASK (0x0f << 4) 664 665/* DA9062AA_ID_22_21 = 0x08D */ 666#define DA9062AA_GP_RISE1_STEP_SHIFT 0 667#define DA9062AA_GP_RISE1_STEP_MASK 0x0f 668#define DA9062AA_GP_FALL1_STEP_SHIFT 4 669#define DA9062AA_GP_FALL1_STEP_MASK (0x0f << 4) 670 671/* DA9062AA_ID_24_23 = 0x08E */ 672#define DA9062AA_GP_RISE2_STEP_SHIFT 0 673#define DA9062AA_GP_RISE2_STEP_MASK 0x0f 674#define DA9062AA_GP_FALL2_STEP_SHIFT 4 675#define DA9062AA_GP_FALL2_STEP_MASK (0x0f << 4) 676 677/* DA9062AA_ID_26_25 = 0x08F */ 678#define DA9062AA_GP_RISE3_STEP_SHIFT 0 679#define DA9062AA_GP_RISE3_STEP_MASK 0x0f 680#define DA9062AA_GP_FALL3_STEP_SHIFT 4 681#define DA9062AA_GP_FALL3_STEP_MASK (0x0f << 4) 682 683/* DA9062AA_ID_28_27 = 0x090 */ 684#define DA9062AA_GP_RISE4_STEP_SHIFT 0 685#define DA9062AA_GP_RISE4_STEP_MASK 0x0f 686#define DA9062AA_GP_FALL4_STEP_SHIFT 4 687#define DA9062AA_GP_FALL4_STEP_MASK (0x0f << 4) 688 689/* DA9062AA_ID_30_29 = 0x091 */ 690#define DA9062AA_GP_RISE5_STEP_SHIFT 0 691#define DA9062AA_GP_RISE5_STEP_MASK 0x0f 692#define DA9062AA_GP_FALL5_STEP_SHIFT 4 693#define DA9062AA_GP_FALL5_STEP_MASK (0x0f << 4) 694 695/* DA9062AA_ID_32_31 = 0x092 */ 696#define DA9062AA_WAIT_STEP_SHIFT 0 697#define DA9062AA_WAIT_STEP_MASK 0x0f 698#define DA9062AA_EN32K_STEP_SHIFT 4 699#define DA9062AA_EN32K_STEP_MASK (0x0f << 4) 700 701/* DA9062AA_SEQ_A = 0x095 */ 702#define DA9062AA_SYSTEM_END_SHIFT 0 703#define DA9062AA_SYSTEM_END_MASK 0x0f 704#define DA9062AA_POWER_END_SHIFT 4 705#define DA9062AA_POWER_END_MASK (0x0f << 4) 706 707/* DA9062AA_SEQ_B = 0x096 */ 708#define DA9062AA_MAX_COUNT_SHIFT 0 709#define DA9062AA_MAX_COUNT_MASK 0x0f 710#define DA9062AA_PART_DOWN_SHIFT 4 711#define DA9062AA_PART_DOWN_MASK (0x0f << 4) 712 713/* DA9062AA_WAIT = 0x097 */ 714#define DA9062AA_WAIT_TIME_SHIFT 0 715#define DA9062AA_WAIT_TIME_MASK 0x0f 716#define DA9062AA_WAIT_MODE_SHIFT 4 717#define DA9062AA_WAIT_MODE_MASK BIT(4) 718#define DA9062AA_TIME_OUT_SHIFT 5 719#define DA9062AA_TIME_OUT_MASK BIT(5) 720#define DA9062AA_WAIT_DIR_SHIFT 6 721#define DA9062AA_WAIT_DIR_MASK (0x03 << 6) 722 723/* DA9062AA_EN_32K = 0x098 */ 724#define DA9062AA_STABILISATION_TIME_SHIFT 0 725#define DA9062AA_STABILISATION_TIME_MASK 0x07 726#define DA9062AA_CRYSTAL_SHIFT 3 727#define DA9062AA_CRYSTAL_MASK BIT(3) 728#define DA9062AA_DELAY_MODE_SHIFT 4 729#define DA9062AA_DELAY_MODE_MASK BIT(4) 730#define DA9062AA_OUT_CLOCK_SHIFT 5 731#define DA9062AA_OUT_CLOCK_MASK BIT(5) 732#define DA9062AA_RTC_CLOCK_SHIFT 6 733#define DA9062AA_RTC_CLOCK_MASK BIT(6) 734#define DA9062AA_EN_32KOUT_SHIFT 7 735#define DA9062AA_EN_32KOUT_MASK BIT(7) 736 737/* DA9062AA_RESET = 0x099 */ 738#define DA9062AA_RESET_TIMER_SHIFT 0 739#define DA9062AA_RESET_TIMER_MASK 0x3f 740#define DA9062AA_RESET_EVENT_SHIFT 6 741#define DA9062AA_RESET_EVENT_MASK (0x03 << 6) 742 743/* DA9062AA_BUCK_ILIM_A = 0x09A */ 744#define DA9062AA_BUCK3_ILIM_SHIFT 0 745#define DA9062AA_BUCK3_ILIM_MASK 0x0f 746 747/* DA9062AA_BUCK_ILIM_B = 0x09B */ 748#define DA9062AA_BUCK4_ILIM_SHIFT 0 749#define DA9062AA_BUCK4_ILIM_MASK 0x0f 750 751/* DA9062AA_BUCK_ILIM_C = 0x09C */ 752#define DA9062AA_BUCK1_ILIM_SHIFT 0 753#define DA9062AA_BUCK1_ILIM_MASK 0x0f 754#define DA9062AA_BUCK2_ILIM_SHIFT 4 755#define DA9062AA_BUCK2_ILIM_MASK (0x0f << 4) 756 757/* DA9062AA_BUCK2_CFG = 0x09D */ 758#define DA9062AA_BUCK2_PD_DIS_SHIFT 5 759#define DA9062AA_BUCK2_PD_DIS_MASK BIT(5) 760#define DA9062AA_BUCK2_MODE_SHIFT 6 761#define DA9062AA_BUCK2_MODE_MASK (0x03 << 6) 762 763/* DA9062AA_BUCK1_CFG = 0x09E */ 764#define DA9062AA_BUCK1_PD_DIS_SHIFT 5 765#define DA9062AA_BUCK1_PD_DIS_MASK BIT(5) 766#define DA9062AA_BUCK1_MODE_SHIFT 6 767#define DA9062AA_BUCK1_MODE_MASK (0x03 << 6) 768 769/* DA9062AA_BUCK4_CFG = 0x09F */ 770#define DA9062AA_BUCK4_VTTR_EN_SHIFT 3 771#define DA9062AA_BUCK4_VTTR_EN_MASK BIT(3) 772#define DA9062AA_BUCK4_VTT_EN_SHIFT 4 773#define DA9062AA_BUCK4_VTT_EN_MASK BIT(4) 774#define DA9062AA_BUCK4_PD_DIS_SHIFT 5 775#define DA9062AA_BUCK4_PD_DIS_MASK BIT(5) 776#define DA9062AA_BUCK4_MODE_SHIFT 6 777#define DA9062AA_BUCK4_MODE_MASK (0x03 << 6) 778 779/* DA9062AA_BUCK3_CFG = 0x0A0 */ 780#define DA9062AA_BUCK3_PD_DIS_SHIFT 5 781#define DA9062AA_BUCK3_PD_DIS_MASK BIT(5) 782#define DA9062AA_BUCK3_MODE_SHIFT 6 783#define DA9062AA_BUCK3_MODE_MASK (0x03 << 6) 784 785/* DA9062AA_VBUCK2_A = 0x0A3 */ 786#define DA9062AA_VBUCK2_A_SHIFT 0 787#define DA9062AA_VBUCK2_A_MASK 0x7f 788#define DA9062AA_BUCK2_SL_A_SHIFT 7 789#define DA9062AA_BUCK2_SL_A_MASK BIT(7) 790 791/* DA9062AA_VBUCK1_A = 0x0A4 */ 792#define DA9062AA_VBUCK1_A_SHIFT 0 793#define DA9062AA_VBUCK1_A_MASK 0x7f 794#define DA9062AA_BUCK1_SL_A_SHIFT 7 795#define DA9062AA_BUCK1_SL_A_MASK BIT(7) 796 797/* DA9062AA_VBUCK4_A = 0x0A5 */ 798#define DA9062AA_VBUCK4_A_SHIFT 0 799#define DA9062AA_VBUCK4_A_MASK 0x7f 800#define DA9062AA_BUCK4_SL_A_SHIFT 7 801#define DA9062AA_BUCK4_SL_A_MASK BIT(7) 802 803/* DA9062AA_VBUCK3_A = 0x0A7 */ 804#define DA9062AA_VBUCK3_A_SHIFT 0 805#define DA9062AA_VBUCK3_A_MASK 0x7f 806#define DA9062AA_BUCK3_SL_A_SHIFT 7 807#define DA9062AA_BUCK3_SL_A_MASK BIT(7) 808 809/* DA9062AA_VLDO1_A = 0x0A9 */ 810#define DA9062AA_VLDO1_A_SHIFT 0 811#define DA9062AA_VLDO1_A_MASK 0x3f 812#define DA9062AA_LDO1_SL_A_SHIFT 7 813#define DA9062AA_LDO1_SL_A_MASK BIT(7) 814 815/* DA9062AA_VLDO2_A = 0x0AA */ 816#define DA9062AA_VLDO2_A_SHIFT 0 817#define DA9062AA_VLDO2_A_MASK 0x3f 818#define DA9062AA_LDO2_SL_A_SHIFT 7 819#define DA9062AA_LDO2_SL_A_MASK BIT(7) 820 821/* DA9062AA_VLDO3_A = 0x0AB */ 822#define DA9062AA_VLDO3_A_SHIFT 0 823#define DA9062AA_VLDO3_A_MASK 0x3f 824#define DA9062AA_LDO3_SL_A_SHIFT 7 825#define DA9062AA_LDO3_SL_A_MASK BIT(7) 826 827/* DA9062AA_VLDO4_A = 0x0AC */ 828#define DA9062AA_VLDO4_A_SHIFT 0 829#define DA9062AA_VLDO4_A_MASK 0x3f 830#define DA9062AA_LDO4_SL_A_SHIFT 7 831#define DA9062AA_LDO4_SL_A_MASK BIT(7) 832 833/* DA9062AA_VBUCK2_B = 0x0B4 */ 834#define DA9062AA_VBUCK2_B_SHIFT 0 835#define DA9062AA_VBUCK2_B_MASK 0x7f 836#define DA9062AA_BUCK2_SL_B_SHIFT 7 837#define DA9062AA_BUCK2_SL_B_MASK BIT(7) 838 839/* DA9062AA_VBUCK1_B = 0x0B5 */ 840#define DA9062AA_VBUCK1_B_SHIFT 0 841#define DA9062AA_VBUCK1_B_MASK 0x7f 842#define DA9062AA_BUCK1_SL_B_SHIFT 7 843#define DA9062AA_BUCK1_SL_B_MASK BIT(7) 844 845/* DA9062AA_VBUCK4_B = 0x0B6 */ 846#define DA9062AA_VBUCK4_B_SHIFT 0 847#define DA9062AA_VBUCK4_B_MASK 0x7f 848#define DA9062AA_BUCK4_SL_B_SHIFT 7 849#define DA9062AA_BUCK4_SL_B_MASK BIT(7) 850 851/* DA9062AA_VBUCK3_B = 0x0B8 */ 852#define DA9062AA_VBUCK3_B_SHIFT 0 853#define DA9062AA_VBUCK3_B_MASK 0x7f 854#define DA9062AA_BUCK3_SL_B_SHIFT 7 855#define DA9062AA_BUCK3_SL_B_MASK BIT(7) 856 857/* DA9062AA_VLDO1_B = 0x0BA */ 858#define DA9062AA_VLDO1_B_SHIFT 0 859#define DA9062AA_VLDO1_B_MASK 0x3f 860#define DA9062AA_LDO1_SL_B_SHIFT 7 861#define DA9062AA_LDO1_SL_B_MASK BIT(7) 862 863/* DA9062AA_VLDO2_B = 0x0BB */ 864#define DA9062AA_VLDO2_B_SHIFT 0 865#define DA9062AA_VLDO2_B_MASK 0x3f 866#define DA9062AA_LDO2_SL_B_SHIFT 7 867#define DA9062AA_LDO2_SL_B_MASK BIT(7) 868 869/* DA9062AA_VLDO3_B = 0x0BC */ 870#define DA9062AA_VLDO3_B_SHIFT 0 871#define DA9062AA_VLDO3_B_MASK 0x3f 872#define DA9062AA_LDO3_SL_B_SHIFT 7 873#define DA9062AA_LDO3_SL_B_MASK BIT(7) 874 875/* DA9062AA_VLDO4_B = 0x0BD */ 876#define DA9062AA_VLDO4_B_SHIFT 0 877#define DA9062AA_VLDO4_B_MASK 0x3f 878#define DA9062AA_LDO4_SL_B_SHIFT 7 879#define DA9062AA_LDO4_SL_B_MASK BIT(7) 880 881/* DA9062AA_BBAT_CONT = 0x0C5 */ 882#define DA9062AA_BCHG_VSET_SHIFT 0 883#define DA9062AA_BCHG_VSET_MASK 0x0f 884#define DA9062AA_BCHG_ISET_SHIFT 4 885#define DA9062AA_BCHG_ISET_MASK (0x0f << 4) 886 887/* DA9062AA_INTERFACE = 0x105 */ 888#define DA9062AA_IF_BASE_ADDR_SHIFT 4 889#define DA9062AA_IF_BASE_ADDR_MASK (0x0f << 4) 890 891/* DA9062AA_CONFIG_A = 0x106 */ 892#define DA9062AA_PM_I_V_SHIFT 0 893#define DA9062AA_PM_I_V_MASK 0x01 894#define DA9062AA_PM_O_TYPE_SHIFT 2 895#define DA9062AA_PM_O_TYPE_MASK BIT(2) 896#define DA9062AA_IRQ_TYPE_SHIFT 3 897#define DA9062AA_IRQ_TYPE_MASK BIT(3) 898#define DA9062AA_PM_IF_V_SHIFT 4 899#define DA9062AA_PM_IF_V_MASK BIT(4) 900#define DA9062AA_PM_IF_FMP_SHIFT 5 901#define DA9062AA_PM_IF_FMP_MASK BIT(5) 902#define DA9062AA_PM_IF_HSM_SHIFT 6 903#define DA9062AA_PM_IF_HSM_MASK BIT(6) 904 905/* DA9062AA_CONFIG_B = 0x107 */ 906#define DA9062AA_VDD_FAULT_ADJ_SHIFT 0 907#define DA9062AA_VDD_FAULT_ADJ_MASK 0x0f 908#define DA9062AA_VDD_HYST_ADJ_SHIFT 4 909#define DA9062AA_VDD_HYST_ADJ_MASK (0x07 << 4) 910 911/* DA9062AA_CONFIG_C = 0x108 */ 912#define DA9062AA_BUCK_ACTV_DISCHRG_SHIFT 2 913#define DA9062AA_BUCK_ACTV_DISCHRG_MASK BIT(2) 914#define DA9062AA_BUCK1_CLK_INV_SHIFT 3 915#define DA9062AA_BUCK1_CLK_INV_MASK BIT(3) 916#define DA9062AA_BUCK4_CLK_INV_SHIFT 4 917#define DA9062AA_BUCK4_CLK_INV_MASK BIT(4) 918#define DA9062AA_BUCK3_CLK_INV_SHIFT 6 919#define DA9062AA_BUCK3_CLK_INV_MASK BIT(6) 920 921/* DA9062AA_CONFIG_D = 0x109 */ 922#define DA9062AA_GPI_V_SHIFT 0 923#define DA9062AA_GPI_V_MASK 0x01 924#define DA9062AA_NIRQ_MODE_SHIFT 1 925#define DA9062AA_NIRQ_MODE_MASK BIT(1) 926#define DA9062AA_SYSTEM_EN_RD_SHIFT 2 927#define DA9062AA_SYSTEM_EN_RD_MASK BIT(2) 928#define DA9062AA_FORCE_RESET_SHIFT 5 929#define DA9062AA_FORCE_RESET_MASK BIT(5) 930 931/* DA9062AA_CONFIG_E = 0x10A */ 932#define DA9062AA_BUCK1_AUTO_SHIFT 0 933#define DA9062AA_BUCK1_AUTO_MASK 0x01 934#define DA9062AA_BUCK2_AUTO_SHIFT 1 935#define DA9062AA_BUCK2_AUTO_MASK BIT(1) 936#define DA9062AA_BUCK4_AUTO_SHIFT 2 937#define DA9062AA_BUCK4_AUTO_MASK BIT(2) 938#define DA9062AA_BUCK3_AUTO_SHIFT 4 939#define DA9062AA_BUCK3_AUTO_MASK BIT(4) 940 941/* DA9062AA_CONFIG_G = 0x10C */ 942#define DA9062AA_LDO1_AUTO_SHIFT 0 943#define DA9062AA_LDO1_AUTO_MASK 0x01 944#define DA9062AA_LDO2_AUTO_SHIFT 1 945#define DA9062AA_LDO2_AUTO_MASK BIT(1) 946#define DA9062AA_LDO3_AUTO_SHIFT 2 947#define DA9062AA_LDO3_AUTO_MASK BIT(2) 948#define DA9062AA_LDO4_AUTO_SHIFT 3 949#define DA9062AA_LDO4_AUTO_MASK BIT(3) 950 951/* DA9062AA_CONFIG_H = 0x10D */ 952#define DA9062AA_BUCK1_2_MERGE_SHIFT 3 953#define DA9062AA_BUCK1_2_MERGE_MASK BIT(3) 954#define DA9062AA_BUCK2_OD_SHIFT 5 955#define DA9062AA_BUCK2_OD_MASK BIT(5) 956#define DA9062AA_BUCK1_OD_SHIFT 6 957#define DA9062AA_BUCK1_OD_MASK BIT(6) 958 959/* DA9062AA_CONFIG_I = 0x10E */ 960#define DA9062AA_NONKEY_PIN_SHIFT 0 961#define DA9062AA_NONKEY_PIN_MASK 0x03 962#define DA9062AA_nONKEY_SD_SHIFT 2 963#define DA9062AA_nONKEY_SD_MASK BIT(2) 964#define DA9062AA_WATCHDOG_SD_SHIFT 3 965#define DA9062AA_WATCHDOG_SD_MASK BIT(3) 966#define DA9062AA_KEY_SD_MODE_SHIFT 4 967#define DA9062AA_KEY_SD_MODE_MASK BIT(4) 968#define DA9062AA_HOST_SD_MODE_SHIFT 5 969#define DA9062AA_HOST_SD_MODE_MASK BIT(5) 970#define DA9062AA_INT_SD_MODE_SHIFT 6 971#define DA9062AA_INT_SD_MODE_MASK BIT(6) 972#define DA9062AA_LDO_SD_SHIFT 7 973#define DA9062AA_LDO_SD_MASK BIT(7) 974 975/* DA9062AA_CONFIG_J = 0x10F */ 976#define DA9062AA_KEY_DELAY_SHIFT 0 977#define DA9062AA_KEY_DELAY_MASK 0x03 978#define DA9062AA_SHUT_DELAY_SHIFT 2 979#define DA9062AA_SHUT_DELAY_MASK (0x03 << 2) 980#define DA9062AA_RESET_DURATION_SHIFT 4 981#define DA9062AA_RESET_DURATION_MASK (0x03 << 4) 982#define DA9062AA_TWOWIRE_TO_SHIFT 6 983#define DA9062AA_TWOWIRE_TO_MASK BIT(6) 984#define DA9062AA_IF_RESET_SHIFT 7 985#define DA9062AA_IF_RESET_MASK BIT(7) 986 987/* DA9062AA_CONFIG_K = 0x110 */ 988#define DA9062AA_GPIO0_PUPD_SHIFT 0 989#define DA9062AA_GPIO0_PUPD_MASK 0x01 990#define DA9062AA_GPIO1_PUPD_SHIFT 1 991#define DA9062AA_GPIO1_PUPD_MASK BIT(1) 992#define DA9062AA_GPIO2_PUPD_SHIFT 2 993#define DA9062AA_GPIO2_PUPD_MASK BIT(2) 994#define DA9062AA_GPIO3_PUPD_SHIFT 3 995#define DA9062AA_GPIO3_PUPD_MASK BIT(3) 996#define DA9062AA_GPIO4_PUPD_SHIFT 4 997#define DA9062AA_GPIO4_PUPD_MASK BIT(4) 998 999/* DA9062AA_CONFIG_M = 0x112 */ 1000#define DA9062AA_NSHUTDOWN_PU_SHIFT 1
1001#define DA9062AA_NSHUTDOWN_PU_MASK BIT(1) 1002#define DA9062AA_WDG_MODE_SHIFT 3 1003#define DA9062AA_WDG_MODE_MASK BIT(3) 1004#define DA9062AA_OSC_FRQ_SHIFT 4 1005#define DA9062AA_OSC_FRQ_MASK (0x0f << 4) 1006 1007/* DA9062AA_TRIM_CLDR = 0x120 */ 1008#define DA9062AA_TRIM_CLDR_SHIFT 0 1009#define DA9062AA_TRIM_CLDR_MASK 0xff 1010 1011/* DA9062AA_GP_ID_0 = 0x121 */ 1012#define DA9062AA_GP_0_SHIFT 0 1013#define DA9062AA_GP_0_MASK 0xff 1014 1015/* DA9062AA_GP_ID_1 = 0x122 */ 1016#define DA9062AA_GP_1_SHIFT 0 1017#define DA9062AA_GP_1_MASK 0xff 1018 1019/* DA9062AA_GP_ID_2 = 0x123 */ 1020#define DA9062AA_GP_2_SHIFT 0 1021#define DA9062AA_GP_2_MASK 0xff 1022 1023/* DA9062AA_GP_ID_3 = 0x124 */ 1024#define DA9062AA_GP_3_SHIFT 0 1025#define DA9062AA_GP_3_MASK 0xff 1026 1027/* DA9062AA_GP_ID_4 = 0x125 */ 1028#define DA9062AA_GP_4_SHIFT 0 1029#define DA9062AA_GP_4_MASK 0xff 1030 1031/* DA9062AA_GP_ID_5 = 0x126 */ 1032#define DA9062AA_GP_5_SHIFT 0 1033#define DA9062AA_GP_5_MASK 0xff 1034 1035/* DA9062AA_GP_ID_6 = 0x127 */ 1036#define DA9062AA_GP_6_SHIFT 0 1037#define DA9062AA_GP_6_MASK 0xff 1038 1039/* DA9062AA_GP_ID_7 = 0x128 */ 1040#define DA9062AA_GP_7_SHIFT 0 1041#define DA9062AA_GP_7_MASK 0xff 1042 1043/* DA9062AA_GP_ID_8 = 0x129 */ 1044#define DA9062AA_GP_8_SHIFT 0 1045#define DA9062AA_GP_8_MASK 0xff 1046 1047/* DA9062AA_GP_ID_9 = 0x12A */ 1048#define DA9062AA_GP_9_SHIFT 0 1049#define DA9062AA_GP_9_MASK 0xff 1050 1051/* DA9062AA_GP_ID_10 = 0x12B */ 1052#define DA9062AA_GP_10_SHIFT 0 1053#define DA9062AA_GP_10_MASK 0xff 1054 1055/* DA9062AA_GP_ID_11 = 0x12C */ 1056#define DA9062AA_GP_11_SHIFT 0 1057#define DA9062AA_GP_11_MASK 0xff 1058 1059/* DA9062AA_GP_ID_12 = 0x12D */ 1060#define DA9062AA_GP_12_SHIFT 0 1061#define DA9062AA_GP_12_MASK 0xff 1062 1063/* DA9062AA_GP_ID_13 = 0x12E */ 1064#define DA9062AA_GP_13_SHIFT 0 1065#define DA9062AA_GP_13_MASK 0xff 1066 1067/* DA9062AA_GP_ID_14 = 0x12F */ 1068#define DA9062AA_GP_14_SHIFT 0 1069#define DA9062AA_GP_14_MASK 0xff 1070 1071/* DA9062AA_GP_ID_15 = 0x130 */ 1072#define DA9062AA_GP_15_SHIFT 0 1073#define DA9062AA_GP_15_MASK 0xff 1074 1075/* DA9062AA_GP_ID_16 = 0x131 */ 1076#define DA9062AA_GP_16_SHIFT 0 1077#define DA9062AA_GP_16_MASK 0xff 1078 1079/* DA9062AA_GP_ID_17 = 0x132 */ 1080#define DA9062AA_GP_17_SHIFT 0 1081#define DA9062AA_GP_17_MASK 0xff 1082 1083/* DA9062AA_GP_ID_18 = 0x133 */ 1084#define DA9062AA_GP_18_SHIFT 0 1085#define DA9062AA_GP_18_MASK 0xff 1086 1087/* DA9062AA_GP_ID_19 = 0x134 */ 1088#define DA9062AA_GP_19_SHIFT 0 1089#define DA9062AA_GP_19_MASK 0xff 1090 1091/* DA9062AA_DEVICE_ID = 0x181 */ 1092#define DA9062AA_DEV_ID_SHIFT 0 1093#define DA9062AA_DEV_ID_MASK 0xff 1094 1095/* DA9062AA_VARIANT_ID = 0x182 */ 1096#define DA9062AA_VRC_SHIFT 0 1097#define DA9062AA_VRC_MASK 0x0f 1098#define DA9062AA_MRC_SHIFT 4 1099#define DA9062AA_MRC_MASK (0x0f << 4) 1100 1101/* DA9062AA_CUSTOMER_ID = 0x183 */ 1102#define DA9062AA_CUST_ID_SHIFT 0 1103#define DA9062AA_CUST_ID_MASK 0xff 1104 1105/* DA9062AA_CONFIG_ID = 0x184 */ 1106#define DA9062AA_CONFIG_REV_SHIFT 0 1107#define DA9062AA_CONFIG_REV_MASK 0xff 1108 1109#endif /* __DA9062_H__ */ 1110