LXR linux/arch/powerpc/platforms/83xx/mpc832x

   1/*
   2 * Copyright 2006 Freescale Semiconductor, Inc. All rights reserved.
   3 *
   4 * Description:
   5 * MPC832xE MDS board specific routines.
   6 *
   7 * This program is free software; you can redistribute  it and/or modify it
   8 * under  the terms of  the GNU General  Public License as published by the
   9 * Free Software Foundation;  either version 2 of the  License, or (at your
  10 * option) any later version.
  11 */
  12
  13#include <linux/stddef.h>
  14#include <linux/kernel.h>
  15#include <linux/init.h>
  16#include <linux/errno.h>
  17#include <linux/reboot.h>
  18#include <linux/pci.h>
  19#include <linux/kdev_t.h>
  20#include <linux/major.h>
  21#include <linux/console.h>
  22#include <linux/delay.h>
  23#include <linux/seq_file.h>
  24#include <linux/root_dev.h>
  25#include <linux/initrd.h>
  26#include <linux/of_platform.h>
  27#include <linux/of_device.h>
  28
  29#include <linux/atomic.h>
  30#include <asm/time.h>
  31#include <asm/io.h>
  32#include <asm/machdep.h>
  33#include <asm/ipic.h>
  34#include <asm/irq.h>
  35#include <asm/prom.h>
  36#include <asm/udbg.h>
  37#include <sysdev/fsl_soc.h>
  38#include <sysdev/fsl_pci.h>
  39#include <soc/fsl/qe/qe.h>
  40#include <soc/fsl/qe/qe_ic.h>
  41
  42#include "mpc83xx.h"
  43
  44#undef DEBUG
  45#ifdef DEBUG
  46#define DBG(fmt...) udbg_printf(fmt)
  47#else
  48#define DBG(fmt...)
  49#endif
  50
  51/* ************************************************************************
  52 *
  53 * Setup the architecture
  54 *
  55 */
  56static void __init mpc832x_sys_setup_arch(void)
  57{
  58        struct device_node *np;
  59        u8 __iomem *bcsr_regs = NULL;
  60
  61        mpc83xx_setup_arch();
  62
  63        /* Map BCSR area */
  64        np = of_find_node_by_name(NULL, "bcsr");
  65        if (np) {
  66                struct resource res;
  67
  68                of_address_to_resource(np, 0, &res);
  69                bcsr_regs = ioremap(res.start, resource_size(&res));
  70                of_node_put(np);
  71        }
  72
  73#ifdef CONFIG_QUICC_ENGINE
  74        if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
  75                par_io_init(np);
  76                of_node_put(np);
  77
  78                for_each_node_by_name(np, "ucc")
  79                        par_io_of_config(np);
  80        }
  81
  82        if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
  83                        != NULL){
  84                /* Reset the Ethernet PHYs */
  85#define BCSR8_FETH_RST 0x50
  86                clrbits8(&bcsr_regs[8], BCSR8_FETH_RST);
  87                udelay(1000);
  88                setbits8(&bcsr_regs[8], BCSR8_FETH_RST);
  89                iounmap(bcsr_regs);
  90                of_node_put(np);
  91        }
  92#endif                          /* CONFIG_QUICC_ENGINE */
  93}
  94
  95machine_device_initcall(mpc832x_mds, mpc83xx_declare_of_platform_devices);
  96
  97/*
  98 * Called very early, MMU is off, device-tree isn't unflattened
  99 */
 100static int __init mpc832x_sys_probe(void)
 101{
 102        return of_machine_is_compatible("MPC832xMDS");
 103}
 104
 105define_machine(mpc832x_mds) {
 106        .name           = "MPC832x MDS",
 107        .probe          = mpc832x_sys_probe,
 108        .setup_arch     = mpc832x_sys_setup_arch,
 109        .init_IRQ       = mpc83xx_ipic_and_qe_init_IRQ,
 110        .get_irq        = ipic_get_irq,
 111        .restart        = mpc83xx_restart,
 112        .time_init      = mpc83xx_time_init,
 113        .calibrate_decr = generic_calibrate_decr,
 114        .progress       = udbg_progress,
 115};
 116