1/* 2 * Copyright 2016 Chen-Yu Tsai 3 * 4 * Chen-Yu Tsai <wens@csie.org> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 */ 16 17#ifndef _CCU_SUN8I_A83T_H_ 18#define _CCU_SUN8I_A83T_H_ 19 20#include <dt-bindings/clock/sun8i-a83t-ccu.h> 21#include <dt-bindings/reset/sun8i-a83t-ccu.h> 22 23#define CLK_PLL_C0CPUX 0 24#define CLK_PLL_C1CPUX 1 25#define CLK_PLL_AUDIO 2 26#define CLK_PLL_VIDEO0 3 27#define CLK_PLL_VE 4 28#define CLK_PLL_DDR 5 29 30/* pll-periph is exported to the PRCM block */ 31 32#define CLK_PLL_GPU 7 33#define CLK_PLL_HSIC 8 34 35/* pll-de is exported for the display engine */ 36 37#define CLK_PLL_VIDEO1 10 38 39/* The CPUX clocks are exported */ 40 41#define CLK_AXI0 13 42#define CLK_AXI1 14 43#define CLK_AHB1 15 44#define CLK_AHB2 16 45#define CLK_APB1 17 46#define CLK_APB2 18 47 48/* bus gates exported */ 49 50#define CLK_CCI400 58 51 52/* module and usb clocks exported */ 53 54#define CLK_DRAM 82 55 56/* dram gates and more module clocks exported */ 57 58#define CLK_MBUS 95 59 60/* more module clocks exported */ 61 62#define CLK_NUMBER (CLK_GPU_HYD + 1) 63 64#endif /* _CCU_SUN8I_A83T_H_ */ 65