linux/drivers/gpu/drm/i915/intel_dvo.c
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   1/*
   2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3 * Copyright © 2006-2007 Intel Corporation
   4 *
   5 * Permission is hereby granted, free of charge, to any person obtaining a
   6 * copy of this software and associated documentation files (the "Software"),
   7 * to deal in the Software without restriction, including without limitation
   8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9 * and/or sell copies of the Software, and to permit persons to whom the
  10 * Software is furnished to do so, subject to the following conditions:
  11 *
  12 * The above copyright notice and this permission notice (including the next
  13 * paragraph) shall be included in all copies or substantial portions of the
  14 * Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22 * DEALINGS IN THE SOFTWARE.
  23 *
  24 * Authors:
  25 *      Eric Anholt <eric@anholt.net>
  26 */
  27#include <linux/i2c.h>
  28#include <linux/slab.h>
  29#include <drm/drmP.h>
  30#include <drm/drm_atomic_helper.h>
  31#include <drm/drm_crtc.h>
  32#include "intel_drv.h"
  33#include <drm/i915_drm.h>
  34#include "i915_drv.h"
  35#include "dvo.h"
  36
  37#define SIL164_ADDR     0x38
  38#define CH7xxx_ADDR     0x76
  39#define TFP410_ADDR     0x38
  40#define NS2501_ADDR     0x38
  41
  42static const struct intel_dvo_device intel_dvo_devices[] = {
  43        {
  44                .type = INTEL_DVO_CHIP_TMDS,
  45                .name = "sil164",
  46                .dvo_reg = DVOC,
  47                .dvo_srcdim_reg = DVOC_SRCDIM,
  48                .slave_addr = SIL164_ADDR,
  49                .dev_ops = &sil164_ops,
  50        },
  51        {
  52                .type = INTEL_DVO_CHIP_TMDS,
  53                .name = "ch7xxx",
  54                .dvo_reg = DVOC,
  55                .dvo_srcdim_reg = DVOC_SRCDIM,
  56                .slave_addr = CH7xxx_ADDR,
  57                .dev_ops = &ch7xxx_ops,
  58        },
  59        {
  60                .type = INTEL_DVO_CHIP_TMDS,
  61                .name = "ch7xxx",
  62                .dvo_reg = DVOC,
  63                .dvo_srcdim_reg = DVOC_SRCDIM,
  64                .slave_addr = 0x75, /* For some ch7010 */
  65                .dev_ops = &ch7xxx_ops,
  66        },
  67        {
  68                .type = INTEL_DVO_CHIP_LVDS,
  69                .name = "ivch",
  70                .dvo_reg = DVOA,
  71                .dvo_srcdim_reg = DVOA_SRCDIM,
  72                .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
  73                .dev_ops = &ivch_ops,
  74        },
  75        {
  76                .type = INTEL_DVO_CHIP_TMDS,
  77                .name = "tfp410",
  78                .dvo_reg = DVOC,
  79                .dvo_srcdim_reg = DVOC_SRCDIM,
  80                .slave_addr = TFP410_ADDR,
  81                .dev_ops = &tfp410_ops,
  82        },
  83        {
  84                .type = INTEL_DVO_CHIP_LVDS,
  85                .name = "ch7017",
  86                .dvo_reg = DVOC,
  87                .dvo_srcdim_reg = DVOC_SRCDIM,
  88                .slave_addr = 0x75,
  89                .gpio = GMBUS_PIN_DPB,
  90                .dev_ops = &ch7017_ops,
  91        },
  92        {
  93                .type = INTEL_DVO_CHIP_TMDS,
  94                .name = "ns2501",
  95                .dvo_reg = DVOB,
  96                .dvo_srcdim_reg = DVOB_SRCDIM,
  97                .slave_addr = NS2501_ADDR,
  98                .dev_ops = &ns2501_ops,
  99       }
 100};
 101
 102struct intel_dvo {
 103        struct intel_encoder base;
 104
 105        struct intel_dvo_device dev;
 106
 107        struct intel_connector *attached_connector;
 108
 109        bool panel_wants_dither;
 110};
 111
 112static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
 113{
 114        return container_of(encoder, struct intel_dvo, base);
 115}
 116
 117static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
 118{
 119        return enc_to_dvo(intel_attached_encoder(connector));
 120}
 121
 122static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
 123{
 124        struct drm_device *dev = connector->base.dev;
 125        struct drm_i915_private *dev_priv = to_i915(dev);
 126        struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
 127        u32 tmp;
 128
 129        tmp = I915_READ(intel_dvo->dev.dvo_reg);
 130
 131        if (!(tmp & DVO_ENABLE))
 132                return false;
 133
 134        return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
 135}
 136
 137static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
 138                                   enum pipe *pipe)
 139{
 140        struct drm_device *dev = encoder->base.dev;
 141        struct drm_i915_private *dev_priv = to_i915(dev);
 142        struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 143        u32 tmp;
 144
 145        tmp = I915_READ(intel_dvo->dev.dvo_reg);
 146
 147        if (!(tmp & DVO_ENABLE))
 148                return false;
 149
 150        *pipe = PORT_TO_PIPE(tmp);
 151
 152        return true;
 153}
 154
 155static void intel_dvo_get_config(struct intel_encoder *encoder,
 156                                 struct intel_crtc_state *pipe_config)
 157{
 158        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 159        struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 160        u32 tmp, flags = 0;
 161
 162        pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO);
 163
 164        tmp = I915_READ(intel_dvo->dev.dvo_reg);
 165        if (tmp & DVO_HSYNC_ACTIVE_HIGH)
 166                flags |= DRM_MODE_FLAG_PHSYNC;
 167        else
 168                flags |= DRM_MODE_FLAG_NHSYNC;
 169        if (tmp & DVO_VSYNC_ACTIVE_HIGH)
 170                flags |= DRM_MODE_FLAG_PVSYNC;
 171        else
 172                flags |= DRM_MODE_FLAG_NVSYNC;
 173
 174        pipe_config->base.adjusted_mode.flags |= flags;
 175
 176        pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
 177}
 178
 179static void intel_disable_dvo(struct intel_encoder *encoder,
 180                              const struct intel_crtc_state *old_crtc_state,
 181                              const struct drm_connector_state *old_conn_state)
 182{
 183        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 184        struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 185        i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
 186        u32 temp = I915_READ(dvo_reg);
 187
 188        intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
 189        I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
 190        I915_READ(dvo_reg);
 191}
 192
 193static void intel_enable_dvo(struct intel_encoder *encoder,
 194                             const struct intel_crtc_state *pipe_config,
 195                             const struct drm_connector_state *conn_state)
 196{
 197        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 198        struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 199        i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
 200        u32 temp = I915_READ(dvo_reg);
 201
 202        intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
 203                                         &pipe_config->base.mode,
 204                                         &pipe_config->base.adjusted_mode);
 205
 206        I915_WRITE(dvo_reg, temp | DVO_ENABLE);
 207        I915_READ(dvo_reg);
 208
 209        intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
 210}
 211
 212static enum drm_mode_status
 213intel_dvo_mode_valid(struct drm_connector *connector,
 214                     struct drm_display_mode *mode)
 215{
 216        struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
 217        const struct drm_display_mode *fixed_mode =
 218                to_intel_connector(connector)->panel.fixed_mode;
 219        int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
 220        int target_clock = mode->clock;
 221
 222        if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 223                return MODE_NO_DBLESCAN;
 224
 225        /* XXX: Validate clock range */
 226
 227        if (fixed_mode) {
 228                if (mode->hdisplay > fixed_mode->hdisplay)
 229                        return MODE_PANEL;
 230                if (mode->vdisplay > fixed_mode->vdisplay)
 231                        return MODE_PANEL;
 232
 233                target_clock = fixed_mode->clock;
 234        }
 235
 236        if (target_clock > max_dotclk)
 237                return MODE_CLOCK_HIGH;
 238
 239        return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
 240}
 241
 242static bool intel_dvo_compute_config(struct intel_encoder *encoder,
 243                                     struct intel_crtc_state *pipe_config,
 244                                     struct drm_connector_state *conn_state)
 245{
 246        struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 247        const struct drm_display_mode *fixed_mode =
 248                intel_dvo->attached_connector->panel.fixed_mode;
 249        struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 250
 251        /*
 252         * If we have timings from the BIOS for the panel, put them in
 253         * to the adjusted mode.  The CRTC will be set up for this mode,
 254         * with the panel scaling set up to source from the H/VDisplay
 255         * of the original mode.
 256         */
 257        if (fixed_mode)
 258                intel_fixed_panel_mode(fixed_mode, adjusted_mode);
 259
 260        if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
 261                return false;
 262
 263        return true;
 264}
 265
 266static void intel_dvo_pre_enable(struct intel_encoder *encoder,
 267                                 const struct intel_crtc_state *pipe_config,
 268                                 const struct drm_connector_state *conn_state)
 269{
 270        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 271        struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
 272        const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 273        struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 274        int pipe = crtc->pipe;
 275        u32 dvo_val;
 276        i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
 277        i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg;
 278
 279        /* Save the data order, since I don't know what it should be set to. */
 280        dvo_val = I915_READ(dvo_reg) &
 281                  (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
 282        dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
 283                   DVO_BLANK_ACTIVE_HIGH;
 284
 285        if (pipe == 1)
 286                dvo_val |= DVO_PIPE_B_SELECT;
 287        dvo_val |= DVO_PIPE_STALL;
 288        if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 289                dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
 290        if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 291                dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
 292
 293        /*I915_WRITE(DVOB_SRCDIM,
 294          (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
 295          (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
 296        I915_WRITE(dvo_srcdim_reg,
 297                   (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
 298                   (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
 299        /*I915_WRITE(DVOB, dvo_val);*/
 300        I915_WRITE(dvo_reg, dvo_val);
 301}
 302
 303static enum drm_connector_status
 304intel_dvo_detect(struct drm_connector *connector, bool force)
 305{
 306        struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
 307        DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 308                      connector->base.id, connector->name);
 309        return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
 310}
 311
 312static int intel_dvo_get_modes(struct drm_connector *connector)
 313{
 314        struct drm_i915_private *dev_priv = to_i915(connector->dev);
 315        const struct drm_display_mode *fixed_mode =
 316                to_intel_connector(connector)->panel.fixed_mode;
 317
 318        /*
 319         * We should probably have an i2c driver get_modes function for those
 320         * devices which will have a fixed set of modes determined by the chip
 321         * (TV-out, for example), but for now with just TMDS and LVDS,
 322         * that's not the case.
 323         */
 324        intel_ddc_get_modes(connector,
 325                            intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
 326        if (!list_empty(&connector->probed_modes))
 327                return 1;
 328
 329        if (fixed_mode) {
 330                struct drm_display_mode *mode;
 331                mode = drm_mode_duplicate(connector->dev, fixed_mode);
 332                if (mode) {
 333                        drm_mode_probed_add(connector, mode);
 334                        return 1;
 335                }
 336        }
 337
 338        return 0;
 339}
 340
 341static void intel_dvo_destroy(struct drm_connector *connector)
 342{
 343        drm_connector_cleanup(connector);
 344        intel_panel_fini(&to_intel_connector(connector)->panel);
 345        kfree(connector);
 346}
 347
 348static const struct drm_connector_funcs intel_dvo_connector_funcs = {
 349        .detect = intel_dvo_detect,
 350        .late_register = intel_connector_register,
 351        .early_unregister = intel_connector_unregister,
 352        .destroy = intel_dvo_destroy,
 353        .fill_modes = drm_helper_probe_single_connector_modes,
 354        .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 355        .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 356};
 357
 358static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
 359        .mode_valid = intel_dvo_mode_valid,
 360        .get_modes = intel_dvo_get_modes,
 361};
 362
 363static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
 364{
 365        struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
 366
 367        if (intel_dvo->dev.dev_ops->destroy)
 368                intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
 369
 370        intel_encoder_destroy(encoder);
 371}
 372
 373static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
 374        .destroy = intel_dvo_enc_destroy,
 375};
 376
 377/*
 378 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
 379 *
 380 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
 381 * chip being on DVOB/C and having multiple pipes.
 382 */
 383static struct drm_display_mode *
 384intel_dvo_get_current_mode(struct intel_encoder *encoder)
 385{
 386        struct drm_display_mode *mode;
 387
 388        mode = intel_encoder_current_mode(encoder);
 389        if (mode) {
 390                DRM_DEBUG_KMS("using current (BIOS) mode: ");
 391                drm_mode_debug_printmodeline(mode);
 392                mode->type |= DRM_MODE_TYPE_PREFERRED;
 393        }
 394
 395        return mode;
 396}
 397
 398static enum port intel_dvo_port(i915_reg_t dvo_reg)
 399{
 400        if (i915_mmio_reg_equal(dvo_reg, DVOA))
 401                return PORT_A;
 402        else if (i915_mmio_reg_equal(dvo_reg, DVOB))
 403                return PORT_B;
 404        else
 405                return PORT_C;
 406}
 407
 408void intel_dvo_init(struct drm_i915_private *dev_priv)
 409{
 410        struct intel_encoder *intel_encoder;
 411        struct intel_dvo *intel_dvo;
 412        struct intel_connector *intel_connector;
 413        int i;
 414        int encoder_type = DRM_MODE_ENCODER_NONE;
 415
 416        intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
 417        if (!intel_dvo)
 418                return;
 419
 420        intel_connector = intel_connector_alloc();
 421        if (!intel_connector) {
 422                kfree(intel_dvo);
 423                return;
 424        }
 425
 426        intel_dvo->attached_connector = intel_connector;
 427
 428        intel_encoder = &intel_dvo->base;
 429
 430        intel_encoder->disable = intel_disable_dvo;
 431        intel_encoder->enable = intel_enable_dvo;
 432        intel_encoder->get_hw_state = intel_dvo_get_hw_state;
 433        intel_encoder->get_config = intel_dvo_get_config;
 434        intel_encoder->compute_config = intel_dvo_compute_config;
 435        intel_encoder->pre_enable = intel_dvo_pre_enable;
 436        intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
 437
 438        /* Now, try to find a controller */
 439        for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
 440                struct drm_connector *connector = &intel_connector->base;
 441                const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
 442                struct i2c_adapter *i2c;
 443                int gpio;
 444                bool dvoinit;
 445                enum pipe pipe;
 446                uint32_t dpll[I915_MAX_PIPES];
 447                enum port port;
 448
 449                /*
 450                 * Allow the I2C driver info to specify the GPIO to be used in
 451                 * special cases, but otherwise default to what's defined
 452                 * in the spec.
 453                 */
 454                if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
 455                        gpio = dvo->gpio;
 456                else if (dvo->type == INTEL_DVO_CHIP_LVDS)
 457                        gpio = GMBUS_PIN_SSC;
 458                else
 459                        gpio = GMBUS_PIN_DPB;
 460
 461                /*
 462                 * Set up the I2C bus necessary for the chip we're probing.
 463                 * It appears that everything is on GPIOE except for panels
 464                 * on i830 laptops, which are on GPIOB (DVOA).
 465                 */
 466                i2c = intel_gmbus_get_adapter(dev_priv, gpio);
 467
 468                intel_dvo->dev = *dvo;
 469
 470                /*
 471                 * GMBUS NAK handling seems to be unstable, hence let the
 472                 * transmitter detection run in bit banging mode for now.
 473                 */
 474                intel_gmbus_force_bit(i2c, true);
 475
 476                /*
 477                 * ns2501 requires the DVO 2x clock before it will
 478                 * respond to i2c accesses, so make sure we have
 479                 * have the clock enabled before we attempt to
 480                 * initialize the device.
 481                 */
 482                for_each_pipe(dev_priv, pipe) {
 483                        dpll[pipe] = I915_READ(DPLL(pipe));
 484                        I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE);
 485                }
 486
 487                dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
 488
 489                /* restore the DVO 2x clock state to original */
 490                for_each_pipe(dev_priv, pipe) {
 491                        I915_WRITE(DPLL(pipe), dpll[pipe]);
 492                }
 493
 494                intel_gmbus_force_bit(i2c, false);
 495
 496                if (!dvoinit)
 497                        continue;
 498
 499                port = intel_dvo_port(dvo->dvo_reg);
 500                drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
 501                                 &intel_dvo_enc_funcs, encoder_type,
 502                                 "DVO %c", port_name(port));
 503
 504                intel_encoder->type = INTEL_OUTPUT_DVO;
 505                intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
 506                intel_encoder->port = port;
 507                intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
 508
 509                switch (dvo->type) {
 510                case INTEL_DVO_CHIP_TMDS:
 511                        intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
 512                                (1 << INTEL_OUTPUT_DVO);
 513                        drm_connector_init(&dev_priv->drm, connector,
 514                                           &intel_dvo_connector_funcs,
 515                                           DRM_MODE_CONNECTOR_DVII);
 516                        encoder_type = DRM_MODE_ENCODER_TMDS;
 517                        break;
 518                case INTEL_DVO_CHIP_LVDS:
 519                        intel_encoder->cloneable = 0;
 520                        drm_connector_init(&dev_priv->drm, connector,
 521                                           &intel_dvo_connector_funcs,
 522                                           DRM_MODE_CONNECTOR_LVDS);
 523                        encoder_type = DRM_MODE_ENCODER_LVDS;
 524                        break;
 525                }
 526
 527                drm_connector_helper_add(connector,
 528                                         &intel_dvo_connector_helper_funcs);
 529                connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 530                connector->interlace_allowed = false;
 531                connector->doublescan_allowed = false;
 532
 533                intel_connector_attach_encoder(intel_connector, intel_encoder);
 534                if (dvo->type == INTEL_DVO_CHIP_LVDS) {
 535                        /*
 536                         * For our LVDS chipsets, we should hopefully be able
 537                         * to dig the fixed panel mode out of the BIOS data.
 538                         * However, it's in a different format from the BIOS
 539                         * data on chipsets with integrated LVDS (stored in AIM
 540                         * headers, likely), so for now, just get the current
 541                         * mode being output through DVO.
 542                         */
 543                        intel_panel_init(&intel_connector->panel,
 544                                         intel_dvo_get_current_mode(intel_encoder),
 545                                         NULL);
 546                        intel_dvo->panel_wants_dither = true;
 547                }
 548
 549                return;
 550        }
 551
 552        kfree(intel_dvo);
 553        kfree(intel_connector);
 554}
 555