linux/drivers/media/i2c/adv7393.c
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   1/*
   2 * adv7393 - ADV7393 Video Encoder Driver
   3 *
   4 * The encoder hardware does not support SECAM.
   5 *
   6 * Copyright (C) 2010-2012 ADVANSEE - http://www.advansee.com/
   7 * Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
   8 *
   9 * Based on ADV7343 driver,
  10 *
  11 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
  12 *
  13 * This program is free software; you can redistribute it and/or
  14 * modify it under the terms of the GNU General Public License as
  15 * published by the Free Software Foundation version 2.
  16 *
  17 * This program is distributed .as is. WITHOUT ANY WARRANTY of any
  18 * kind, whether express or implied; without even the implied warranty
  19 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20 * GNU General Public License for more details.
  21 */
  22
  23#include <linux/kernel.h>
  24#include <linux/init.h>
  25#include <linux/ctype.h>
  26#include <linux/slab.h>
  27#include <linux/i2c.h>
  28#include <linux/device.h>
  29#include <linux/delay.h>
  30#include <linux/module.h>
  31#include <linux/videodev2.h>
  32#include <linux/uaccess.h>
  33
  34#include <media/i2c/adv7393.h>
  35#include <media/v4l2-device.h>
  36#include <media/v4l2-ctrls.h>
  37
  38#include "adv7393_regs.h"
  39
  40MODULE_DESCRIPTION("ADV7393 video encoder driver");
  41MODULE_LICENSE("GPL");
  42
  43static bool debug;
  44module_param(debug, bool, 0644);
  45MODULE_PARM_DESC(debug, "Debug level 0-1");
  46
  47struct adv7393_state {
  48        struct v4l2_subdev sd;
  49        struct v4l2_ctrl_handler hdl;
  50        u8 reg00;
  51        u8 reg01;
  52        u8 reg02;
  53        u8 reg35;
  54        u8 reg80;
  55        u8 reg82;
  56        u32 output;
  57        v4l2_std_id std;
  58};
  59
  60static inline struct adv7393_state *to_state(struct v4l2_subdev *sd)
  61{
  62        return container_of(sd, struct adv7393_state, sd);
  63}
  64
  65static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
  66{
  67        return &container_of(ctrl->handler, struct adv7393_state, hdl)->sd;
  68}
  69
  70static inline int adv7393_write(struct v4l2_subdev *sd, u8 reg, u8 value)
  71{
  72        struct i2c_client *client = v4l2_get_subdevdata(sd);
  73
  74        return i2c_smbus_write_byte_data(client, reg, value);
  75}
  76
  77static const u8 adv7393_init_reg_val[] = {
  78        ADV7393_SOFT_RESET, ADV7393_SOFT_RESET_DEFAULT,
  79        ADV7393_POWER_MODE_REG, ADV7393_POWER_MODE_REG_DEFAULT,
  80
  81        ADV7393_HD_MODE_REG1, ADV7393_HD_MODE_REG1_DEFAULT,
  82        ADV7393_HD_MODE_REG2, ADV7393_HD_MODE_REG2_DEFAULT,
  83        ADV7393_HD_MODE_REG3, ADV7393_HD_MODE_REG3_DEFAULT,
  84        ADV7393_HD_MODE_REG4, ADV7393_HD_MODE_REG4_DEFAULT,
  85        ADV7393_HD_MODE_REG5, ADV7393_HD_MODE_REG5_DEFAULT,
  86        ADV7393_HD_MODE_REG6, ADV7393_HD_MODE_REG6_DEFAULT,
  87        ADV7393_HD_MODE_REG7, ADV7393_HD_MODE_REG7_DEFAULT,
  88
  89        ADV7393_SD_MODE_REG1, ADV7393_SD_MODE_REG1_DEFAULT,
  90        ADV7393_SD_MODE_REG2, ADV7393_SD_MODE_REG2_DEFAULT,
  91        ADV7393_SD_MODE_REG3, ADV7393_SD_MODE_REG3_DEFAULT,
  92        ADV7393_SD_MODE_REG4, ADV7393_SD_MODE_REG4_DEFAULT,
  93        ADV7393_SD_MODE_REG5, ADV7393_SD_MODE_REG5_DEFAULT,
  94        ADV7393_SD_MODE_REG6, ADV7393_SD_MODE_REG6_DEFAULT,
  95        ADV7393_SD_MODE_REG7, ADV7393_SD_MODE_REG7_DEFAULT,
  96        ADV7393_SD_MODE_REG8, ADV7393_SD_MODE_REG8_DEFAULT,
  97
  98        ADV7393_SD_TIMING_REG0, ADV7393_SD_TIMING_REG0_DEFAULT,
  99
 100        ADV7393_SD_HUE_ADJUST, ADV7393_SD_HUE_ADJUST_DEFAULT,
 101        ADV7393_SD_CGMS_WSS0, ADV7393_SD_CGMS_WSS0_DEFAULT,
 102        ADV7393_SD_BRIGHTNESS_WSS, ADV7393_SD_BRIGHTNESS_WSS_DEFAULT,
 103};
 104
 105/*
 106 *                          2^32
 107 * FSC(reg) =  FSC (HZ) * --------
 108 *                        27000000
 109 */
 110static const struct adv7393_std_info stdinfo[] = {
 111        {
 112                /* FSC(Hz) = 4,433,618.75 Hz */
 113                SD_STD_NTSC, 705268427, V4L2_STD_NTSC_443,
 114        }, {
 115                /* FSC(Hz) = 3,579,545.45 Hz */
 116                SD_STD_NTSC, 569408542, V4L2_STD_NTSC,
 117        }, {
 118                /* FSC(Hz) = 3,575,611.00 Hz */
 119                SD_STD_PAL_M, 568782678, V4L2_STD_PAL_M,
 120        }, {
 121                /* FSC(Hz) = 3,582,056.00 Hz */
 122                SD_STD_PAL_N, 569807903, V4L2_STD_PAL_Nc,
 123        }, {
 124                /* FSC(Hz) = 4,433,618.75 Hz */
 125                SD_STD_PAL_N, 705268427, V4L2_STD_PAL_N,
 126        }, {
 127                /* FSC(Hz) = 4,433,618.75 Hz */
 128                SD_STD_PAL_M, 705268427, V4L2_STD_PAL_60,
 129        }, {
 130                /* FSC(Hz) = 4,433,618.75 Hz */
 131                SD_STD_PAL_BDGHI, 705268427, V4L2_STD_PAL,
 132        },
 133};
 134
 135static int adv7393_setstd(struct v4l2_subdev *sd, v4l2_std_id std)
 136{
 137        struct adv7393_state *state = to_state(sd);
 138        const struct adv7393_std_info *std_info;
 139        int num_std;
 140        u8 reg;
 141        u32 val;
 142        int err = 0;
 143        int i;
 144
 145        num_std = ARRAY_SIZE(stdinfo);
 146
 147        for (i = 0; i < num_std; i++) {
 148                if (stdinfo[i].stdid & std)
 149                        break;
 150        }
 151
 152        if (i == num_std) {
 153                v4l2_dbg(1, debug, sd,
 154                                "Invalid std or std is not supported: %llx\n",
 155                                                (unsigned long long)std);
 156                return -EINVAL;
 157        }
 158
 159        std_info = &stdinfo[i];
 160
 161        /* Set the standard */
 162        val = state->reg80 & ~SD_STD_MASK;
 163        val |= std_info->standard_val3;
 164        err = adv7393_write(sd, ADV7393_SD_MODE_REG1, val);
 165        if (err < 0)
 166                goto setstd_exit;
 167
 168        state->reg80 = val;
 169
 170        /* Configure the input mode register */
 171        val = state->reg01 & ~INPUT_MODE_MASK;
 172        val |= SD_INPUT_MODE;
 173        err = adv7393_write(sd, ADV7393_MODE_SELECT_REG, val);
 174        if (err < 0)
 175                goto setstd_exit;
 176
 177        state->reg01 = val;
 178
 179        /* Program the sub carrier frequency registers */
 180        val = std_info->fsc_val;
 181        for (reg = ADV7393_FSC_REG0; reg <= ADV7393_FSC_REG3; reg++) {
 182                err = adv7393_write(sd, reg, val);
 183                if (err < 0)
 184                        goto setstd_exit;
 185                val >>= 8;
 186        }
 187
 188        val = state->reg82;
 189
 190        /* Pedestal settings */
 191        if (std & (V4L2_STD_NTSC | V4L2_STD_NTSC_443))
 192                val |= SD_PEDESTAL_EN;
 193        else
 194                val &= SD_PEDESTAL_DI;
 195
 196        err = adv7393_write(sd, ADV7393_SD_MODE_REG2, val);
 197        if (err < 0)
 198                goto setstd_exit;
 199
 200        state->reg82 = val;
 201
 202setstd_exit:
 203        if (err != 0)
 204                v4l2_err(sd, "Error setting std, write failed\n");
 205
 206        return err;
 207}
 208
 209static int adv7393_setoutput(struct v4l2_subdev *sd, u32 output_type)
 210{
 211        struct adv7393_state *state = to_state(sd);
 212        u8 val;
 213        int err = 0;
 214
 215        if (output_type > ADV7393_SVIDEO_ID) {
 216                v4l2_dbg(1, debug, sd,
 217                        "Invalid output type or output type not supported:%d\n",
 218                                                                output_type);
 219                return -EINVAL;
 220        }
 221
 222        /* Enable Appropriate DAC */
 223        val = state->reg00 & 0x03;
 224
 225        if (output_type == ADV7393_COMPOSITE_ID)
 226                val |= ADV7393_COMPOSITE_POWER_VALUE;
 227        else if (output_type == ADV7393_COMPONENT_ID)
 228                val |= ADV7393_COMPONENT_POWER_VALUE;
 229        else
 230                val |= ADV7393_SVIDEO_POWER_VALUE;
 231
 232        err = adv7393_write(sd, ADV7393_POWER_MODE_REG, val);
 233        if (err < 0)
 234                goto setoutput_exit;
 235
 236        state->reg00 = val;
 237
 238        /* Enable YUV output */
 239        val = state->reg02 | YUV_OUTPUT_SELECT;
 240        err = adv7393_write(sd, ADV7393_MODE_REG0, val);
 241        if (err < 0)
 242                goto setoutput_exit;
 243
 244        state->reg02 = val;
 245
 246        /* configure SD DAC Output 1 bit */
 247        val = state->reg82;
 248        if (output_type == ADV7393_COMPONENT_ID)
 249                val &= SD_DAC_OUT1_DI;
 250        else
 251                val |= SD_DAC_OUT1_EN;
 252        err = adv7393_write(sd, ADV7393_SD_MODE_REG2, val);
 253        if (err < 0)
 254                goto setoutput_exit;
 255
 256        state->reg82 = val;
 257
 258        /* configure ED/HD Color DAC Swap bit to zero */
 259        val = state->reg35 & HD_DAC_SWAP_DI;
 260        err = adv7393_write(sd, ADV7393_HD_MODE_REG6, val);
 261        if (err < 0)
 262                goto setoutput_exit;
 263
 264        state->reg35 = val;
 265
 266setoutput_exit:
 267        if (err != 0)
 268                v4l2_err(sd, "Error setting output, write failed\n");
 269
 270        return err;
 271}
 272
 273static int adv7393_log_status(struct v4l2_subdev *sd)
 274{
 275        struct adv7393_state *state = to_state(sd);
 276
 277        v4l2_info(sd, "Standard: %llx\n", (unsigned long long)state->std);
 278        v4l2_info(sd, "Output: %s\n", (state->output == 0) ? "Composite" :
 279                        ((state->output == 1) ? "Component" : "S-Video"));
 280        return 0;
 281}
 282
 283static int adv7393_s_ctrl(struct v4l2_ctrl *ctrl)
 284{
 285        struct v4l2_subdev *sd = to_sd(ctrl);
 286
 287        switch (ctrl->id) {
 288        case V4L2_CID_BRIGHTNESS:
 289                return adv7393_write(sd, ADV7393_SD_BRIGHTNESS_WSS,
 290                                        ctrl->val & SD_BRIGHTNESS_VALUE_MASK);
 291
 292        case V4L2_CID_HUE:
 293                return adv7393_write(sd, ADV7393_SD_HUE_ADJUST,
 294                                        ctrl->val - ADV7393_HUE_MIN);
 295
 296        case V4L2_CID_GAIN:
 297                return adv7393_write(sd, ADV7393_DAC123_OUTPUT_LEVEL,
 298                                        ctrl->val);
 299        }
 300        return -EINVAL;
 301}
 302
 303static const struct v4l2_ctrl_ops adv7393_ctrl_ops = {
 304        .s_ctrl = adv7393_s_ctrl,
 305};
 306
 307static const struct v4l2_subdev_core_ops adv7393_core_ops = {
 308        .log_status = adv7393_log_status,
 309};
 310
 311static int adv7393_s_std_output(struct v4l2_subdev *sd, v4l2_std_id std)
 312{
 313        struct adv7393_state *state = to_state(sd);
 314        int err = 0;
 315
 316        if (state->std == std)
 317                return 0;
 318
 319        err = adv7393_setstd(sd, std);
 320        if (!err)
 321                state->std = std;
 322
 323        return err;
 324}
 325
 326static int adv7393_s_routing(struct v4l2_subdev *sd,
 327                u32 input, u32 output, u32 config)
 328{
 329        struct adv7393_state *state = to_state(sd);
 330        int err = 0;
 331
 332        if (state->output == output)
 333                return 0;
 334
 335        err = adv7393_setoutput(sd, output);
 336        if (!err)
 337                state->output = output;
 338
 339        return err;
 340}
 341
 342static const struct v4l2_subdev_video_ops adv7393_video_ops = {
 343        .s_std_output   = adv7393_s_std_output,
 344        .s_routing      = adv7393_s_routing,
 345};
 346
 347static const struct v4l2_subdev_ops adv7393_ops = {
 348        .core   = &adv7393_core_ops,
 349        .video  = &adv7393_video_ops,
 350};
 351
 352static int adv7393_initialize(struct v4l2_subdev *sd)
 353{
 354        struct adv7393_state *state = to_state(sd);
 355        int err = 0;
 356        int i;
 357
 358        for (i = 0; i < ARRAY_SIZE(adv7393_init_reg_val); i += 2) {
 359
 360                err = adv7393_write(sd, adv7393_init_reg_val[i],
 361                                        adv7393_init_reg_val[i+1]);
 362                if (err) {
 363                        v4l2_err(sd, "Error initializing\n");
 364                        return err;
 365                }
 366        }
 367
 368        /* Configure for default video standard */
 369        err = adv7393_setoutput(sd, state->output);
 370        if (err < 0) {
 371                v4l2_err(sd, "Error setting output during init\n");
 372                return -EINVAL;
 373        }
 374
 375        err = adv7393_setstd(sd, state->std);
 376        if (err < 0) {
 377                v4l2_err(sd, "Error setting std during init\n");
 378                return -EINVAL;
 379        }
 380
 381        return err;
 382}
 383
 384static int adv7393_probe(struct i2c_client *client,
 385                                const struct i2c_device_id *id)
 386{
 387        struct adv7393_state *state;
 388        int err;
 389
 390        if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
 391                return -ENODEV;
 392
 393        v4l_info(client, "chip found @ 0x%x (%s)\n",
 394                        client->addr << 1, client->adapter->name);
 395
 396        state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
 397        if (state == NULL)
 398                return -ENOMEM;
 399
 400        state->reg00    = ADV7393_POWER_MODE_REG_DEFAULT;
 401        state->reg01    = 0x00;
 402        state->reg02    = 0x20;
 403        state->reg35    = ADV7393_HD_MODE_REG6_DEFAULT;
 404        state->reg80    = ADV7393_SD_MODE_REG1_DEFAULT;
 405        state->reg82    = ADV7393_SD_MODE_REG2_DEFAULT;
 406
 407        state->output = ADV7393_COMPOSITE_ID;
 408        state->std = V4L2_STD_NTSC;
 409
 410        v4l2_i2c_subdev_init(&state->sd, client, &adv7393_ops);
 411
 412        v4l2_ctrl_handler_init(&state->hdl, 3);
 413        v4l2_ctrl_new_std(&state->hdl, &adv7393_ctrl_ops,
 414                        V4L2_CID_BRIGHTNESS, ADV7393_BRIGHTNESS_MIN,
 415                                             ADV7393_BRIGHTNESS_MAX, 1,
 416                                             ADV7393_BRIGHTNESS_DEF);
 417        v4l2_ctrl_new_std(&state->hdl, &adv7393_ctrl_ops,
 418                        V4L2_CID_HUE, ADV7393_HUE_MIN,
 419                                      ADV7393_HUE_MAX, 1,
 420                                      ADV7393_HUE_DEF);
 421        v4l2_ctrl_new_std(&state->hdl, &adv7393_ctrl_ops,
 422                        V4L2_CID_GAIN, ADV7393_GAIN_MIN,
 423                                       ADV7393_GAIN_MAX, 1,
 424                                       ADV7393_GAIN_DEF);
 425        state->sd.ctrl_handler = &state->hdl;
 426        if (state->hdl.error) {
 427                int err = state->hdl.error;
 428
 429                v4l2_ctrl_handler_free(&state->hdl);
 430                return err;
 431        }
 432        v4l2_ctrl_handler_setup(&state->hdl);
 433
 434        err = adv7393_initialize(&state->sd);
 435        if (err)
 436                v4l2_ctrl_handler_free(&state->hdl);
 437        return err;
 438}
 439
 440static int adv7393_remove(struct i2c_client *client)
 441{
 442        struct v4l2_subdev *sd = i2c_get_clientdata(client);
 443        struct adv7393_state *state = to_state(sd);
 444
 445        v4l2_device_unregister_subdev(sd);
 446        v4l2_ctrl_handler_free(&state->hdl);
 447
 448        return 0;
 449}
 450
 451static const struct i2c_device_id adv7393_id[] = {
 452        {"adv7393", 0},
 453        {},
 454};
 455MODULE_DEVICE_TABLE(i2c, adv7393_id);
 456
 457static struct i2c_driver adv7393_driver = {
 458        .driver = {
 459                .name   = "adv7393",
 460        },
 461        .probe          = adv7393_probe,
 462        .remove         = adv7393_remove,
 463        .id_table       = adv7393_id,
 464};
 465module_i2c_driver(adv7393_driver);
 466