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12#include <asm/mach/arch.h>
13#include <asm/mach/map.h>
14
15#include <linux/platform_device.h>
16#include <linux/i2c-gpio.h>
17
18#include <asm/arch/board.h>
19#include <asm/arch/gpio.h>
20#include <asm/arch/at91sam9260.h>
21#include <asm/arch/at91sam926x_mc.h>
22#include <asm/arch/at91sam9260_matrix.h>
23
24#include "generic.h"
25
26
27
28
29
30
31#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
32static u64 ohci_dmamask = 0xffffffffUL;
33static struct at91_usbh_data usbh_data;
34
35static struct resource usbh_resources[] = {
36 [0] = {
37 .start = AT91SAM9260_UHP_BASE,
38 .end = AT91SAM9260_UHP_BASE + SZ_1M - 1,
39 .flags = IORESOURCE_MEM,
40 },
41 [1] = {
42 .start = AT91SAM9260_ID_UHP,
43 .end = AT91SAM9260_ID_UHP,
44 .flags = IORESOURCE_IRQ,
45 },
46};
47
48static struct platform_device at91_usbh_device = {
49 .name = "at91_ohci",
50 .id = -1,
51 .dev = {
52 .dma_mask = &ohci_dmamask,
53 .coherent_dma_mask = 0xffffffff,
54 .platform_data = &usbh_data,
55 },
56 .resource = usbh_resources,
57 .num_resources = ARRAY_SIZE(usbh_resources),
58};
59
60void __init at91_add_device_usbh(struct at91_usbh_data *data)
61{
62 if (!data)
63 return;
64
65 usbh_data = *data;
66 platform_device_register(&at91_usbh_device);
67}
68#else
69void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
70#endif
71
72
73
74
75
76
77#ifdef CONFIG_USB_GADGET_AT91
78static struct at91_udc_data udc_data;
79
80static struct resource udc_resources[] = {
81 [0] = {
82 .start = AT91SAM9260_BASE_UDP,
83 .end = AT91SAM9260_BASE_UDP + SZ_16K - 1,
84 .flags = IORESOURCE_MEM,
85 },
86 [1] = {
87 .start = AT91SAM9260_ID_UDP,
88 .end = AT91SAM9260_ID_UDP,
89 .flags = IORESOURCE_IRQ,
90 },
91};
92
93static struct platform_device at91_udc_device = {
94 .name = "at91_udc",
95 .id = -1,
96 .dev = {
97 .platform_data = &udc_data,
98 },
99 .resource = udc_resources,
100 .num_resources = ARRAY_SIZE(udc_resources),
101};
102
103void __init at91_add_device_udc(struct at91_udc_data *data)
104{
105 if (!data)
106 return;
107
108 if (data->vbus_pin) {
109 at91_set_gpio_input(data->vbus_pin, 0);
110 at91_set_deglitch(data->vbus_pin, 1);
111 }
112
113
114
115 udc_data = *data;
116 platform_device_register(&at91_udc_device);
117}
118#else
119void __init at91_add_device_udc(struct at91_udc_data *data) {}
120#endif
121
122
123
124
125
126
127#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
128static u64 eth_dmamask = 0xffffffffUL;
129static struct at91_eth_data eth_data;
130
131static struct resource eth_resources[] = {
132 [0] = {
133 .start = AT91SAM9260_BASE_EMAC,
134 .end = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
135 .flags = IORESOURCE_MEM,
136 },
137 [1] = {
138 .start = AT91SAM9260_ID_EMAC,
139 .end = AT91SAM9260_ID_EMAC,
140 .flags = IORESOURCE_IRQ,
141 },
142};
143
144static struct platform_device at91sam9260_eth_device = {
145 .name = "macb",
146 .id = -1,
147 .dev = {
148 .dma_mask = ð_dmamask,
149 .coherent_dma_mask = 0xffffffff,
150 .platform_data = ð_data,
151 },
152 .resource = eth_resources,
153 .num_resources = ARRAY_SIZE(eth_resources),
154};
155
156void __init at91_add_device_eth(struct at91_eth_data *data)
157{
158 if (!data)
159 return;
160
161 if (data->phy_irq_pin) {
162 at91_set_gpio_input(data->phy_irq_pin, 0);
163 at91_set_deglitch(data->phy_irq_pin, 1);
164 }
165
166
167 at91_set_A_periph(AT91_PIN_PA19, 0);
168 at91_set_A_periph(AT91_PIN_PA17, 0);
169 at91_set_A_periph(AT91_PIN_PA14, 0);
170 at91_set_A_periph(AT91_PIN_PA15, 0);
171 at91_set_A_periph(AT91_PIN_PA18, 0);
172 at91_set_A_periph(AT91_PIN_PA16, 0);
173 at91_set_A_periph(AT91_PIN_PA12, 0);
174 at91_set_A_periph(AT91_PIN_PA13, 0);
175 at91_set_A_periph(AT91_PIN_PA21, 0);
176 at91_set_A_periph(AT91_PIN_PA20, 0);
177
178 if (!data->is_rmii) {
179 at91_set_B_periph(AT91_PIN_PA28, 0);
180 at91_set_B_periph(AT91_PIN_PA29, 0);
181 at91_set_B_periph(AT91_PIN_PA25, 0);
182 at91_set_B_periph(AT91_PIN_PA26, 0);
183 at91_set_B_periph(AT91_PIN_PA27, 0);
184 at91_set_B_periph(AT91_PIN_PA23, 0);
185 at91_set_B_periph(AT91_PIN_PA24, 0);
186 at91_set_B_periph(AT91_PIN_PA22, 0);
187 }
188
189 eth_data = *data;
190 platform_device_register(&at91sam9260_eth_device);
191}
192#else
193void __init at91_add_device_eth(struct at91_eth_data *data) {}
194#endif
195
196
197
198
199
200
201#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
202static u64 mmc_dmamask = 0xffffffffUL;
203static struct at91_mmc_data mmc_data;
204
205static struct resource mmc_resources[] = {
206 [0] = {
207 .start = AT91SAM9260_BASE_MCI,
208 .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
209 .flags = IORESOURCE_MEM,
210 },
211 [1] = {
212 .start = AT91SAM9260_ID_MCI,
213 .end = AT91SAM9260_ID_MCI,
214 .flags = IORESOURCE_IRQ,
215 },
216};
217
218static struct platform_device at91sam9260_mmc_device = {
219 .name = "at91_mci",
220 .id = -1,
221 .dev = {
222 .dma_mask = &mmc_dmamask,
223 .coherent_dma_mask = 0xffffffff,
224 .platform_data = &mmc_data,
225 },
226 .resource = mmc_resources,
227 .num_resources = ARRAY_SIZE(mmc_resources),
228};
229
230void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
231{
232 if (!data)
233 return;
234
235
236 if (data->det_pin) {
237 at91_set_gpio_input(data->det_pin, 1);
238 at91_set_deglitch(data->det_pin, 1);
239 }
240 if (data->wp_pin)
241 at91_set_gpio_input(data->wp_pin, 1);
242 if (data->vcc_pin)
243 at91_set_gpio_output(data->vcc_pin, 0);
244
245
246 at91_set_A_periph(AT91_PIN_PA8, 0);
247
248 if (data->slot_b) {
249
250 at91_set_B_periph(AT91_PIN_PA1, 1);
251
252
253 at91_set_B_periph(AT91_PIN_PA0, 1);
254 if (data->wire4) {
255 at91_set_B_periph(AT91_PIN_PA5, 1);
256 at91_set_B_periph(AT91_PIN_PA4, 1);
257 at91_set_B_periph(AT91_PIN_PA3, 1);
258 }
259 } else {
260
261 at91_set_A_periph(AT91_PIN_PA7, 1);
262
263
264 at91_set_A_periph(AT91_PIN_PA6, 1);
265 if (data->wire4) {
266 at91_set_A_periph(AT91_PIN_PA9, 1);
267 at91_set_A_periph(AT91_PIN_PA10, 1);
268 at91_set_A_periph(AT91_PIN_PA11, 1);
269 }
270 }
271
272 mmc_data = *data;
273 platform_device_register(&at91sam9260_mmc_device);
274}
275#else
276void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
277#endif
278
279
280
281
282
283
284#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
285static struct at91_nand_data nand_data;
286
287#define NAND_BASE AT91_CHIPSELECT_3
288
289static struct resource nand_resources[] = {
290 {
291 .start = NAND_BASE,
292 .end = NAND_BASE + SZ_8M - 1,
293 .flags = IORESOURCE_MEM,
294 }
295};
296
297static struct platform_device at91sam9260_nand_device = {
298 .name = "at91_nand",
299 .id = -1,
300 .dev = {
301 .platform_data = &nand_data,
302 },
303 .resource = nand_resources,
304 .num_resources = ARRAY_SIZE(nand_resources),
305};
306
307void __init at91_add_device_nand(struct at91_nand_data *data)
308{
309 unsigned long csa, mode;
310
311 if (!data)
312 return;
313
314 csa = at91_sys_read(AT91_MATRIX_EBICSA);
315 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
316
317
318 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
319 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
320
321 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
322 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
323
324 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
325
326 if (data->bus_width_16)
327 mode = AT91_SMC_DBW_16;
328 else
329 mode = AT91_SMC_DBW_8;
330 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
331
332
333 if (data->enable_pin)
334 at91_set_gpio_output(data->enable_pin, 1);
335
336
337 if (data->rdy_pin)
338 at91_set_gpio_input(data->rdy_pin, 1);
339
340
341 if (data->det_pin)
342 at91_set_gpio_input(data->det_pin, 1);
343
344 nand_data = *data;
345 platform_device_register(&at91sam9260_nand_device);
346}
347#else
348void __init at91_add_device_nand(struct at91_nand_data *data) {}
349#endif
350
351
352
353
354
355
356
357
358
359
360
361
362#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
363
364static struct i2c_gpio_platform_data pdata = {
365 .sda_pin = AT91_PIN_PA23,
366 .sda_is_open_drain = 1,
367 .scl_pin = AT91_PIN_PA24,
368 .scl_is_open_drain = 1,
369 .udelay = 2,
370};
371
372static struct platform_device at91sam9260_twi_device = {
373 .name = "i2c-gpio",
374 .id = -1,
375 .dev.platform_data = &pdata,
376};
377
378void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
379{
380 at91_set_GPIO_periph(AT91_PIN_PA23, 1);
381 at91_set_multi_drive(AT91_PIN_PA23, 1);
382
383 at91_set_GPIO_periph(AT91_PIN_PA24, 1);
384 at91_set_multi_drive(AT91_PIN_PA24, 1);
385
386 i2c_register_board_info(0, devices, nr_devices);
387 platform_device_register(&at91sam9260_twi_device);
388}
389
390#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
391
392static struct resource twi_resources[] = {
393 [0] = {
394 .start = AT91SAM9260_BASE_TWI,
395 .end = AT91SAM9260_BASE_TWI + SZ_16K - 1,
396 .flags = IORESOURCE_MEM,
397 },
398 [1] = {
399 .start = AT91SAM9260_ID_TWI,
400 .end = AT91SAM9260_ID_TWI,
401 .flags = IORESOURCE_IRQ,
402 },
403};
404
405static struct platform_device at91sam9260_twi_device = {
406 .name = "at91_i2c",
407 .id = -1,
408 .resource = twi_resources,
409 .num_resources = ARRAY_SIZE(twi_resources),
410};
411
412void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
413{
414
415 at91_set_A_periph(AT91_PIN_PA23, 0);
416 at91_set_multi_drive(AT91_PIN_PA23, 1);
417
418 at91_set_A_periph(AT91_PIN_PA24, 0);
419 at91_set_multi_drive(AT91_PIN_PA24, 1);
420
421 i2c_register_board_info(0, devices, nr_devices);
422 platform_device_register(&at91sam9260_twi_device);
423}
424#else
425void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
426#endif
427
428
429
430
431
432
433#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
434static u64 spi_dmamask = 0xffffffffUL;
435
436static struct resource spi0_resources[] = {
437 [0] = {
438 .start = AT91SAM9260_BASE_SPI0,
439 .end = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
440 .flags = IORESOURCE_MEM,
441 },
442 [1] = {
443 .start = AT91SAM9260_ID_SPI0,
444 .end = AT91SAM9260_ID_SPI0,
445 .flags = IORESOURCE_IRQ,
446 },
447};
448
449static struct platform_device at91sam9260_spi0_device = {
450 .name = "atmel_spi",
451 .id = 0,
452 .dev = {
453 .dma_mask = &spi_dmamask,
454 .coherent_dma_mask = 0xffffffff,
455 },
456 .resource = spi0_resources,
457 .num_resources = ARRAY_SIZE(spi0_resources),
458};
459
460static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
461
462static struct resource spi1_resources[] = {
463 [0] = {
464 .start = AT91SAM9260_BASE_SPI1,
465 .end = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
466 .flags = IORESOURCE_MEM,
467 },
468 [1] = {
469 .start = AT91SAM9260_ID_SPI1,
470 .end = AT91SAM9260_ID_SPI1,
471 .flags = IORESOURCE_IRQ,
472 },
473};
474
475static struct platform_device at91sam9260_spi1_device = {
476 .name = "atmel_spi",
477 .id = 1,
478 .dev = {
479 .dma_mask = &spi_dmamask,
480 .coherent_dma_mask = 0xffffffff,
481 },
482 .resource = spi1_resources,
483 .num_resources = ARRAY_SIZE(spi1_resources),
484};
485
486static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
487
488void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
489{
490 int i;
491 unsigned long cs_pin;
492 short enable_spi0 = 0;
493 short enable_spi1 = 0;
494
495
496 for (i = 0; i < nr_devices; i++) {
497 if (devices[i].controller_data)
498 cs_pin = (unsigned long) devices[i].controller_data;
499 else if (devices[i].bus_num == 0)
500 cs_pin = spi0_standard_cs[devices[i].chip_select];
501 else
502 cs_pin = spi1_standard_cs[devices[i].chip_select];
503
504 if (devices[i].bus_num == 0)
505 enable_spi0 = 1;
506 else
507 enable_spi1 = 1;
508
509
510 at91_set_gpio_output(cs_pin, 1);
511
512
513 devices[i].controller_data = (void *) cs_pin;
514 }
515
516 spi_register_board_info(devices, nr_devices);
517
518
519 if (enable_spi0) {
520 at91_set_A_periph(AT91_PIN_PA0, 0);
521 at91_set_A_periph(AT91_PIN_PA1, 0);
522 at91_set_A_periph(AT91_PIN_PA2, 0);
523
524 at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk");
525 platform_device_register(&at91sam9260_spi0_device);
526 }
527 if (enable_spi1) {
528 at91_set_A_periph(AT91_PIN_PB0, 0);
529 at91_set_A_periph(AT91_PIN_PB1, 0);
530 at91_set_A_periph(AT91_PIN_PB2, 0);
531
532 at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk");
533 platform_device_register(&at91sam9260_spi1_device);
534 }
535}
536#else
537void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
538#endif
539
540
541
542
543
544
545#if defined(CONFIG_LEDS)
546u8 at91_leds_cpu;
547u8 at91_leds_timer;
548
549void __init at91_init_leds(u8 cpu_led, u8 timer_led)
550{
551
552 at91_set_gpio_output(cpu_led, 1);
553 at91_set_gpio_output(timer_led, 1);
554
555 at91_leds_cpu = cpu_led;
556 at91_leds_timer = timer_led;
557}
558#else
559void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
560#endif
561
562
563
564
565
566#if defined(CONFIG_SERIAL_ATMEL)
567static struct resource dbgu_resources[] = {
568 [0] = {
569 .start = AT91_VA_BASE_SYS + AT91_DBGU,
570 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
571 .flags = IORESOURCE_MEM,
572 },
573 [1] = {
574 .start = AT91_ID_SYS,
575 .end = AT91_ID_SYS,
576 .flags = IORESOURCE_IRQ,
577 },
578};
579
580static struct atmel_uart_data dbgu_data = {
581 .use_dma_tx = 0,
582 .use_dma_rx = 0,
583 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
584};
585
586static struct platform_device at91sam9260_dbgu_device = {
587 .name = "atmel_usart",
588 .id = 0,
589 .dev = {
590 .platform_data = &dbgu_data,
591 .coherent_dma_mask = 0xffffffff,
592 },
593 .resource = dbgu_resources,
594 .num_resources = ARRAY_SIZE(dbgu_resources),
595};
596
597static inline void configure_dbgu_pins(void)
598{
599 at91_set_A_periph(AT91_PIN_PB14, 0);
600 at91_set_A_periph(AT91_PIN_PB15, 1);
601}
602
603static struct resource uart0_resources[] = {
604 [0] = {
605 .start = AT91SAM9260_BASE_US0,
606 .end = AT91SAM9260_BASE_US0 + SZ_16K - 1,
607 .flags = IORESOURCE_MEM,
608 },
609 [1] = {
610 .start = AT91SAM9260_ID_US0,
611 .end = AT91SAM9260_ID_US0,
612 .flags = IORESOURCE_IRQ,
613 },
614};
615
616static struct atmel_uart_data uart0_data = {
617 .use_dma_tx = 1,
618 .use_dma_rx = 1,
619};
620
621static struct platform_device at91sam9260_uart0_device = {
622 .name = "atmel_usart",
623 .id = 1,
624 .dev = {
625 .platform_data = &uart0_data,
626 .coherent_dma_mask = 0xffffffff,
627 },
628 .resource = uart0_resources,
629 .num_resources = ARRAY_SIZE(uart0_resources),
630};
631
632static inline void configure_usart0_pins(void)
633{
634 at91_set_A_periph(AT91_PIN_PB4, 1);
635 at91_set_A_periph(AT91_PIN_PB5, 0);
636 at91_set_A_periph(AT91_PIN_PB26, 0);
637 at91_set_A_periph(AT91_PIN_PB27, 0);
638 at91_set_A_periph(AT91_PIN_PB24, 0);
639 at91_set_A_periph(AT91_PIN_PB22, 0);
640 at91_set_A_periph(AT91_PIN_PB23, 0);
641 at91_set_A_periph(AT91_PIN_PB25, 0);
642}
643
644static struct resource uart1_resources[] = {
645 [0] = {
646 .start = AT91SAM9260_BASE_US1,
647 .end = AT91SAM9260_BASE_US1 + SZ_16K - 1,
648 .flags = IORESOURCE_MEM,
649 },
650 [1] = {
651 .start = AT91SAM9260_ID_US1,
652 .end = AT91SAM9260_ID_US1,
653 .flags = IORESOURCE_IRQ,
654 },
655};
656
657static struct atmel_uart_data uart1_data = {
658 .use_dma_tx = 1,
659 .use_dma_rx = 1,
660};
661
662static struct platform_device at91sam9260_uart1_device = {
663 .name = "atmel_usart",
664 .id = 2,
665 .dev = {
666 .platform_data = &uart1_data,
667 .coherent_dma_mask = 0xffffffff,
668 },
669 .resource = uart1_resources,
670 .num_resources = ARRAY_SIZE(uart1_resources),
671};
672
673static inline void configure_usart1_pins(void)
674{
675 at91_set_A_periph(AT91_PIN_PB6, 1);
676 at91_set_A_periph(AT91_PIN_PB7, 0);
677 at91_set_A_periph(AT91_PIN_PB28, 0);
678 at91_set_A_periph(AT91_PIN_PB29, 0);
679}
680
681static struct resource uart2_resources[] = {
682 [0] = {
683 .start = AT91SAM9260_BASE_US2,
684 .end = AT91SAM9260_BASE_US2 + SZ_16K - 1,
685 .flags = IORESOURCE_MEM,
686 },
687 [1] = {
688 .start = AT91SAM9260_ID_US2,
689 .end = AT91SAM9260_ID_US2,
690 .flags = IORESOURCE_IRQ,
691 },
692};
693
694static struct atmel_uart_data uart2_data = {
695 .use_dma_tx = 1,
696 .use_dma_rx = 1,
697};
698
699static struct platform_device at91sam9260_uart2_device = {
700 .name = "atmel_usart",
701 .id = 3,
702 .dev = {
703 .platform_data = &uart2_data,
704 .coherent_dma_mask = 0xffffffff,
705 },
706 .resource = uart2_resources,
707 .num_resources = ARRAY_SIZE(uart2_resources),
708};
709
710static inline void configure_usart2_pins(void)
711{
712 at91_set_A_periph(AT91_PIN_PB8, 1);
713 at91_set_A_periph(AT91_PIN_PB9, 0);
714}
715
716static struct resource uart3_resources[] = {
717 [0] = {
718 .start = AT91SAM9260_BASE_US3,
719 .end = AT91SAM9260_BASE_US3 + SZ_16K - 1,
720 .flags = IORESOURCE_MEM,
721 },
722 [1] = {
723 .start = AT91SAM9260_ID_US3,
724 .end = AT91SAM9260_ID_US3,
725 .flags = IORESOURCE_IRQ,
726 },
727};
728
729static struct atmel_uart_data uart3_data = {
730 .use_dma_tx = 1,
731 .use_dma_rx = 1,
732};
733
734static struct platform_device at91sam9260_uart3_device = {
735 .name = "atmel_usart",
736 .id = 4,
737 .dev = {
738 .platform_data = &uart3_data,
739 .coherent_dma_mask = 0xffffffff,
740 },
741 .resource = uart3_resources,
742 .num_resources = ARRAY_SIZE(uart3_resources),
743};
744
745static inline void configure_usart3_pins(void)
746{
747 at91_set_A_periph(AT91_PIN_PB10, 1);
748 at91_set_A_periph(AT91_PIN_PB11, 0);
749}
750
751static struct resource uart4_resources[] = {
752 [0] = {
753 .start = AT91SAM9260_BASE_US4,
754 .end = AT91SAM9260_BASE_US4 + SZ_16K - 1,
755 .flags = IORESOURCE_MEM,
756 },
757 [1] = {
758 .start = AT91SAM9260_ID_US4,
759 .end = AT91SAM9260_ID_US4,
760 .flags = IORESOURCE_IRQ,
761 },
762};
763
764static struct atmel_uart_data uart4_data = {
765 .use_dma_tx = 1,
766 .use_dma_rx = 1,
767};
768
769static struct platform_device at91sam9260_uart4_device = {
770 .name = "atmel_usart",
771 .id = 5,
772 .dev = {
773 .platform_data = &uart4_data,
774 .coherent_dma_mask = 0xffffffff,
775 },
776 .resource = uart4_resources,
777 .num_resources = ARRAY_SIZE(uart4_resources),
778};
779
780static inline void configure_usart4_pins(void)
781{
782 at91_set_B_periph(AT91_PIN_PA31, 1);
783 at91_set_B_periph(AT91_PIN_PA30, 0);
784}
785
786static struct resource uart5_resources[] = {
787 [0] = {
788 .start = AT91SAM9260_BASE_US5,
789 .end = AT91SAM9260_BASE_US5 + SZ_16K - 1,
790 .flags = IORESOURCE_MEM,
791 },
792 [1] = {
793 .start = AT91SAM9260_ID_US5,
794 .end = AT91SAM9260_ID_US5,
795 .flags = IORESOURCE_IRQ,
796 },
797};
798
799static struct atmel_uart_data uart5_data = {
800 .use_dma_tx = 1,
801 .use_dma_rx = 1,
802};
803
804static struct platform_device at91sam9260_uart5_device = {
805 .name = "atmel_usart",
806 .id = 6,
807 .dev = {
808 .platform_data = &uart5_data,
809 .coherent_dma_mask = 0xffffffff,
810 },
811 .resource = uart5_resources,
812 .num_resources = ARRAY_SIZE(uart5_resources),
813};
814
815static inline void configure_usart5_pins(void)
816{
817 at91_set_A_periph(AT91_PIN_PB12, 1);
818 at91_set_A_periph(AT91_PIN_PB13, 0);
819}
820
821struct platform_device *at91_uarts[ATMEL_MAX_UART];
822struct platform_device *atmel_default_console_device;
823
824void __init at91_init_serial(struct at91_uart_config *config)
825{
826 int i;
827
828
829 for (i = 0; i < config->nr_tty; i++) {
830 switch (config->tty_map[i]) {
831 case 0:
832 configure_usart0_pins();
833 at91_uarts[i] = &at91sam9260_uart0_device;
834 at91_clock_associate("usart0_clk", &at91sam9260_uart0_device.dev, "usart");
835 break;
836 case 1:
837 configure_usart1_pins();
838 at91_uarts[i] = &at91sam9260_uart1_device;
839 at91_clock_associate("usart1_clk", &at91sam9260_uart1_device.dev, "usart");
840 break;
841 case 2:
842 configure_usart2_pins();
843 at91_uarts[i] = &at91sam9260_uart2_device;
844 at91_clock_associate("usart2_clk", &at91sam9260_uart2_device.dev, "usart");
845 break;
846 case 3:
847 configure_usart3_pins();
848 at91_uarts[i] = &at91sam9260_uart3_device;
849 at91_clock_associate("usart3_clk", &at91sam9260_uart3_device.dev, "usart");
850 break;
851 case 4:
852 configure_usart4_pins();
853 at91_uarts[i] = &at91sam9260_uart4_device;
854 at91_clock_associate("usart4_clk", &at91sam9260_uart4_device.dev, "usart");
855 break;
856 case 5:
857 configure_usart5_pins();
858 at91_uarts[i] = &at91sam9260_uart5_device;
859 at91_clock_associate("usart5_clk", &at91sam9260_uart5_device.dev, "usart");
860 break;
861 case 6:
862 configure_dbgu_pins();
863 at91_uarts[i] = &at91sam9260_dbgu_device;
864 at91_clock_associate("mck", &at91sam9260_dbgu_device.dev, "usart");
865 break;
866 default:
867 continue;
868 }
869 at91_uarts[i]->id = i;
870 }
871
872
873 if (config->console_tty < ATMEL_MAX_UART)
874 atmel_default_console_device = at91_uarts[config->console_tty];
875 if (!atmel_default_console_device)
876 printk(KERN_INFO "AT91: No default serial console defined.\n");
877}
878
879void __init at91_add_device_serial(void)
880{
881 int i;
882
883 for (i = 0; i < ATMEL_MAX_UART; i++) {
884 if (at91_uarts[i])
885 platform_device_register(at91_uarts[i]);
886 }
887}
888#else
889void __init at91_init_serial(struct at91_uart_config *config) {}
890void __init at91_add_device_serial(void) {}
891#endif
892
893
894
895
896
897
898
899static int __init at91_add_standard_devices(void)
900{
901 return 0;
902}
903
904arch_initcall(at91_add_standard_devices);
905
