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64#include <linux/types.h>
65#include <linux/init.h>
66#include <linux/sched.h>
67#include <linux/interrupt.h>
68#include <linux/irq.h>
69#include <linux/bootmem.h>
70#include <linux/acpi.h>
71#include <linux/timer.h>
72#include <linux/module.h>
73#include <linux/kernel.h>
74#include <linux/smp.h>
75#include <linux/workqueue.h>
76#include <linux/cpumask.h>
77#include <linux/kdebug.h>
78#include <linux/cpu.h>
79
80#include <asm/delay.h>
81#include <asm/machvec.h>
82#include <asm/meminit.h>
83#include <asm/page.h>
84#include <asm/ptrace.h>
85#include <asm/system.h>
86#include <asm/sal.h>
87#include <asm/mca.h>
88#include <asm/kexec.h>
89
90#include <asm/irq.h>
91#include <asm/hw_irq.h>
92
93#include "mca_drv.h"
94#include "entry.h"
95
96#if defined(IA64_MCA_DEBUG_INFO)
97# define IA64_MCA_DEBUG(fmt...) printk(fmt)
98#else
99# define IA64_MCA_DEBUG(fmt...)
100#endif
101
102
103DEFINE_PER_CPU(u64, ia64_mca_data);
104DEFINE_PER_CPU(u64, ia64_mca_per_cpu_pte);
105DEFINE_PER_CPU(u64, ia64_mca_pal_pte);
106DEFINE_PER_CPU(u64, ia64_mca_pal_base);
107
108unsigned long __per_cpu_mca[NR_CPUS];
109
110
111extern void ia64_os_init_dispatch_monarch (void);
112extern void ia64_os_init_dispatch_slave (void);
113
114static int monarch_cpu = -1;
115
116static ia64_mc_info_t ia64_mc_info;
117
118#define MAX_CPE_POLL_INTERVAL (15*60*HZ)
119#define MIN_CPE_POLL_INTERVAL (2*60*HZ)
120#define CMC_POLL_INTERVAL (1*60*HZ)
121#define CPE_HISTORY_LENGTH 5
122#define CMC_HISTORY_LENGTH 5
123
124#ifdef CONFIG_ACPI
125static struct timer_list cpe_poll_timer;
126#endif
127static struct timer_list cmc_poll_timer;
128
129
130
131
132
133static int cmc_polling_enabled = 1;
134
135
136
137
138
139
140
141static int cpe_poll_enabled = 1;
142
143extern void salinfo_log_wakeup(int type, u8 *buffer, u64 size, int irqsafe);
144
145static int mca_init __initdata;
146
147
148
149
150
151#define mprintk(fmt...) ia64_mca_printk(fmt)
152
153#define MLOGBUF_SIZE (512+256*NR_CPUS)
154#define MLOGBUF_MSGMAX 256
155static char mlogbuf[MLOGBUF_SIZE];
156static DEFINE_SPINLOCK(mlogbuf_wlock);
157static DEFINE_SPINLOCK(mlogbuf_rlock);
158static unsigned long mlogbuf_start;
159static unsigned long mlogbuf_end;
160static unsigned int mlogbuf_finished = 0;
161static unsigned long mlogbuf_timestamp = 0;
162
163static int loglevel_save = -1;
164#define BREAK_LOGLEVEL(__console_loglevel) \
165 oops_in_progress = 1; \
166 if (loglevel_save < 0) \
167 loglevel_save = __console_loglevel; \
168 __console_loglevel = 15;
169
170#define RESTORE_LOGLEVEL(__console_loglevel) \
171 if (loglevel_save >= 0) { \
172 __console_loglevel = loglevel_save; \
173 loglevel_save = -1; \
174 } \
175 mlogbuf_finished = 0; \
176 oops_in_progress = 0;
177
178
179
180
181void ia64_mca_printk(const char *fmt, ...)
182{
183 va_list args;
184 int printed_len;
185 char temp_buf[MLOGBUF_MSGMAX];
186 char *p;
187
188 va_start(args, fmt);
189 printed_len = vscnprintf(temp_buf, sizeof(temp_buf), fmt, args);
190 va_end(args);
191
192
193 if (oops_in_progress) {
194
195 printk(temp_buf);
196 } else {
197 spin_lock(&mlogbuf_wlock);
198 for (p = temp_buf; *p; p++) {
199 unsigned long next = (mlogbuf_end + 1) % MLOGBUF_SIZE;
200 if (next != mlogbuf_start) {
201 mlogbuf[mlogbuf_end] = *p;
202 mlogbuf_end = next;
203 } else {
204
205 break;
206 }
207 }
208 mlogbuf[mlogbuf_end] = '\0';
209 spin_unlock(&mlogbuf_wlock);
210 }
211}
212EXPORT_SYMBOL(ia64_mca_printk);
213
214
215
216
217
218void ia64_mlogbuf_dump(void)
219{
220 char temp_buf[MLOGBUF_MSGMAX];
221 char *p;
222 unsigned long index;
223 unsigned long flags;
224 unsigned int printed_len;
225
226
227 while (mlogbuf_start != mlogbuf_end) {
228 temp_buf[0] = '\0';
229 p = temp_buf;
230 printed_len = 0;
231
232 spin_lock_irqsave(&mlogbuf_rlock, flags);
233
234 index = mlogbuf_start;
235 while (index != mlogbuf_end) {
236 *p = mlogbuf[index];
237 index = (index + 1) % MLOGBUF_SIZE;
238 if (!*p)
239 break;
240 p++;
241 if (++printed_len >= MLOGBUF_MSGMAX - 1)
242 break;
243 }
244 *p = '\0';
245 if (temp_buf[0])
246 printk(temp_buf);
247 mlogbuf_start = index;
248
249 mlogbuf_timestamp = 0;
250 spin_unlock_irqrestore(&mlogbuf_rlock, flags);
251 }
252}
253EXPORT_SYMBOL(ia64_mlogbuf_dump);
254
255
256
257
258
259
260
261static void ia64_mlogbuf_finish(int wait)
262{
263 BREAK_LOGLEVEL(console_loglevel);
264
265 spin_lock_init(&mlogbuf_rlock);
266 ia64_mlogbuf_dump();
267 printk(KERN_EMERG "mlogbuf_finish: printing switched to urgent mode, "
268 "MCA/INIT might be dodgy or fail.\n");
269
270 if (!wait)
271 return;
272
273
274 printk("Delaying for 5 seconds...\n");
275 udelay(5*1000000);
276
277 mlogbuf_finished = 1;
278}
279
280
281
282
283static void ia64_mlogbuf_dump_from_init(void)
284{
285 if (mlogbuf_finished)
286 return;
287
288 if (mlogbuf_timestamp && (mlogbuf_timestamp + 30*HZ > jiffies)) {
289 printk(KERN_ERR "INIT: mlogbuf_dump is interrupted by INIT "
290 " and the system seems to be messed up.\n");
291 ia64_mlogbuf_finish(0);
292 return;
293 }
294
295 if (!spin_trylock(&mlogbuf_rlock)) {
296 printk(KERN_ERR "INIT: mlogbuf_dump is interrupted by INIT. "
297 "Generated messages other than stack dump will be "
298 "buffered to mlogbuf and will be printed later.\n");
299 printk(KERN_ERR "INIT: If messages would not printed after "
300 "this INIT, wait 30sec and assert INIT again.\n");
301 if (!mlogbuf_timestamp)
302 mlogbuf_timestamp = jiffies;
303 return;
304 }
305 spin_unlock(&mlogbuf_rlock);
306 ia64_mlogbuf_dump();
307}
308
309static void inline
310ia64_mca_spin(const char *func)
311{
312 if (monarch_cpu == smp_processor_id())
313 ia64_mlogbuf_finish(0);
314 mprintk(KERN_EMERG "%s: spinning here, not returning to SAL\n", func);
315 while (1)
316 cpu_relax();
317}
318
319
320
321#define IA64_MAX_LOGS 2
322#define IA64_MAX_LOG_TYPES 4
323
324typedef struct ia64_state_log_s
325{
326 spinlock_t isl_lock;
327 int isl_index;
328 unsigned long isl_count;
329 ia64_err_rec_t *isl_log[IA64_MAX_LOGS];
330} ia64_state_log_t;
331
332static ia64_state_log_t ia64_state_log[IA64_MAX_LOG_TYPES];
333
334#define IA64_LOG_ALLOCATE(it, size) \
335 {ia64_state_log[it].isl_log[IA64_LOG_CURR_INDEX(it)] = \
336 (ia64_err_rec_t *)alloc_bootmem(size); \
337 ia64_state_log[it].isl_log[IA64_LOG_NEXT_INDEX(it)] = \
338 (ia64_err_rec_t *)alloc_bootmem(size);}
339#define IA64_LOG_LOCK_INIT(it) spin_lock_init(&ia64_state_log[it].isl_lock)
340#define IA64_LOG_LOCK(it) spin_lock_irqsave(&ia64_state_log[it].isl_lock, s)
341#define IA64_LOG_UNLOCK(it) spin_unlock_irqrestore(&ia64_state_log[it].isl_lock,s)
342#define IA64_LOG_NEXT_INDEX(it) ia64_state_log[it].isl_index
343#define IA64_LOG_CURR_INDEX(it) 1 - ia64_state_log[it].isl_index
344#define IA64_LOG_INDEX_INC(it) \
345 {ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index; \
346 ia64_state_log[it].isl_count++;}
347#define IA64_LOG_INDEX_DEC(it) \
348 ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index
349#define IA64_LOG_NEXT_BUFFER(it) (void *)((ia64_state_log[it].isl_log[IA64_LOG_NEXT_INDEX(it)]))
350#define IA64_LOG_CURR_BUFFER(it) (void *)((ia64_state_log[it].isl_log[IA64_LOG_CURR_INDEX(it)]))
351#define IA64_LOG_COUNT(it) ia64_state_log[it].isl_count
352
353
354
355
356
357
358
359static void __init
360ia64_log_init(int sal_info_type)
361{
362 u64 max_size = 0;
363
364 IA64_LOG_NEXT_INDEX(sal_info_type) = 0;
365 IA64_LOG_LOCK_INIT(sal_info_type);
366
367
368 max_size = ia64_sal_get_state_info_size(sal_info_type);
369 if (!max_size)
370
371 return;
372
373
374 IA64_LOG_ALLOCATE(sal_info_type, max_size);
375 memset(IA64_LOG_CURR_BUFFER(sal_info_type), 0, max_size);
376 memset(IA64_LOG_NEXT_BUFFER(sal_info_type), 0, max_size);
377}
378
379
380
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387
388
389
390static u64
391ia64_log_get(int sal_info_type, u8 **buffer, int irq_safe)
392{
393 sal_log_record_header_t *log_buffer;
394 u64 total_len = 0;
395 unsigned long s;
396
397 IA64_LOG_LOCK(sal_info_type);
398
399
400 log_buffer = IA64_LOG_NEXT_BUFFER(sal_info_type);
401
402 total_len = ia64_sal_get_state_info(sal_info_type, (u64 *)log_buffer);
403
404 if (total_len) {
405 IA64_LOG_INDEX_INC(sal_info_type);
406 IA64_LOG_UNLOCK(sal_info_type);
407 if (irq_safe) {
408 IA64_MCA_DEBUG("%s: SAL error record type %d retrieved. "
409 "Record length = %ld\n", __FUNCTION__, sal_info_type, total_len);
410 }
411 *buffer = (u8 *) log_buffer;
412 return total_len;
413 } else {
414 IA64_LOG_UNLOCK(sal_info_type);
415 return 0;
416 }
417}
418
419
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423
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425
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427
428static void
429ia64_mca_log_sal_error_record(int sal_info_type)
430{
431 u8 *buffer;
432 sal_log_record_header_t *rh;
433 u64 size;
434 int irq_safe = sal_info_type != SAL_INFO_TYPE_MCA;
435#ifdef IA64_MCA_DEBUG_INFO
436 static const char * const rec_name[] = { "MCA", "INIT", "CMC", "CPE" };
437#endif
438
439 size = ia64_log_get(sal_info_type, &buffer, irq_safe);
440 if (!size)
441 return;
442
443 salinfo_log_wakeup(sal_info_type, buffer, size, irq_safe);
444
445 if (irq_safe)
446 IA64_MCA_DEBUG("CPU %d: SAL log contains %s error record\n",
447 smp_processor_id(),
448 sal_info_type < ARRAY_SIZE(rec_name) ? rec_name[sal_info_type] : "UNKNOWN");
449
450
451 rh = (sal_log_record_header_t *)buffer;
452 if (rh->severity == sal_log_severity_corrected)
453 ia64_sal_clear_state_info(sal_info_type);
454}
455
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465
466
467
468
469int
470search_mca_table (const struct mca_table_entry *first,
471 const struct mca_table_entry *last,
472 unsigned long ip)
473{
474 const struct mca_table_entry *curr;
475 u64 curr_start, curr_end;
476
477 curr = first;
478 while (curr <= last) {
479 curr_start = (u64) &curr->start_addr + curr->start_addr;
480 curr_end = (u64) &curr->end_addr + curr->end_addr;
481
482 if ((ip >= curr_start) && (ip <= curr_end)) {
483 return 1;
484 }
485 curr++;
486 }
487 return 0;
488}
489
490
491int mca_recover_range(unsigned long addr)
492{
493 extern struct mca_table_entry __start___mca_table[];
494 extern struct mca_table_entry __stop___mca_table[];
495
496 return search_mca_table(__start___mca_table, __stop___mca_table-1, addr);
497}
498EXPORT_SYMBOL_GPL(mca_recover_range);
499
500#ifdef CONFIG_ACPI
501
502int cpe_vector = -1;
503int ia64_cpe_irq = -1;
504
505static irqreturn_t
506ia64_mca_cpe_int_handler (int cpe_irq, void *arg)
507{
508 static unsigned long cpe_history[CPE_HISTORY_LENGTH];
509 static int index;
510 static DEFINE_SPINLOCK(cpe_history_lock);
511
512 IA64_MCA_DEBUG("%s: received interrupt vector = %#x on CPU %d\n",
513 __FUNCTION__, cpe_irq, smp_processor_id());
514
515
516 local_irq_enable();
517
518 spin_lock(&cpe_history_lock);
519 if (!cpe_poll_enabled && cpe_vector >= 0) {
520
521 int i, count = 1;
522 unsigned long now = jiffies;
523
524 for (i = 0; i < CPE_HISTORY_LENGTH; i++) {
525 if (now - cpe_history[i] <= HZ)
526 count++;
527 }
528
529 IA64_MCA_DEBUG(KERN_INFO "CPE threshold %d/%d\n", count, CPE_HISTORY_LENGTH);
530 if (count >= CPE_HISTORY_LENGTH) {
531
532 cpe_poll_enabled = 1;
533 spin_unlock(&cpe_history_lock);
534 disable_irq_nosync(local_vector_to_irq(IA64_CPE_VECTOR));
535
536
537
538
539
540
541 printk(KERN_WARNING "WARNING: Switching to polling CPE handler; error records may be lost\n");
542
543 mod_timer(&cpe_poll_timer, jiffies + MIN_CPE_POLL_INTERVAL);
544
545
546 goto out;
547 } else {
548 cpe_history[index++] = now;
549 if (index == CPE_HISTORY_LENGTH)
550 index = 0;
551 }
552 }
553 spin_unlock(&cpe_history_lock);
554out:
555
556 ia64_mca_log_sal_error_record(SAL_INFO_TYPE_CPE);
557
558 return IRQ_HANDLED;
559}
560
561#endif
562
563#ifdef CONFIG_ACPI
564
565
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573
574
575void
576ia64_mca_register_cpev (int cpev)
577{
578
579 struct ia64_sal_retval isrv;
580
581 isrv = ia64_sal_mc_set_params(SAL_MC_PARAM_CPE_INT, SAL_MC_PARAM_MECHANISM_INT, cpev, 0, 0);
582 if (isrv.status) {
583 printk(KERN_ERR "Failed to register Corrected Platform "
584 "Error interrupt vector with SAL (status %ld)\n", isrv.status);
585 return;
586 }
587
588 IA64_MCA_DEBUG("%s: corrected platform error "
589 "vector %#x registered\n", __FUNCTION__, cpev);
590}
591#endif
592
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604
605
606void __cpuinit
607ia64_mca_cmc_vector_setup (void)
608{
609 cmcv_reg_t cmcv;
610
611 cmcv.cmcv_regval = 0;
612 cmcv.cmcv_mask = 1;
613 cmcv.cmcv_vector = IA64_CMC_VECTOR;
614 ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
615
616 IA64_MCA_DEBUG("%s: CPU %d corrected "
617 "machine check vector %#x registered.\n",
618 __FUNCTION__, smp_processor_id(), IA64_CMC_VECTOR);
619
620 IA64_MCA_DEBUG("%s: CPU %d CMCV = %#016lx\n",
621 __FUNCTION__, smp_processor_id(), ia64_getreg(_IA64_REG_CR_CMCV));
622}
623
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631
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633
634
635
636static void
637ia64_mca_cmc_vector_disable (void *dummy)
638{
639 cmcv_reg_t cmcv;
640
641 cmcv.cmcv_regval = ia64_getreg(_IA64_REG_CR_CMCV);
642
643 cmcv.cmcv_mask = 1;
644 ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
645
646 IA64_MCA_DEBUG("%s: CPU %d corrected "
647 "machine check vector %#x disabled.\n",
648 __FUNCTION__, smp_processor_id(), cmcv.cmcv_vector);
649}
650
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661
662
663static void
664ia64_mca_cmc_vector_enable (void *dummy)
665{
666 cmcv_reg_t cmcv;
667
668 cmcv.cmcv_regval = ia64_getreg(_IA64_REG_CR_CMCV);
669
670 cmcv.cmcv_mask = 0;
671 ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
672
673 IA64_MCA_DEBUG("%s: CPU %d corrected "
674 "machine check vector %#x enabled.\n",
675 __FUNCTION__, smp_processor_id(), cmcv.cmcv_vector);
676}
677
678
679
680
681
682
683
684static void
685ia64_mca_cmc_vector_disable_keventd(struct work_struct *unused)
686{
687 on_each_cpu(ia64_mca_cmc_vector_disable, NULL, 1, 0);
688}
689
690
691
692
693
694
695
696static void
697ia64_mca_cmc_vector_enable_keventd(struct work_struct *unused)
698{
699 on_each_cpu(ia64_mca_cmc_vector_enable, NULL, 1, 0);
700}
701
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705
706
707
708
709
710static void
711ia64_mca_wakeup(int cpu)
712{
713 platform_send_ipi(cpu, IA64_MCA_WAKEUP_VECTOR, IA64_IPI_DM_INT, 0);
714}
715
716
717
718
719
720
721
722
723
724static void
725ia64_mca_wakeup_all(void)
726{
727 int cpu;
728
729
730 for_each_online_cpu(cpu) {
731 if (ia64_mc_info.imi_rendez_checkin[cpu] == IA64_MCA_RENDEZ_CHECKIN_DONE)
732 ia64_mca_wakeup(cpu);
733 }
734
735}
736
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739
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746
747
748
749
750static irqreturn_t
751ia64_mca_rendez_int_handler(int rendez_irq, void *arg)
752{
753 unsigned long flags;
754 int cpu = smp_processor_id();
755 struct ia64_mca_notify_die nd =
756 { .sos = NULL, .monarch_cpu = &monarch_cpu };
757
758
759 local_irq_save(flags);
760 if (notify_die(DIE_MCA_RENDZVOUS_ENTER, "MCA", get_irq_regs(),
761 (long)&nd, 0, 0) == NOTIFY_STOP)
762 ia64_mca_spin(__FUNCTION__);
763
764 ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_DONE;
765
766
767
768 ia64_sal_mc_rendez();
769
770 if (notify_die(DIE_MCA_RENDZVOUS_PROCESS, "MCA", get_irq_regs(),
771 (long)&nd, 0, 0) == NOTIFY_STOP)
772 ia64_mca_spin(__FUNCTION__);
773
774
775 while (monarch_cpu != -1)
776 cpu_relax();
777
778 if (notify_die(DIE_MCA_RENDZVOUS_LEAVE, "MCA", get_irq_regs(),
779 (long)&nd, 0, 0) == NOTIFY_STOP)
780 ia64_mca_spin(__FUNCTION__);
781
782 ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
783
784 local_irq_restore(flags);
785 return IRQ_HANDLED;
786}
787
788
789
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795
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799
800
801
802static irqreturn_t
803ia64_mca_wakeup_int_handler(int wakeup_irq, void *arg)
804{
805 return IRQ_HANDLED;
806}
807
808
809int (*ia64_mca_ucmc_extension)
810 (void*,struct ia64_sal_os_state*)
811 = NULL;
812
813int
814ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *))
815{
816 if (ia64_mca_ucmc_extension)
817 return 1;
818
819 ia64_mca_ucmc_extension = fn;
820 return 0;
821}
822
823void
824ia64_unreg_MCA_extension(void)
825{
826 if (ia64_mca_ucmc_extension)
827 ia64_mca_ucmc_extension = NULL;
828}
829
830EXPORT_SYMBOL(ia64_reg_MCA_extension);
831EXPORT_SYMBOL(ia64_unreg_MCA_extension);
832
833
834static inline void
835copy_reg(const u64 *fr, u64 fnat, u64 *tr, u64 *tnat)
836{
837 u64 fslot, tslot, nat;
838 *tr = *fr;
839 fslot = ((unsigned long)fr >> 3) & 63;
840 tslot = ((unsigned long)tr >> 3) & 63;
841 *tnat &= ~(1UL << tslot);
842 nat = (fnat >> fslot) & 1;
843 *tnat |= (nat << tslot);
844}
845
846
847
848
849
850
851
852static void
853ia64_mca_modify_comm(const struct task_struct *previous_current)
854{
855 char *p, comm[sizeof(current->comm)];
856 if (previous_current->pid)
857 snprintf(comm, sizeof(comm), "%s %d",
858 current->comm, previous_current->pid);
859 else {
860 int l;
861 if ((p = strchr(previous_current->comm, ' ')))
862 l = p - previous_current->comm;
863 else
864 l = strlen(previous_current->comm);
865 snprintf(comm, sizeof(comm), "%s %*s %d",
866 current->comm, l, previous_current->comm,
867 task_thread_info(previous_current)->cpu);
868 }
869 memcpy(current->comm, comm, sizeof(current->comm));
870}
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881
882
883
884static struct task_struct *
885ia64_mca_modify_original_stack(struct pt_regs *regs,
886 const struct switch_stack *sw,
887 struct ia64_sal_os_state *sos,
888 const char *type)
889{
890 char *p;
891 ia64_va va;
892 extern char ia64_leave_kernel[];
893 const pal_min_state_area_t *ms = sos->pal_min_state;
894 struct task_struct *previous_current;
895 struct pt_regs *old_regs;
896 struct switch_stack *old_sw;
897 unsigned size = sizeof(struct pt_regs) +
898 sizeof(struct switch_stack) + 16;
899 u64 *old_bspstore, *old_bsp;
900 u64 *new_bspstore, *new_bsp;
901 u64 old_unat, old_rnat, new_rnat, nat;
902 u64 slots, loadrs = regs->loadrs;
903 u64 r12 = ms->pmsa_gr[12-1], r13 = ms->pmsa_gr[13-1];
904 u64 ar_bspstore = regs->ar_bspstore;
905 u64 ar_bsp = regs->ar_bspstore + (loadrs >> 16);
906 const u64 *bank;
907 const char *msg;
908 int cpu = smp_processor_id();
909
910 previous_current = curr_task(cpu);
911 set_curr_task(cpu, current);
912 if ((p = strchr(current->comm, ' ')))
913 *p = '\0';
914
915
916
917
918 regs->cr_ipsr = ms->pmsa_ipsr;
919 if (ia64_psr(regs)->dt == 0) {
920 va.l = r12;
921 if (va.f.reg == 0) {
922 va.f.reg = 7;
923 r12 = va.l;
924 }
925 va.l = r13;
926 if (va.f.reg == 0) {
927 va.f.reg = 7;
928 r13 = va.l;
929 }
930 }
931 if (ia64_psr(regs)->rt == 0) {
932 va.l = ar_bspstore;
933 if (va.f.reg == 0) {
934 va.f.reg = 7;
935 ar_bspstore = va.l;
936 }
937 va.l = ar_bsp;
938 if (va.f.reg == 0) {
939 va.f.reg = 7;
940 ar_bsp = va.l;
941 }
942 }
943
944
945
946
947
948
949
950
951
952
953 old_bspstore = (u64 *)ar_bspstore;
954 old_bsp = (u64 *)ar_bsp;
955 slots = ia64_rse_num_regs(old_bspstore, old_bsp);
956 new_bspstore = (u64 *)((u64)current + IA64_RBS_OFFSET);
957 new_bsp = ia64_rse_skip_regs(new_bspstore, slots);
958 regs->loadrs = (new_bsp - new_bspstore) * 8 << 16;
959
960
961 if (user_mode(regs)) {
962 msg = "occurred in user space";
963
964
965
966 ia64_mca_modify_comm(previous_current);
967 goto no_mod;
968 }
969
970 if (r13 != sos->prev_IA64_KR_CURRENT) {
971 msg = "inconsistent previous current and r13";
972 goto no_mod;
973 }
974
975 if (!mca_recover_range(ms->pmsa_iip)) {
976 if ((r12 - r13) >= KERNEL_STACK_SIZE) {
977 msg = "inconsistent r12 and r13";
978 goto no_mod;
979 }
980 if ((ar_bspstore - r13) >= KERNEL_STACK_SIZE) {
981 msg = "inconsistent ar.bspstore and r13";
982 goto no_mod;
983 }
984 va.p = old_bspstore;
985 if (va.f.reg < 5) {
986 msg = "old_bspstore is in the wrong region";
987 goto no_mod;
988 }
989 if ((ar_bsp - r13) >= KERNEL_STACK_SIZE) {
990 msg = "inconsistent ar.bsp and r13";
991 goto no_mod;
992 }
993 size += (ia64_rse_skip_regs(old_bspstore, slots) - old_bspstore) * 8;
994 if (ar_bspstore + size > r12) {
995 msg = "no room for blocked state";
996 goto no_mod;
997 }
998 }
999
1000 ia64_mca_modify_comm(previous_current);
1001
1002
1003
1004
1005
1006 p = (char *)r12 - sizeof(*regs);
1007 old_regs = (struct pt_regs *)p;
1008 memcpy(old_regs, regs, sizeof(*regs));
1009
1010
1011
1012 if (ia64_psr(regs)->ic) {
1013 old_regs->cr_iip = ms->pmsa_iip;
1014 old_regs->cr_ipsr = ms->pmsa_ipsr;
1015 old_regs->cr_ifs = ms->pmsa_ifs;
1016 } else {
1017 old_regs->cr_iip = ms->pmsa_xip;
1018 old_regs->cr_ipsr = ms->pmsa_xpsr;
1019 old_regs->cr_ifs = ms->pmsa_xfs;
1020 }
1021 old_regs->pr = ms->pmsa_pr;
1022 old_regs->b0 = ms->pmsa_br0;
1023 old_regs->loadrs = loadrs;
1024 old_regs->ar_rsc = ms->pmsa_rsc;
1025 old_unat = old_regs->ar_unat;
1026 copy_reg(&ms->pmsa_gr[1-1], ms->pmsa_nat_bits, &old_regs->r1, &old_unat);
1027 copy_reg(&ms->pmsa_gr[2-1], ms->pmsa_nat_bits, &old_regs->r2, &old_unat);
1028 copy_reg(&ms->pmsa_gr[3-1], ms->pmsa_nat_bits, &old_regs->r3, &old_unat);
1029 copy_reg(&ms->pmsa_gr[8-1], ms->pmsa_nat_bits, &old_regs->r8, &old_unat);
1030 copy_reg(&ms->pmsa_gr[9-1], ms->pmsa_nat_bits, &old_regs->r9, &old_unat);
1031 copy_reg(&ms->pmsa_gr[10-1], ms->pmsa_nat_bits, &old_regs->r10, &old_unat);
1032 copy_reg(&ms->pmsa_gr[11-1], ms->pmsa_nat_bits, &old_regs->r11, &old_unat);
1033 copy_reg(&ms->pmsa_gr[12-1], ms->pmsa_nat_bits, &old_regs->r12, &old_unat);
1034 copy_reg(&ms->pmsa_gr[13-1], ms->pmsa_nat_bits, &old_regs->r13, &old_unat);
1035 copy_reg(&ms->pmsa_gr[14-1], ms->pmsa_nat_bits, &old_regs->r14, &old_unat);
1036 copy_reg(&ms->pmsa_gr[15-1], ms->pmsa_nat_bits, &old_regs->r15, &old_unat);
1037 if (ia64_psr(old_regs)->bn)
1038 bank = ms->pmsa_bank1_gr;
1039 else
1040 bank = ms->pmsa_bank0_gr;
1041 copy_reg(&bank[16-16], ms->pmsa_nat_bits, &old_regs->r16, &old_unat);
1042 copy_reg(&bank[17-16], ms->pmsa_nat_bits, &old_regs->r17, &old_unat);
1043 copy_reg(&bank[18-16], ms->pmsa_nat_bits, &old_regs->r18, &old_unat);
1044 copy_reg(&bank[19-16], ms->pmsa_nat_bits, &old_regs->r19, &old_unat);
1045 copy_reg(&bank[20-16], ms->pmsa_nat_bits, &old_regs->r20, &old_unat);
1046 copy_reg(&bank[21-16], ms->pmsa_nat_bits, &old_regs->r21, &old_unat);
1047 copy_reg(&bank[22-16], ms->pmsa_nat_bits, &old_regs->r22, &old_unat);
1048 copy_reg(&bank[23-16], ms->pmsa_nat_bits, &old_regs->r23, &old_unat);
1049 copy_reg(&bank[24-16], ms->pmsa_nat_bits, &old_regs->r24, &old_unat);
1050 copy_reg(&bank[25-16], ms->pmsa_nat_bits, &old_regs->r25, &old_unat);
1051 copy_reg(&bank[26-16], ms->pmsa_nat_bits, &old_regs->r26, &old_unat);
1052 copy_reg(&bank[27-16], ms->pmsa_nat_bits, &old_regs->r27, &old_unat);
1053 copy_reg(&bank[28-16], ms->pmsa_nat_bits, &old_regs->r28, &old_unat);
1054 copy_reg(&bank[29-16], ms->pmsa_nat_bits, &old_regs->r29, &old_unat);
1055 copy_reg(&bank[30-16], ms->pmsa_nat_bits, &old_regs->r30, &old_unat);
1056 copy_reg(&bank[31-16], ms->pmsa_nat_bits, &old_regs->r31, &old_unat);
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074 p -= sizeof(struct switch_stack);
1075 old_sw = (struct switch_stack *)p;
1076 memcpy(old_sw, sw, sizeof(*sw));
1077 old_sw->caller_unat = old_unat;
1078 old_sw->ar_fpsr = old_regs->ar_fpsr;
1079 copy_reg(&ms->pmsa_gr[4-1], ms->pmsa_nat_bits, &old_sw->r4, &old_unat);
1080 copy_reg(&ms->pmsa_gr[5-1], ms->pmsa_nat_bits, &old_sw->r5, &old_unat);
1081 copy_reg(&ms->pmsa_gr[6-1], ms->pmsa_nat_bits, &old_sw->r6, &old_unat);
1082 copy_reg(&ms->pmsa_gr[7-1], ms->pmsa_nat_bits, &old_sw->r7, &old_unat);
1083 old_sw->b0 = (u64)ia64_leave_kernel;
1084 old_sw->b1 = ms->pmsa_br1;
1085 old_sw->ar_pfs = 0;
1086 old_sw->ar_unat = old_unat;
1087 old_sw->pr = old_regs->pr | (1UL << PRED_NON_SYSCALL);
1088 previous_current->thread.ksp = (u64)p - 16;
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102 new_rnat = ia64_get_rnat(ia64_rse_rnat_addr(new_bspstore));
1103 old_rnat = regs->ar_rnat;
1104 while (slots--) {
1105 if (ia64_rse_is_rnat_slot(new_bspstore)) {
1106 new_rnat = ia64_get_rnat(new_bspstore++);
1107 }
1108 if (ia64_rse_is_rnat_slot(old_bspstore)) {
1109 *old_bspstore++ = old_rnat;
1110 old_rnat = 0;
1111 }
1112 nat = (new_rnat >> ia64_rse_slot_num(new_bspstore)) & 1UL;
1113 old_rnat &= ~(1UL << ia64_rse_slot_num(old_bspstore));
1114 old_rnat |= (nat << ia64_rse_slot_num(old_bspstore));
1115 *old_bspstore++ = *new_bspstore++;
1116 }
1117 old_sw->ar_bspstore = (unsigned long)old_bspstore;
1118 old_sw->ar_rnat = old_rnat;
1119
1120 sos->prev_task = previous_current;
1121 return previous_current;
1122
1123no_mod:
1124 printk(KERN_INFO "cpu %d, %s %s, original stack not modified\n",
1125 smp_processor_id(), type, msg);
1126 return previous_current;
1127}
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137static void
1138ia64_wait_for_slaves(int monarch, const char *type)
1139{
1140 int c, i , wait;
1141
1142
1143
1144
1145 for (i = 0; i < 5000; i++) {
1146 wait = 0;
1147 for_each_online_cpu(c) {
1148 if (c == monarch)
1149 continue;
1150 if (ia64_mc_info.imi_rendez_checkin[c]
1151 == IA64_MCA_RENDEZ_CHECKIN_NOTDONE) {
1152 udelay(1000);
1153 wait = 1;
1154 break;
1155 }
1156 }
1157 if (!wait)
1158 goto all_in;
1159 }
1160
1161
1162
1163
1164 ia64_mlogbuf_finish(0);
1165 mprintk(KERN_INFO "OS %s slave did not rendezvous on cpu", type);
1166 for_each_online_cpu(c) {
1167 if (c == monarch)
1168 continue;
1169 if (ia64_mc_info.imi_rendez_checkin[c] == IA64_MCA_RENDEZ_CHECKIN_NOTDONE)
1170 mprintk(" %d", c);
1171 }
1172 mprintk("\n");
1173 return;
1174
1175all_in:
1176 mprintk(KERN_INFO "All OS %s slaves have reached rendezvous\n", type);
1177 return;
1178}
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200void
1201ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
1202 struct ia64_sal_os_state *sos)
1203{
1204 int recover, cpu = smp_processor_id();
1205 struct task_struct *previous_current;
1206 struct ia64_mca_notify_die nd =
1207 { .sos = sos, .monarch_cpu = &monarch_cpu };
1208 static atomic_t mca_count;
1209 static cpumask_t mca_cpu;
1210
1211 if (atomic_add_return(1, &mca_count) == 1) {
1212 monarch_cpu = cpu;
1213 sos->monarch = 1;
1214 } else {
1215 cpu_set(cpu, mca_cpu);
1216 sos->monarch = 0;
1217 }
1218 mprintk(KERN_INFO "Entered OS MCA handler. PSP=%lx cpu=%d "
1219 "monarch=%ld\n", sos->proc_state_param, cpu, sos->monarch);
1220
1221 previous_current = ia64_mca_modify_original_stack(regs, sw, sos, "MCA");
1222
1223 if (notify_die(DIE_MCA_MONARCH_ENTER, "MCA", regs, (long)&nd, 0, 0)
1224 == NOTIFY_STOP)
1225 ia64_mca_spin(__FUNCTION__);
1226
1227 ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_CONCURRENT_MCA;
1228 if (sos->monarch) {
1229 ia64_wait_for_slaves(cpu, "MCA");
1230
1231
1232
1233
1234
1235
1236
1237
1238 ia64_mca_wakeup_all();
1239 if (notify_die(DIE_MCA_MONARCH_PROCESS, "MCA", regs, (long)&nd, 0, 0)
1240 == NOTIFY_STOP)
1241 ia64_mca_spin(__FUNCTION__);
1242 } else {
1243 while (cpu_isset(cpu, mca_cpu))
1244 cpu_relax();
1245 }
1246
1247
1248 ia64_mca_log_sal_error_record(SAL_INFO_TYPE_MCA);
1249
1250
1251 recover = (ia64_mca_ucmc_extension
1252 && ia64_mca_ucmc_extension(
1253 IA64_LOG_CURR_BUFFER(SAL_INFO_TYPE_MCA),
1254 sos));
1255
1256 if (recover) {
1257 sal_log_record_header_t *rh = IA64_LOG_CURR_BUFFER(SAL_INFO_TYPE_MCA);
1258 rh->severity = sal_log_severity_corrected;
1259 ia64_sal_clear_state_info(SAL_INFO_TYPE_MCA);
1260 sos->os_status = IA64_MCA_CORRECTED;
1261 } else {
1262
1263 ia64_mlogbuf_finish(1);
1264#ifdef CONFIG_KEXEC
1265 atomic_set(&kdump_in_progress, 1);
1266 monarch_cpu = -1;
1267#endif
1268 }
1269 if (notify_die(DIE_MCA_MONARCH_LEAVE, "MCA", regs, (long)&nd, 0, recover)
1270 == NOTIFY_STOP)
1271 ia64_mca_spin(__FUNCTION__);
1272
1273
1274 if (atomic_dec_return(&mca_count) > 0) {
1275 int i;
1276
1277
1278
1279
1280 for_each_online_cpu(i) {
1281 if (cpu_isset(i, mca_cpu)) {
1282 monarch_cpu = i;
1283 cpu_clear(i, mca_cpu);
1284 while (monarch_cpu != -1)
1285 cpu_relax();
1286 set_curr_task(cpu, previous_current);
1287 ia64_mc_info.imi_rendez_checkin[cpu]
1288 = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
1289 return;
1290 }
1291 }
1292 }
1293 set_curr_task(cpu, previous_current);
1294 ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
1295 monarch_cpu = -1;
1296}
1297
1298static DECLARE_WORK(cmc_disable_work, ia64_mca_cmc_vector_disable_keventd);
1299static DECLARE_WORK(cmc_enable_work, ia64_mca_cmc_vector_enable_keventd);
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315static irqreturn_t
1316ia64_mca_cmc_int_handler(int cmc_irq, void *arg)
1317{
1318 static unsigned long cmc_history[CMC_HISTORY_LENGTH];
1319 static int index;
1320 static DEFINE_SPINLOCK(cmc_history_lock);
1321
1322 IA64_MCA_DEBUG("%s: received interrupt vector = %#x on CPU %d\n",
1323 __FUNCTION__, cmc_irq, smp_processor_id());
1324
1325
1326 local_irq_enable();
1327
1328 spin_lock(&cmc_history_lock);
1329 if (!cmc_polling_enabled) {
1330 int i, count = 1;
1331 unsigned long now = jiffies;
1332
1333 for (i = 0; i < CMC_HISTORY_LENGTH; i++) {
1334 if (now - cmc_history[i] <= HZ)
1335 count++;
1336 }
1337
1338 IA64_MCA_DEBUG(KERN_INFO "CMC threshold %d/%d\n", count, CMC_HISTORY_LENGTH);
1339 if (count >= CMC_HISTORY_LENGTH) {
1340
1341 cmc_polling_enabled = 1;
1342 spin_unlock(&cmc_history_lock);
1343
1344
1345
1346
1347 ia64_mca_cmc_vector_disable(NULL);
1348 schedule_work(&cmc_disable_work);
1349
1350
1351
1352
1353
1354
1355 printk(KERN_WARNING "WARNING: Switching to polling CMC handler; error records may be lost\n");
1356
1357 mod_timer(&cmc_poll_timer, jiffies + CMC_POLL_INTERVAL);
1358
1359
1360 goto out;
1361 } else {
1362 cmc_history[index++] = now;
1363 if (index == CMC_HISTORY_LENGTH)
1364 index = 0;
1365 }
1366 }
1367 spin_unlock(&cmc_history_lock);
1368out:
1369
1370 ia64_mca_log_sal_error_record(SAL_INFO_TYPE_CMC);
1371
1372 return IRQ_HANDLED;
1373}
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388static irqreturn_t
1389ia64_mca_cmc_int_caller(int cmc_irq, void *arg)
1390{
1391 static int start_count = -1;
1392 unsigned int cpuid;
1393
1394 cpuid = smp_processor_id();
1395
1396
1397 if (start_count == -1)
1398 start_count = IA64_LOG_COUNT(SAL_INFO_TYPE_CMC);
1399
1400 ia64_mca_cmc_int_handler(cmc_irq, arg);
1401
1402 for (++cpuid ; cpuid < NR_CPUS && !cpu_online(cpuid) ; cpuid++);
1403
1404 if (cpuid < NR_CPUS) {
1405 platform_send_ipi(cpuid, IA64_CMCP_VECTOR, IA64_IPI_DM_INT, 0);
1406 } else {
1407
1408 if (start_count == IA64_LOG_COUNT(SAL_INFO_TYPE_CMC)) {
1409
1410 printk(KERN_WARNING "Returning to interrupt driven CMC handler\n");
1411 schedule_work(&cmc_enable_work);
1412 cmc_polling_enabled = 0;
1413
1414 } else {
1415
1416 mod_timer(&cmc_poll_timer, jiffies + CMC_POLL_INTERVAL);
1417 }
1418
1419 start_count = -1;
1420 }
1421
1422 return IRQ_HANDLED;
1423}
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434static void
1435ia64_mca_cmc_poll (unsigned long dummy)
1436{
1437
1438 platform_send_ipi(first_cpu(cpu_online_map), IA64_CMCP_VECTOR, IA64_IPI_DM_INT, 0);
1439}
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454#ifdef CONFIG_ACPI
1455
1456static irqreturn_t
1457ia64_mca_cpe_int_caller(int cpe_irq, void *arg)
1458{
1459 static int start_count = -1;
1460 static int poll_time = MIN_CPE_POLL_INTERVAL;
1461 unsigned int cpuid;
1462
1463 cpuid = smp_processor_id();
1464
1465
1466 if (start_count == -1)
1467 start_count = IA64_LOG_COUNT(SAL_INFO_TYPE_CPE);
1468
1469 ia64_mca_cpe_int_handler(cpe_irq, arg);
1470
1471 for (++cpuid ; cpuid < NR_CPUS && !cpu_online(cpuid) ; cpuid++);
1472
1473 if (cpuid < NR_CPUS) {
1474 platform_send_ipi(cpuid, IA64_CPEP_VECTOR, IA64_IPI_DM_INT, 0);
1475 } else {
1476
1477
1478
1479
1480 if (start_count != IA64_LOG_COUNT(SAL_INFO_TYPE_CPE)) {
1481 poll_time = max(MIN_CPE_POLL_INTERVAL, poll_time / 2);
1482 } else if (cpe_vector < 0) {
1483 poll_time = min(MAX_CPE_POLL_INTERVAL, poll_time * 2);
1484 } else {
1485 poll_time = MIN_CPE_POLL_INTERVAL;
1486
1487 printk(KERN_WARNING "Returning to interrupt driven CPE handler\n");
1488 enable_irq(local_vector_to_irq(IA64_CPE_VECTOR));
1489 cpe_poll_enabled = 0;
1490 }
1491
1492 if (cpe_poll_enabled)
1493 mod_timer(&cpe_poll_timer, jiffies + poll_time);
1494 start_count = -1;
1495 }
1496
1497 return IRQ_HANDLED;
1498}
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510static void
1511ia64_mca_cpe_poll (unsigned long dummy)
1512{
1513
1514 platform_send_ipi(first_cpu(cpu_online_map), IA64_CPEP_VECTOR, IA64_IPI_DM_INT, 0);
1515}
1516
1517#endif
1518
1519static int
1520default_monarch_init_process(struct notifier_block *self, unsigned long val, void *data)
1521{
1522 int c;
1523 struct task_struct *g, *t;
1524 if (val != DIE_INIT_MONARCH_PROCESS)
1525 return NOTIFY_DONE;
1526#ifdef CONFIG_KEXEC
1527 if (atomic_read(&kdump_in_progress))
1528 return NOTIFY_DONE;
1529#endif
1530
1531
1532
1533
1534
1535
1536 BREAK_LOGLEVEL(console_loglevel);
1537 ia64_mlogbuf_dump_from_init();
1538
1539 printk(KERN_ERR "Processes interrupted by INIT -");
1540 for_each_online_cpu(c) {
1541 struct ia64_sal_os_state *s;
1542 t = __va(__per_cpu_mca[c] + IA64_MCA_CPU_INIT_STACK_OFFSET);
1543 s = (struct ia64_sal_os_state *)((char *)t + MCA_SOS_OFFSET);
1544 g = s->prev_task;
1545 if (g) {
1546 if (g->pid)
1547 printk(" %d", g->pid);
1548 else
1549 printk(" %d (cpu %d task 0x%p)", g->pid, task_cpu(g), g);
1550 }
1551 }
1552 printk("\n\n");
1553 if (read_trylock(&tasklist_lock)) {
1554 do_each_thread (g, t) {
1555 printk("\nBacktrace of pid %d (%s)\n", t->pid, t->comm);
1556 show_stack(t, NULL);
1557 } while_each_thread (g, t);
1558 read_unlock(&tasklist_lock);
1559 }
1560
1561 RESTORE_LOGLEVEL(console_loglevel);
1562 return NOTIFY_DONE;
1563}
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582void
1583ia64_init_handler(struct pt_regs *regs, struct switch_stack *sw,
1584 struct ia64_sal_os_state *sos)
1585{
1586 static atomic_t slaves;
1587 static atomic_t monarchs;
1588 struct task_struct *previous_current;
1589 int cpu = smp_processor_id();
1590 struct ia64_mca_notify_die nd =
1591 { .sos = sos, .monarch_cpu = &monarch_cpu };
1592
1593 (void) notify_die(DIE_INIT_ENTER, "INIT", regs, (long)&nd, 0, 0);
1594
1595 mprintk(KERN_INFO "Entered OS INIT handler. PSP=%lx cpu=%d monarch=%ld\n",
1596 sos->proc_state_param, cpu, sos->monarch);
1597 salinfo_log_wakeup(SAL_INFO_TYPE_INIT, NULL, 0, 0);
1598
1599 previous_current = ia64_mca_modify_original_stack(regs, sw, sos, "INIT");
1600 sos->os_status = IA64_INIT_RESUME;
1601
1602
1603
1604
1605
1606
1607 if (!sos->monarch && atomic_add_return(1, &slaves) == num_online_cpus()) {
1608 mprintk(KERN_WARNING "%s: Promoting cpu %d to monarch.\n",
1609 __FUNCTION__, cpu);
1610 atomic_dec(&slaves);
1611 sos->monarch = 1;
1612 }
1613
1614
1615
1616
1617
1618
1619 if (sos->monarch && atomic_add_return(1, &monarchs) > 1) {
1620 mprintk(KERN_WARNING "%s: Demoting cpu %d to slave.\n",
1621 __FUNCTION__, cpu);
1622 atomic_dec(&monarchs);
1623 sos->monarch = 0;
1624 }
1625
1626 if (!sos->monarch) {
1627 ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_INIT;
1628 while (monarch_cpu == -1)
1629 cpu_relax();
1630 if (notify_die(DIE_INIT_SLAVE_ENTER, "INIT", regs, (long)&nd, 0, 0)
1631 == NOTIFY_STOP)
1632 ia64_mca_spin(__FUNCTION__);
1633 if (notify_die(DIE_INIT_SLAVE_PROCESS, "INIT", regs, (long)&nd, 0, 0)
1634 == NOTIFY_STOP)
1635 ia64_mca_spin(__FUNCTION__);
1636 while (monarch_cpu != -1)
1637 cpu_relax();
1638 if (notify_die(DIE_INIT_SLAVE_LEAVE, "INIT", regs, (long)&nd, 0, 0)
1639 == NOTIFY_STOP)
1640 ia64_mca_spin(__FUNCTION__);
1641 mprintk("Slave on cpu %d returning to normal service.\n", cpu);
1642 set_curr_task(cpu, previous_current);
1643 ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
1644 atomic_dec(&slaves);
1645 return;
1646 }
1647
1648 monarch_cpu = cpu;
1649 if (notify_die(DIE_INIT_MONARCH_ENTER, "INIT", regs, (long)&nd, 0, 0)
1650 == NOTIFY_STOP)
1651 ia64_mca_spin(__FUNCTION__);
1652
1653
1654
1655
1656
1657
1658
1659 mprintk("Delaying for 5 seconds...\n");
1660 udelay(5*1000000);
1661 ia64_wait_for_slaves(cpu, "INIT");
1662
1663
1664
1665
1666 if (notify_die(DIE_INIT_MONARCH_PROCESS, "INIT", regs, (long)&nd, 0, 0)
1667 == NOTIFY_STOP)
1668 ia64_mca_spin(__FUNCTION__);
1669 if (notify_die(DIE_INIT_MONARCH_LEAVE, "INIT", regs, (long)&nd, 0, 0)
1670 == NOTIFY_STOP)
1671 ia64_mca_spin(__FUNCTION__);
1672 mprintk("\nINIT dump complete. Monarch on cpu %d returning to normal service.\n", cpu);
1673 atomic_dec(&monarchs);
1674 set_curr_task(cpu, previous_current);
1675 monarch_cpu = -1;
1676 return;
1677}
1678
1679static int __init
1680ia64_mca_disable_cpe_polling(char *str)
1681{
1682 cpe_poll_enabled = 0;
1683 return 1;
1684}
1685
1686__setup("disable_cpe_poll", ia64_mca_disable_cpe_polling);
1687
1688static struct irqaction cmci_irqaction = {
1689 .handler = ia64_mca_cmc_int_handler,
1690 .flags = IRQF_DISABLED,
1691 .name = "cmc_hndlr"
1692};
1693
1694static struct irqaction cmcp_irqaction = {
1695 .handler = ia64_mca_cmc_int_caller,
1696 .flags = IRQF_DISABLED,
1697 .name = "cmc_poll"
1698};
1699
1700static struct irqaction mca_rdzv_irqaction = {
1701 .handler = ia64_mca_rendez_int_handler,
1702 .flags = IRQF_DISABLED,
1703 .name = "mca_rdzv"
1704};
1705
1706static struct irqaction mca_wkup_irqaction = {
1707 .handler = ia64_mca_wakeup_int_handler,
1708 .flags = IRQF_DISABLED,
1709 .name = "mca_wkup"
1710};
1711
1712#ifdef CONFIG_ACPI
1713static struct irqaction mca_cpe_irqaction = {
1714 .handler = ia64_mca_cpe_int_handler,
1715 .flags = IRQF_DISABLED,
1716 .name = "cpe_hndlr"
1717};
1718
1719static struct irqaction mca_cpep_irqaction = {
1720 .handler = ia64_mca_cpe_int_caller,
1721 .flags = IRQF_DISABLED,
1722 .name = "cpe_poll"
1723};
1724#endif
1725
1726
1727
1728
1729
1730
1731
1732static void __cpuinit
1733format_mca_init_stack(void *mca_data, unsigned long offset,
1734 const char *type, int cpu)
1735{
1736 struct task_struct *p = (struct task_struct *)((char *)mca_data + offset);
1737 struct thread_info *ti;
1738 memset(p, 0, KERNEL_STACK_SIZE);
1739 ti = task_thread_info(p);
1740 ti->flags = _TIF_MCA_INIT;
1741 ti->preempt_count = 1;
1742 ti->task = p;
1743 ti->cpu = cpu;
1744 p->stack = ti;
1745 p->state = TASK_UNINTERRUPTIBLE;
1746 cpu_set(cpu, p->cpus_allowed);
1747 INIT_LIST_HEAD(&p->tasks);
1748 p->parent = p->real_parent = p->group_leader = p;
1749 INIT_LIST_HEAD(&p->children);
1750 INIT_LIST_HEAD(&p->sibling);
1751 strncpy(p->comm, type, sizeof(p->comm)-1);
1752}
1753
1754
1755static void * __init_refok mca_bootmem(void)
1756{
1757 void *p;
1758
1759 p = alloc_bootmem(sizeof(struct ia64_mca_cpu) * NR_CPUS +
1760 KERNEL_STACK_SIZE);
1761 return (void *)ALIGN((unsigned long)p, KERNEL_STACK_SIZE);
1762}
1763
1764
1765void __cpuinit
1766ia64_mca_cpu_init(void *cpu_data)
1767{
1768 void *pal_vaddr;
1769 static int first_time = 1;
1770
1771 if (first_time) {
1772 void *mca_data;
1773 int cpu;
1774
1775 first_time = 0;
1776 mca_data = mca_bootmem();
1777 for (cpu = 0; cpu < NR_CPUS; cpu++) {
1778 format_mca_init_stack(mca_data,
1779 offsetof(struct ia64_mca_cpu, mca_stack),
1780 "MCA", cpu);
1781 format_mca_init_stack(mca_data,
1782 offsetof(struct ia64_mca_cpu, init_stack),
1783 "INIT", cpu);
1784 __per_cpu_mca[cpu] = __pa(mca_data);
1785 mca_data += sizeof(struct ia64_mca_cpu);
1786 }
1787 }
1788
1789
1790
1791
1792
1793
1794
1795 __get_cpu_var(ia64_mca_data) = __per_cpu_mca[smp_processor_id()];
1796
1797
1798
1799
1800
1801 __get_cpu_var(ia64_mca_per_cpu_pte) =
1802 pte_val(mk_pte_phys(__pa(cpu_data), PAGE_KERNEL));
1803
1804
1805
1806
1807
1808 pal_vaddr = efi_get_pal_addr();
1809 if (!pal_vaddr)
1810 return;
1811 __get_cpu_var(ia64_mca_pal_base) =
1812 GRANULEROUNDDOWN((unsigned long) pal_vaddr);
1813 __get_cpu_var(ia64_mca_pal_pte) = pte_val(mk_pte_phys(__pa(pal_vaddr),
1814 PAGE_KERNEL));
1815}
1816
1817static void __cpuinit ia64_mca_cmc_vector_adjust(void *dummy)
1818{
1819 unsigned long flags;
1820
1821 local_irq_save(flags);
1822 if (!cmc_polling_enabled)
1823 ia64_mca_cmc_vector_enable(NULL);
1824 local_irq_restore(flags);
1825}
1826
1827static int __cpuinit mca_cpu_callback(struct notifier_block *nfb,
1828 unsigned long action,
1829 void *hcpu)
1830{
1831 int hotcpu = (unsigned long) hcpu;
1832
1833 switch (action) {
1834 case CPU_ONLINE:
1835 case CPU_ONLINE_FROZEN:
1836 smp_call_function_single(hotcpu, ia64_mca_cmc_vector_adjust,
1837 NULL, 1, 0);
1838 break;
1839 }
1840 return NOTIFY_OK;
1841}
1842
1843static struct notifier_block mca_cpu_notifier __cpuinitdata = {
1844 .notifier_call = mca_cpu_callback
1845};
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867void __init
1868ia64_mca_init(void)
1869{
1870 ia64_fptr_t *init_hldlr_ptr_monarch = (ia64_fptr_t *)ia64_os_init_dispatch_monarch;
1871 ia64_fptr_t *init_hldlr_ptr_slave = (ia64_fptr_t *)ia64_os_init_dispatch_slave;
1872 ia64_fptr_t *mca_hldlr_ptr = (ia64_fptr_t *)ia64_os_mca_dispatch;
1873 int i;
1874 s64 rc;
1875 struct ia64_sal_retval isrv;
1876 u64 timeout = IA64_MCA_RENDEZ_TIMEOUT;
1877 static struct notifier_block default_init_monarch_nb = {
1878 .notifier_call = default_monarch_init_process,
1879 .priority = 0
1880 };
1881
1882 IA64_MCA_DEBUG("%s: begin\n", __FUNCTION__);
1883
1884
1885 for(i = 0 ; i < NR_CPUS; i++)
1886 ia64_mc_info.imi_rendez_checkin[i] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
1887
1888
1889
1890
1891
1892
1893 while (1) {
1894 isrv = ia64_sal_mc_set_params(SAL_MC_PARAM_RENDEZ_INT,
1895 SAL_MC_PARAM_MECHANISM_INT,
1896 IA64_MCA_RENDEZ_VECTOR,
1897 timeout,
1898 SAL_MC_PARAM_RZ_ALWAYS);
1899 rc = isrv.status;
1900 if (rc == 0)
1901 break;
1902 if (rc == -2) {
1903 printk(KERN_INFO "Increasing MCA rendezvous timeout from "
1904 "%ld to %ld milliseconds\n", timeout, isrv.v0);
1905 timeout = isrv.v0;
1906 (void) notify_die(DIE_MCA_NEW_TIMEOUT, "MCA", NULL, timeout, 0, 0);
1907 continue;
1908 }
1909 printk(KERN_ERR "Failed to register rendezvous interrupt "
1910 "with SAL (status %ld)\n", rc);
1911 return;
1912 }
1913
1914
1915 isrv = ia64_sal_mc_set_params(SAL_MC_PARAM_RENDEZ_WAKEUP,
1916 SAL_MC_PARAM_MECHANISM_INT,
1917 IA64_MCA_WAKEUP_VECTOR,
1918 0, 0);
1919 rc = isrv.status;
1920 if (rc) {
1921 printk(KERN_ERR "Failed to register wakeup interrupt with SAL "
1922 "(status %ld)\n", rc);
1923 return;
1924 }
1925
1926 IA64_MCA_DEBUG("%s: registered MCA rendezvous spinloop and wakeup mech.\n", __FUNCTION__);
1927
1928 ia64_mc_info.imi_mca_handler = ia64_tpa(mca_hldlr_ptr->fp);
1929
1930
1931
1932
1933 ia64_mc_info.imi_mca_handler_size = 0;
1934
1935
1936 if ((rc = ia64_sal_set_vectors(SAL_VECTOR_OS_MCA,
1937 ia64_mc_info.imi_mca_handler,
1938 ia64_tpa(mca_hldlr_ptr->gp),
1939 ia64_mc_info.imi_mca_handler_size,
1940 0, 0, 0)))
1941 {
1942 printk(KERN_ERR "Failed to register OS MCA handler with SAL "
1943 "(status %ld)\n", rc);
1944 return;
1945 }
1946
1947 IA64_MCA_DEBUG("%s: registered OS MCA handler with SAL at 0x%lx, gp = 0x%lx\n", __FUNCTION__,
1948 ia64_mc_info.imi_mca_handler, ia64_tpa(mca_hldlr_ptr->gp));
1949
1950
1951
1952
1953
1954 ia64_mc_info.imi_monarch_init_handler = ia64_tpa(init_hldlr_ptr_monarch->fp);
1955 ia64_mc_info.imi_monarch_init_handler_size = 0;
1956 ia64_mc_info.imi_slave_init_handler = ia64_tpa(init_hldlr_ptr_slave->fp);
1957 ia64_mc_info.imi_slave_init_handler_size = 0;
1958
1959 IA64_MCA_DEBUG("%s: OS INIT handler at %lx\n", __FUNCTION__,
1960 ia64_mc_info.imi_monarch_init_handler);
1961
1962
1963 if ((rc = ia64_sal_set_vectors(SAL_VECTOR_OS_INIT,
1964 ia64_mc_info.imi_monarch_init_handler,
1965 ia64_tpa(ia64_getreg(_IA64_REG_GP)),
1966 ia64_mc_info.imi_monarch_init_handler_size,
1967 ia64_mc_info.imi_slave_init_handler,
1968 ia64_tpa(ia64_getreg(_IA64_REG_GP)),
1969 ia64_mc_info.imi_slave_init_handler_size)))
1970 {
1971 printk(KERN_ERR "Failed to register m/s INIT handlers with SAL "
1972 "(status %ld)\n", rc);
1973 return;
1974 }
1975 if (register_die_notifier(&default_init_monarch_nb)) {
1976 printk(KERN_ERR "Failed to register default monarch INIT process\n");
1977 return;
1978 }
1979
1980 IA64_MCA_DEBUG("%s: registered OS INIT handler with SAL\n", __FUNCTION__);
1981
1982
1983
1984
1985
1986 register_percpu_irq(IA64_CMC_VECTOR, &cmci_irqaction);
1987 register_percpu_irq(IA64_CMCP_VECTOR, &cmcp_irqaction);
1988 ia64_mca_cmc_vector_setup();
1989
1990
1991 register_percpu_irq(IA64_MCA_RENDEZ_VECTOR, &mca_rdzv_irqaction);
1992
1993
1994 register_percpu_irq(IA64_MCA_WAKEUP_VECTOR, &mca_wkup_irqaction);
1995
1996#ifdef CONFIG_ACPI
1997
1998 register_percpu_irq(IA64_CPEP_VECTOR, &mca_cpep_irqaction);
1999#endif
2000
2001
2002
2003
2004
2005 ia64_log_init(SAL_INFO_TYPE_MCA);
2006 ia64_log_init(SAL_INFO_TYPE_INIT);
2007 ia64_log_init(SAL_INFO_TYPE_CMC);
2008 ia64_log_init(SAL_INFO_TYPE_CPE);
2009
2010 mca_init = 1;
2011 printk(KERN_INFO "MCA related initialization done\n");
2012}
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024static int __init
2025ia64_mca_late_init(void)
2026{
2027 if (!mca_init)
2028 return 0;
2029
2030 register_hotcpu_notifier(&mca_cpu_notifier);
2031
2032
2033 init_timer(&cmc_poll_timer);
2034 cmc_poll_timer.function = ia64_mca_cmc_poll;
2035
2036
2037 cmc_polling_enabled = 0;
2038 schedule_work(&cmc_enable_work);
2039
2040 IA64_MCA_DEBUG("%s: CMCI/P setup and enabled.\n", __FUNCTION__);
2041
2042#ifdef CONFIG_ACPI
2043
2044 cpe_vector = acpi_request_vector(ACPI_INTERRUPT_CPEI);
2045 init_timer(&cpe_poll_timer);
2046 cpe_poll_timer.function = ia64_mca_cpe_poll;
2047
2048 {
2049 irq_desc_t *desc;
2050 unsigned int irq;
2051
2052 if (cpe_vector >= 0) {
2053
2054 irq = local_vector_to_irq(cpe_vector);
2055 if (irq > 0) {
2056 cpe_poll_enabled = 0;
2057 desc = irq_desc + irq;
2058 desc->status |= IRQ_PER_CPU;
2059 setup_irq(irq, &mca_cpe_irqaction);
2060 ia64_cpe_irq = irq;
2061 ia64_mca_register_cpev(cpe_vector);
2062 IA64_MCA_DEBUG("%s: CPEI/P setup and enabled.\n",
2063 __FUNCTION__);
2064 return 0;
2065 }
2066 printk(KERN_ERR "%s: Failed to find irq for CPE "
2067 "interrupt handler, vector %d\n",
2068 __FUNCTION__, cpe_vector);
2069 }
2070
2071 if (cpe_poll_enabled) {
2072 ia64_mca_cpe_poll(0UL);
2073 IA64_MCA_DEBUG("%s: CPEP setup and enabled.\n", __FUNCTION__);
2074 }
2075 }
2076#endif
2077
2078 return 0;
2079}
2080
2081device_initcall(ia64_mca_late_init);
2082