LXR linux/arch/ia64/sn/kernel/io

   1/*
   2 * This file is subject to the terms and conditions of the GNU General Public
   3 * License.  See the file "COPYING" in the main directory of this archive
   4 * for more details.
   5 *
   6 * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved.
   7 */
   8
   9#include <asm/sn/types.h>
  10#include <asm/sn/addrs.h>
  11#include <asm/sn/io.h>
  12#include <asm/sn/module.h>
  13#include <asm/sn/intr.h>
  14#include <asm/sn/pcibus_provider_defs.h>
  15#include <asm/sn/pcidev.h>
  16#include <asm/sn/sn_sal.h>
  17#include "xtalk/hubdev.h"
  18
  19/*
  20 * The code in this file will only be executed when running with
  21 * a PROM that does _not_ have base ACPI IO support.
  22 * (i.e., SN_ACPI_BASE_SUPPORT() == 0)
  23 */
  24
  25static int max_segment_number;           /* Default highest segment number */
  26static int max_pcibus_number = 255;     /* Default highest pci bus number */
  27
  28
  29/*
  30 * Retrieve the hub device info structure for the given nasid.
  31 */
  32static inline u64 sal_get_hubdev_info(u64 handle, u64 address)
  33{
  34        struct ia64_sal_retval ret_stuff;
  35        ret_stuff.status = 0;
  36        ret_stuff.v0 = 0;
  37
  38        SAL_CALL_NOLOCK(ret_stuff,
  39                        (u64) SN_SAL_IOIF_GET_HUBDEV_INFO,
  40                        (u64) handle, (u64) address, 0, 0, 0, 0, 0);
  41        return ret_stuff.v0;
  42}
  43
  44/*
  45 * Retrieve the pci bus information given the bus number.
  46 */
  47static inline u64 sal_get_pcibus_info(u64 segment, u64 busnum, u64 address)
  48{
  49        struct ia64_sal_retval ret_stuff;
  50        ret_stuff.status = 0;
  51        ret_stuff.v0 = 0;
  52
  53        SAL_CALL_NOLOCK(ret_stuff,
  54                        (u64) SN_SAL_IOIF_GET_PCIBUS_INFO,
  55                        (u64) segment, (u64) busnum, (u64) address, 0, 0, 0, 0);
  56        return ret_stuff.v0;
  57}
  58
  59/*
  60 * Retrieve the pci device information given the bus and device|function number.
  61 */
  62static inline u64
  63sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev,
  64                    u64 sn_irq_info)
  65{
  66        struct ia64_sal_retval ret_stuff;
  67        ret_stuff.status = 0;
  68        ret_stuff.v0 = 0;
  69
  70        SAL_CALL_NOLOCK(ret_stuff,
  71                        (u64) SN_SAL_IOIF_GET_PCIDEV_INFO,
  72                        (u64) segment, (u64) bus_number, (u64) devfn,
  73                        (u64) pci_dev,
  74                        sn_irq_info, 0, 0);
  75        return ret_stuff.v0;
  76}
  77
  78
  79/*
  80 * sn_fixup_ionodes() - This routine initializes the HUB data structure for
  81 *                      each node in the system. This function is only
  82 *                      executed when running with a non-ACPI capable PROM.
  83 */
  84static void __init sn_fixup_ionodes(void)
  85{
  86
  87        struct hubdev_info *hubdev;
  88        u64 status;
  89        u64 nasid;
  90        int i;
  91        extern void sn_common_hubdev_init(struct hubdev_info *);
  92
  93        /*
  94         * Get SGI Specific HUB chipset information.
  95         * Inform Prom that this kernel can support domain bus numbering.
  96         */
  97        for (i = 0; i < num_cnodes; i++) {
  98                hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo);
  99                nasid = cnodeid_to_nasid(i);
 100                hubdev->max_segment_number = 0xffffffff;
 101                hubdev->max_pcibus_number = 0xff;
 102                status = sal_get_hubdev_info(nasid, (u64) __pa(hubdev));
 103                if (status)
 104                        continue;
 105
 106                /* Save the largest Domain and pcibus numbers found. */
 107                if (hubdev->max_segment_number) {
 108                        /*
 109                         * Dealing with a Prom that supports segments.
 110                         */
 111                        max_segment_number = hubdev->max_segment_number;
 112                        max_pcibus_number = hubdev->max_pcibus_number;
 113                }
 114                sn_common_hubdev_init(hubdev);
 115        }
 116}
 117
 118/*
 119 * sn_pci_legacy_window_fixup - Create PCI controller windows for
 120 *                              legacy IO and MEM space. This needs to
 121 *                              be done here, as the PROM does not have
 122 *                              ACPI support defining the root buses
 123 *                              and their resources (_CRS),
 124 */
 125static void
 126sn_legacy_pci_window_fixup(struct pci_controller *controller,
 127                           u64 legacy_io, u64 legacy_mem)
 128{
 129                controller->window = kcalloc(2, sizeof(struct pci_window),
 130                                             GFP_KERNEL);
 131                if (controller->window == NULL)
 132                        BUG();
 133                controller->window[0].offset = legacy_io;
 134                controller->window[0].resource.name = "legacy_io";
 135                controller->window[0].resource.flags = IORESOURCE_IO;
 136                controller->window[0].resource.start = legacy_io;
 137                controller->window[0].resource.end =
 138                                controller->window[0].resource.start + 0xffff;
 139                controller->window[0].resource.parent = &ioport_resource;
 140                controller->window[1].offset = legacy_mem;
 141                controller->window[1].resource.name = "legacy_mem";
 142                controller->window[1].resource.flags = IORESOURCE_MEM;
 143                controller->window[1].resource.start = legacy_mem;
 144                controller->window[1].resource.end =
 145                       controller->window[1].resource.start + (1024 * 1024) - 1;
 146                controller->window[1].resource.parent = &iomem_resource;
 147                controller->windows = 2;
 148}
 149
 150/*
 151 * sn_pci_window_fixup() - Create a pci_window for each device resource.
 152 *                         It will setup pci_windows for use by
 153 *                         pcibios_bus_to_resource(), pcibios_resource_to_bus(),
 154 *                         etc.
 155 */
 156static void
 157sn_pci_window_fixup(struct pci_dev *dev, unsigned int count,
 158                    s64 * pci_addrs)
 159{
 160        struct pci_controller *controller = PCI_CONTROLLER(dev->bus);
 161        unsigned int i;
 162        unsigned int idx;
 163        unsigned int new_count;
 164        struct pci_window *new_window;
 165
 166        if (count == 0)
 167                return;
 168        idx = controller->windows;
 169        new_count = controller->windows + count;
 170        new_window = kcalloc(new_count, sizeof(struct pci_window), GFP_KERNEL);
 171        if (new_window == NULL)
 172                BUG();
 173        if (controller->window) {
 174                memcpy(new_window, controller->window,
 175                       sizeof(struct pci_window) * controller->windows);
 176                kfree(controller->window);
 177        }
 178
 179        /* Setup a pci_window for each device resource. */
 180        for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
 181                if (pci_addrs[i] == -1)
 182                        continue;
 183
 184                new_window[idx].offset = dev->resource[i].start - pci_addrs[i];
 185                new_window[idx].resource = dev->resource[i];
 186                idx++;
 187        }
 188
 189        controller->windows = new_count;
 190        controller->window = new_window;
 191}
 192
 193/*
 194 * sn_io_slot_fixup() -   We are not running with an ACPI capable PROM,
 195 *                        and need to convert the pci_dev->resource
 196 *                        'start' and 'end' addresses to mapped addresses,
 197 *                        and setup the pci_controller->window array entries.
 198 */
 199void
 200sn_io_slot_fixup(struct pci_dev *dev)
 201{
 202        unsigned int count = 0;
 203        int idx;
 204        s64 pci_addrs[PCI_ROM_RESOURCE + 1];
 205        unsigned long addr, end, size, start;
 206        struct pcidev_info *pcidev_info;
 207        struct sn_irq_info *sn_irq_info;
 208        int status;
 209
 210        pcidev_info = kzalloc(sizeof(struct pcidev_info), GFP_KERNEL);
 211        if (!pcidev_info)
 212                panic("%s: Unable to alloc memory for pcidev_info", __FUNCTION__);
 213
 214        sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
 215        if (!sn_irq_info)
 216                panic("%s: Unable to alloc memory for sn_irq_info", __FUNCTION__);
 217
 218        /* Call to retrieve pci device information needed by kernel. */
 219        status = sal_get_pcidev_info((u64) pci_domain_nr(dev),
 220                (u64) dev->bus->number,
 221                dev->devfn,
 222                (u64) __pa(pcidev_info),
 223                (u64) __pa(sn_irq_info));
 224
 225        if (status)
 226                BUG(); /* Cannot get platform pci device information */
 227
 228
 229        /* Copy over PIO Mapped Addresses */
 230        for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) {
 231
 232                if (!pcidev_info->pdi_pio_mapped_addr[idx]) {
 233                        pci_addrs[idx] = -1;
 234                        continue;
 235                }
 236
 237                start = dev->resource[idx].start;
 238                end = dev->resource[idx].end;
 239                size = end - start;
 240                if (size == 0) {
 241                        pci_addrs[idx] = -1;
 242                        continue;
 243                }
 244                pci_addrs[idx] = start;
 245                count++;
 246                addr = pcidev_info->pdi_pio_mapped_addr[idx];
 247                addr = ((addr << 4) >> 4) | __IA64_UNCACHED_OFFSET;
 248                dev->resource[idx].start = addr;
 249                dev->resource[idx].end = addr + size;
 250
 251                /*
 252                 * if it's already in the device structure, remove it before
 253                 * inserting
 254                 */
 255                if (dev->resource[idx].parent && dev->resource[idx].parent->child)
 256                        release_resource(&dev->resource[idx]);
 257
 258                if (dev->resource[idx].flags & IORESOURCE_IO)
 259                        insert_resource(&ioport_resource, &dev->resource[idx]);
 260                else
 261                        insert_resource(&iomem_resource, &dev->resource[idx]);
 262                /*
 263                 * If ROM, set the actual ROM image size, and mark as
 264                 * shadowed in PROM.
 265                 */
 266                if (idx == PCI_ROM_RESOURCE) {
 267                        size_t image_size;
 268                        void __iomem *rom;
 269
 270                        rom = ioremap(pci_resource_start(dev, PCI_ROM_RESOURCE),
 271                                      size + 1);
 272                        image_size = pci_get_rom_size(rom, size + 1);
 273                        dev->resource[PCI_ROM_RESOURCE].end =
 274                                dev->resource[PCI_ROM_RESOURCE].start +
 275                                image_size - 1;
 276                        dev->resource[PCI_ROM_RESOURCE].flags |=
 277                                                 IORESOURCE_ROM_BIOS_COPY;
 278                }
 279        }
 280        /* Create a pci_window in the pci_controller struct for
 281         * each device resource.
 282         */
 283        if (count > 0)
 284                sn_pci_window_fixup(dev, count, pci_addrs);
 285
 286        sn_pci_fixup_slot(dev, pcidev_info, sn_irq_info);
 287}
 288
 289EXPORT_SYMBOL(sn_io_slot_fixup);
 290
 291/*
 292 * sn_pci_controller_fixup() - This routine sets up a bus's resources
 293 *                             consistent with the Linux PCI abstraction layer.
 294 */
 295static void
 296sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
 297{
 298        s64 status = 0;
 299        struct pci_controller *controller;
 300        struct pcibus_bussoft *prom_bussoft_ptr;
 301
 302
 303        status = sal_get_pcibus_info((u64) segment, (u64) busnum,
 304                                     (u64) ia64_tpa(&prom_bussoft_ptr));
 305        if (status > 0)
 306                return;         /*bus # does not exist */
 307        prom_bussoft_ptr = __va(prom_bussoft_ptr);
 308
 309        controller = kzalloc(sizeof(*controller), GFP_KERNEL);
 310        if (!controller)
 311                BUG();
 312        controller->segment = segment;
 313
 314        /*
 315         * Temporarily save the prom_bussoft_ptr for use by sn_bus_fixup().
 316         * (platform_data will be overwritten later in sn_common_bus_fixup())
 317         */
 318        controller->platform_data = prom_bussoft_ptr;
 319
 320        bus = pci_scan_bus(busnum, &pci_root_ops, controller);
 321        if (bus == NULL)
 322                goto error_return; /* error, or bus already scanned */
 323
 324        bus->sysdata = controller;
 325
 326        return;
 327
 328error_return:
 329
 330        kfree(controller);
 331        return;
 332}
 333
 334/*
 335 * sn_bus_fixup
 336 */
 337void
 338sn_bus_fixup(struct pci_bus *bus)
 339{
 340        struct pci_dev *pci_dev = NULL;
 341        struct pcibus_bussoft *prom_bussoft_ptr;
 342
 343        if (!bus->parent) {  /* If root bus */
 344                prom_bussoft_ptr = PCI_CONTROLLER(bus)->platform_data;
 345                if (prom_bussoft_ptr == NULL) {
 346                        printk(KERN_ERR
 347                               "sn_bus_fixup: 0x%04x:0x%02x Unable to "
 348                               "obtain prom_bussoft_ptr\n",
 349                               pci_domain_nr(bus), bus->number);
 350                        return;
 351                }
 352                sn_common_bus_fixup(bus, prom_bussoft_ptr);
 353                sn_legacy_pci_window_fixup(PCI_CONTROLLER(bus),
 354                                           prom_bussoft_ptr->bs_legacy_io,
 355                                           prom_bussoft_ptr->bs_legacy_mem);
 356        }
 357        list_for_each_entry(pci_dev, &bus->devices, bus_list) {
 358                sn_io_slot_fixup(pci_dev);
 359        }
 360
 361}
 362
 363/*
 364 * sn_io_init - PROM does not have ACPI support to define nodes or root buses,
 365 *              so we need to do things the hard way, including initiating the
 366 *              bus scanning ourselves.
 367 */
 368
 369void __init sn_io_init(void)
 370{
 371        int i, j;
 372
 373        sn_fixup_ionodes();
 374
 375        /* busses are not known yet ... */
 376        for (i = 0; i <= max_segment_number; i++)
 377                for (j = 0; j <= max_pcibus_number; j++)
 378                        sn_pci_controller_fixup(i, j, NULL);
 379}
 380