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4
5#include <linux/clockchips.h>
6#include <linux/init.h>
7#include <linux/interrupt.h>
8#include <linux/jiffies.h>
9#include <linux/module.h>
10#include <linux/spinlock.h>
11
12#include <asm/delay.h>
13#include <asm/i8253.h>
14#include <asm/io.h>
15#include <asm/time.h>
16
17DEFINE_SPINLOCK(i8253_lock);
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21
22
23
24static void init_pit_timer(enum clock_event_mode mode,
25 struct clock_event_device *evt)
26{
27 unsigned long flags;
28
29 spin_lock_irqsave(&i8253_lock, flags);
30
31 switch(mode) {
32 case CLOCK_EVT_MODE_PERIODIC:
33
34 outb_p(0x34, PIT_MODE);
35 outb_p(LATCH & 0xff , PIT_CH0);
36 outb(LATCH >> 8 , PIT_CH0);
37 break;
38
39 case CLOCK_EVT_MODE_SHUTDOWN:
40 case CLOCK_EVT_MODE_UNUSED:
41 if (evt->mode == CLOCK_EVT_MODE_PERIODIC ||
42 evt->mode == CLOCK_EVT_MODE_ONESHOT) {
43 outb_p(0x30, PIT_MODE);
44 outb_p(0, PIT_CH0);
45 outb_p(0, PIT_CH0);
46 }
47 break;
48
49 case CLOCK_EVT_MODE_ONESHOT:
50
51 outb_p(0x38, PIT_MODE);
52 break;
53
54 case CLOCK_EVT_MODE_RESUME:
55
56 break;
57 }
58 spin_unlock_irqrestore(&i8253_lock, flags);
59}
60
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64
65
66static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
67{
68 unsigned long flags;
69
70 spin_lock_irqsave(&i8253_lock, flags);
71 outb_p(delta & 0xff , PIT_CH0);
72 outb(delta >> 8 , PIT_CH0);
73 spin_unlock_irqrestore(&i8253_lock, flags);
74
75 return 0;
76}
77
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84
85
86struct clock_event_device pit_clockevent = {
87 .name = "pit",
88 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
89 .set_mode = init_pit_timer,
90 .set_next_event = pit_next_event,
91 .irq = 0,
92};
93
94static irqreturn_t timer_interrupt(int irq, void *dev_id)
95{
96 pit_clockevent.event_handler(&pit_clockevent);
97
98 return IRQ_HANDLED;
99}
100
101static struct irqaction irq0 = {
102 .handler = timer_interrupt,
103 .flags = IRQF_DISABLED | IRQF_NOBALANCING,
104 .mask = CPU_MASK_NONE,
105 .name = "timer"
106};
107
108
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110
111
112void __init setup_pit_timer(void)
113{
114 struct clock_event_device *cd = &pit_clockevent;
115 unsigned int cpu = smp_processor_id();
116
117
118
119
120
121 cd->cpumask = cpumask_of_cpu(cpu);
122 clockevent_set_clock(cd, CLOCK_TICK_RATE);
123 cd->max_delta_ns = clockevent_delta2ns(0x7FFF, cd);
124 cd->min_delta_ns = clockevent_delta2ns(0xF, cd);
125 clockevents_register_device(cd);
126
127 irq0.mask = cpumask_of_cpu(cpu);
128 setup_irq(0, &irq0);
129}
130
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134
135
136static cycle_t pit_read(void)
137{
138 unsigned long flags;
139 int count;
140 u32 jifs;
141 static int old_count;
142 static u32 old_jifs;
143
144 spin_lock_irqsave(&i8253_lock, flags);
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157
158 jifs = jiffies;
159 outb_p(0x00, PIT_MODE);
160 count = inb_p(PIT_CH0);
161 count |= inb_p(PIT_CH0) << 8;
162
163
164 if (count > LATCH) {
165 outb_p(0x34, PIT_MODE);
166 outb_p(LATCH & 0xff, PIT_CH0);
167 outb(LATCH >> 8, PIT_CH0);
168 count = LATCH - 1;
169 }
170
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182
183
184 if (count > old_count && jifs == old_jifs) {
185 count = old_count;
186 }
187 old_count = count;
188 old_jifs = jifs;
189
190 spin_unlock_irqrestore(&i8253_lock, flags);
191
192 count = (LATCH - 1) - count;
193
194 return (cycle_t)(jifs * LATCH) + count;
195}
196
197static struct clocksource clocksource_pit = {
198 .name = "pit",
199 .rating = 110,
200 .read = pit_read,
201 .mask = CLOCKSOURCE_MASK(32),
202 .mult = 0,
203 .shift = 20,
204};
205
206static int __init init_pit_clocksource(void)
207{
208 if (num_possible_cpus() > 1)
209 return 0;
210
211 clocksource_pit.mult = clocksource_hz2mult(CLOCK_TICK_RATE, 20);
212 return clocksource_register(&clocksource_pit);
213}
214arch_initcall(init_pit_clocksource);
215