LXR linux/arch/mips/pmc-sierra/yosemite/py-console.c

   1/*
   2 * This file is subject to the terms and conditions of the GNU General Public
   3 * License.  See the file "COPYING" in the main directory of this archive
   4 * for more details.
   5 *
   6 * Copyright (C) 2001, 2002, 2004 Ralf Baechle
   7 */
   8#include <linux/init.h>
   9#include <linux/console.h>
  10#include <linux/kdev_t.h>
  11#include <linux/major.h>
  12#include <linux/termios.h>
  13#include <linux/sched.h>
  14#include <linux/tty.h>
  15
  16#include <linux/serial.h>
  17#include <linux/serial_core.h>
  18#include <asm/serial.h>
  19#include <asm/io.h>
  20
  21/* SUPERIO uart register map */
  22struct yo_uartregs {
  23        union {
  24                volatile u8     rbr;    /* read only, DLAB == 0 */
  25                volatile u8     thr;    /* write only, DLAB == 0 */
  26                volatile u8     dll;    /* DLAB == 1 */
  27        } u1;
  28        union {
  29                volatile u8     ier;    /* DLAB == 0 */
  30                volatile u8     dlm;    /* DLAB == 1 */
  31        } u2;
  32        union {
  33                volatile u8     iir;    /* read only */
  34                volatile u8     fcr;    /* write only */
  35        } u3;
  36        volatile u8     iu_lcr;
  37        volatile u8     iu_mcr;
  38        volatile u8     iu_lsr;
  39        volatile u8     iu_msr;
  40        volatile u8     iu_scr;
  41} yo_uregs_t;
  42
  43#define iu_rbr u1.rbr
  44#define iu_thr u1.thr
  45#define iu_dll u1.dll
  46#define iu_ier u2.ier
  47#define iu_dlm u2.dlm
  48#define iu_iir u3.iir
  49#define iu_fcr u3.fcr
  50
  51#define ssnop()         __asm__ __volatile__("sll       $0, $0, 1\n");
  52#define ssnop_4()       do { ssnop(); ssnop(); ssnop(); ssnop(); } while (0)
  53
  54#define IO_BASE_64      0x9000000000000000ULL
  55
  56static unsigned char readb_outer_space(unsigned long long phys)
  57{
  58        unsigned long long vaddr = IO_BASE_64 | phys;
  59        unsigned char res;
  60        unsigned int sr;
  61
  62        sr = read_c0_status();
  63        write_c0_status((sr | ST0_KX) & ~ ST0_IE);
  64        ssnop_4();
  65
  66        __asm__ __volatile__ (
  67        "       .set    mips3           \n"
  68        "       ld      %0, %1          \n"
  69        "       lbu     %0, (%0)        \n"
  70        "       .set    mips0           \n"
  71        : "=r" (res)
  72        : "m" (vaddr));
  73
  74        write_c0_status(sr);
  75        ssnop_4();
  76
  77        return res;
  78}
  79
  80static void writeb_outer_space(unsigned long long phys, unsigned char c)
  81{
  82        unsigned long long vaddr = IO_BASE_64 | phys;
  83        unsigned long tmp;
  84        unsigned int sr;
  85
  86        sr = read_c0_status();
  87        write_c0_status((sr | ST0_KX) & ~ ST0_IE);
  88        ssnop_4();
  89
  90        __asm__ __volatile__ (
  91        "       .set    mips3           \n"
  92        "       ld      %0, %1          \n"
  93        "       sb      %2, (%0)        \n"
  94        "       .set    mips0           \n"
  95        : "=&r" (tmp)
  96        : "m" (vaddr), "r" (c));
  97
  98        write_c0_status(sr);
  99        ssnop_4();
 100}
 101
 102void prom_putchar(char c)
 103{
 104        unsigned long lsr = 0xfd000008ULL + offsetof(struct yo_uartregs, iu_lsr);
 105        unsigned long thr = 0xfd000008ULL + offsetof(struct yo_uartregs, iu_thr);
 106
 107        while ((readb_outer_space(lsr) & 0x20) == 0);
 108        writeb_outer_space(thr, c);
 109}
 110