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14#include <linux/stddef.h>
15#include <linux/kernel.h>
16#include <linux/pci.h>
17#include <linux/kdev_t.h>
18#include <linux/delay.h>
19#include <linux/seq_file.h>
20#include <linux/of_platform.h>
21
22#include <asm/system.h>
23#include <asm/time.h>
24#include <asm/machdep.h>
25#include <asm/pci-bridge.h>
26#include <asm/mpic.h>
27#include <mm/mmu_decl.h>
28#include <asm/udbg.h>
29
30#include <sysdev/fsl_soc.h>
31#include <sysdev/fsl_pci.h>
32
33#ifdef CONFIG_CPM2
34#include <asm/cpm2.h>
35#include <sysdev/cpm2_pic.h>
36#endif
37
38#ifdef CONFIG_PCI
39static int mpc85xx_exclude_device(struct pci_controller *hose,
40 u_char bus, u_char devfn)
41{
42 if (bus == 0 && PCI_SLOT(devfn) == 0)
43 return PCIBIOS_DEVICE_NOT_FOUND;
44 else
45 return PCIBIOS_SUCCESSFUL;
46}
47#endif
48
49#ifdef CONFIG_CPM2
50
51static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
52{
53 int cascade_irq;
54
55 while ((cascade_irq = cpm2_get_irq()) >= 0) {
56 generic_handle_irq(cascade_irq);
57 }
58 desc->chip->eoi(irq);
59}
60
61#endif
62
63static void __init mpc85xx_ads_pic_init(void)
64{
65 struct mpic *mpic;
66 struct resource r;
67 struct device_node *np = NULL;
68#ifdef CONFIG_CPM2
69 int irq;
70#endif
71
72 np = of_find_node_by_type(np, "open-pic");
73
74 if (np == NULL) {
75 printk(KERN_ERR "Could not find open-pic node\n");
76 return;
77 }
78
79 if(of_address_to_resource(np, 0, &r)) {
80 printk(KERN_ERR "Could not map mpic register space\n");
81 of_node_put(np);
82 return;
83 }
84
85 mpic = mpic_alloc(np, r.start,
86 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
87 0, 256, " OpenPIC ");
88 BUG_ON(mpic == NULL);
89 of_node_put(np);
90
91 mpic_init(mpic);
92
93#ifdef CONFIG_CPM2
94
95 np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
96 if (np == NULL) {
97 printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
98 return;
99 }
100 irq = irq_of_parse_and_map(np, 0);
101
102 cpm2_pic_init(np);
103 set_irq_chained_handler(irq, cpm2_cascade);
104#endif
105}
106
107
108
109
110#ifdef CONFIG_CPM2
111struct cpm_pin {
112 int port, pin, flags;
113};
114
115static struct cpm_pin mpc8560_ads_pins[] = {
116
117 {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
118 {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
119 {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
120
121
122 {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
123 {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
124 {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
125
126
127 {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
128 {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
129 {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
130 {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
131 {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
132 {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
133 {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
134 {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
135 {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
136 {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
137 {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
138 {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
139 {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
140 {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
141 {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
142 {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
143
144
145 {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
146 {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
147 {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
148 {1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
149 {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
150 {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
151 {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
152 {1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
153 {1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
154 {1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
155 {1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
156 {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
157 {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
158 {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
159 {2, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
160 {2, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
161};
162
163static void __init init_ioports(void)
164{
165 int i;
166
167 for (i = 0; i < ARRAY_SIZE(mpc8560_ads_pins); i++) {
168 struct cpm_pin *pin = &mpc8560_ads_pins[i];
169 cpm2_set_pin(pin->port, pin->pin, pin->flags);
170 }
171
172 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
173 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
174 cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
175 cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
176 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
177 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
178 cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
179 cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
180}
181#endif
182
183static void __init mpc85xx_ads_setup_arch(void)
184{
185#ifdef CONFIG_PCI
186 struct device_node *np;
187#endif
188
189 if (ppc_md.progress)
190 ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
191
192#ifdef CONFIG_CPM2
193 cpm2_reset();
194 init_ioports();
195#endif
196
197#ifdef CONFIG_PCI
198 for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
199 fsl_add_bridge(np, 1);
200
201 ppc_md.pci_exclude_device = mpc85xx_exclude_device;
202#endif
203}
204
205static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
206{
207 uint pvid, svid, phid1;
208 uint memsize = total_memory;
209
210 pvid = mfspr(SPRN_PVR);
211 svid = mfspr(SPRN_SVR);
212
213 seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
214 seq_printf(m, "Machine\t\t: mpc85xx\n");
215 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
216 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
217
218
219 phid1 = mfspr(SPRN_HID1);
220 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
221
222
223 seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
224}
225
226static struct of_device_id __initdata of_bus_ids[] = {
227 { .name = "soc", },
228 { .type = "soc", },
229 { .name = "cpm", },
230 { .name = "localbus", },
231 {},
232};
233
234static int __init declare_of_platform_devices(void)
235{
236 if (!machine_is(mpc85xx_ads))
237 return 0;
238
239 of_platform_bus_probe(NULL, of_bus_ids, NULL);
240 return 0;
241}
242device_initcall(declare_of_platform_devices);
243
244
245
246
247static int __init mpc85xx_ads_probe(void)
248{
249 unsigned long root = of_get_flat_dt_root();
250
251 return of_flat_dt_is_compatible(root, "MPC85xxADS");
252}
253
254define_machine(mpc85xx_ads) {
255 .name = "MPC85xx ADS",
256 .probe = mpc85xx_ads_probe,
257 .setup_arch = mpc85xx_ads_setup_arch,
258 .init_IRQ = mpc85xx_ads_pic_init,
259 .show_cpuinfo = mpc85xx_ads_show_cpuinfo,
260 .get_irq = mpic_get_irq,
261 .restart = fsl_rstcr_restart,
262 .calibrate_decr = generic_calibrate_decr,
263 .progress = udbg_progress,
264};
265