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39#ifndef MTHCA_DEV_H
40#define MTHCA_DEV_H
41
42#include <linux/spinlock.h>
43#include <linux/kernel.h>
44#include <linux/pci.h>
45#include <linux/dma-mapping.h>
46#include <linux/timer.h>
47#include <linux/mutex.h>
48#include <linux/list.h>
49
50#include <asm/semaphore.h>
51
52#include "mthca_provider.h"
53#include "mthca_doorbell.h"
54
55#define DRV_NAME "ib_mthca"
56#define PFX DRV_NAME ": "
57#define DRV_VERSION "0.08"
58#define DRV_RELDATE "February 14, 2006"
59
60enum {
61 MTHCA_FLAG_DDR_HIDDEN = 1 << 1,
62 MTHCA_FLAG_SRQ = 1 << 2,
63 MTHCA_FLAG_MSI = 1 << 3,
64 MTHCA_FLAG_MSI_X = 1 << 4,
65 MTHCA_FLAG_NO_LAM = 1 << 5,
66 MTHCA_FLAG_FMR = 1 << 6,
67 MTHCA_FLAG_MEMFREE = 1 << 7,
68 MTHCA_FLAG_PCIE = 1 << 8,
69 MTHCA_FLAG_SINAI_OPT = 1 << 9
70};
71
72enum {
73 MTHCA_MAX_PORTS = 2
74};
75
76enum {
77 MTHCA_BOARD_ID_LEN = 64
78};
79
80enum {
81 MTHCA_EQ_CONTEXT_SIZE = 0x40,
82 MTHCA_CQ_CONTEXT_SIZE = 0x40,
83 MTHCA_QP_CONTEXT_SIZE = 0x200,
84 MTHCA_RDB_ENTRY_SIZE = 0x20,
85 MTHCA_AV_SIZE = 0x20,
86 MTHCA_MGM_ENTRY_SIZE = 0x100,
87
88
89 MTHCA_MPT_ENTRY_SIZE = 0x40,
90 MTHCA_MTT_SEG_SIZE = 0x40,
91
92 MTHCA_QP_PER_MGM = 4 * (MTHCA_MGM_ENTRY_SIZE / 16 - 2)
93};
94
95enum {
96 MTHCA_EQ_CMD,
97 MTHCA_EQ_ASYNC,
98 MTHCA_EQ_COMP,
99 MTHCA_NUM_EQ
100};
101
102enum {
103 MTHCA_OPCODE_NOP = 0x00,
104 MTHCA_OPCODE_RDMA_WRITE = 0x08,
105 MTHCA_OPCODE_RDMA_WRITE_IMM = 0x09,
106 MTHCA_OPCODE_SEND = 0x0a,
107 MTHCA_OPCODE_SEND_IMM = 0x0b,
108 MTHCA_OPCODE_RDMA_READ = 0x10,
109 MTHCA_OPCODE_ATOMIC_CS = 0x11,
110 MTHCA_OPCODE_ATOMIC_FA = 0x12,
111 MTHCA_OPCODE_BIND_MW = 0x18,
112 MTHCA_OPCODE_INVALID = 0xff
113};
114
115enum {
116 MTHCA_CMD_USE_EVENTS = 1 << 0,
117 MTHCA_CMD_POST_DOORBELLS = 1 << 1
118};
119
120enum {
121 MTHCA_CMD_NUM_DBELL_DWORDS = 8
122};
123
124struct mthca_cmd {
125 struct pci_pool *pool;
126 struct mutex hcr_mutex;
127 struct semaphore poll_sem;
128 struct semaphore event_sem;
129 int max_cmds;
130 spinlock_t context_lock;
131 int free_head;
132 struct mthca_cmd_context *context;
133 u16 token_mask;
134 u32 flags;
135 void __iomem *dbell_map;
136 u16 dbell_offsets[MTHCA_CMD_NUM_DBELL_DWORDS];
137};
138
139struct mthca_limits {
140 int num_ports;
141 int vl_cap;
142 int mtu_cap;
143 int gid_table_len;
144 int pkey_table_len;
145 int local_ca_ack_delay;
146 int num_uars;
147 int max_sg;
148 int num_qps;
149 int max_wqes;
150 int max_desc_sz;
151 int max_qp_init_rdma;
152 int reserved_qps;
153 int num_srqs;
154 int max_srq_wqes;
155 int max_srq_sge;
156 int reserved_srqs;
157 int num_eecs;
158 int reserved_eecs;
159 int num_cqs;
160 int max_cqes;
161 int reserved_cqs;
162 int num_eqs;
163 int reserved_eqs;
164 int num_mpts;
165 int num_mtt_segs;
166 int fmr_reserved_mtts;
167 int reserved_mtts;
168 int reserved_mrws;
169 int reserved_uars;
170 int num_mgms;
171 int num_amgms;
172 int reserved_mcgs;
173 int num_pds;
174 int reserved_pds;
175 u32 page_size_cap;
176 u32 flags;
177 u16 stat_rate_support;
178 u8 port_width_cap;
179};
180
181struct mthca_alloc {
182 u32 last;
183 u32 top;
184 u32 max;
185 u32 mask;
186 spinlock_t lock;
187 unsigned long *table;
188};
189
190struct mthca_array {
191 struct {
192 void **page;
193 int used;
194 } *page_list;
195};
196
197struct mthca_uar_table {
198 struct mthca_alloc alloc;
199 u64 uarc_base;
200 int uarc_size;
201};
202
203struct mthca_pd_table {
204 struct mthca_alloc alloc;
205};
206
207struct mthca_buddy {
208 unsigned long **bits;
209 int max_order;
210 spinlock_t lock;
211};
212
213struct mthca_mr_table {
214 struct mthca_alloc mpt_alloc;
215 struct mthca_buddy mtt_buddy;
216 struct mthca_buddy *fmr_mtt_buddy;
217 u64 mtt_base;
218 u64 mpt_base;
219 struct mthca_icm_table *mtt_table;
220 struct mthca_icm_table *mpt_table;
221 struct {
222 void __iomem *mpt_base;
223 void __iomem *mtt_base;
224 struct mthca_buddy mtt_buddy;
225 } tavor_fmr;
226};
227
228struct mthca_eq_table {
229 struct mthca_alloc alloc;
230 void __iomem *clr_int;
231 u32 clr_mask;
232 u32 arm_mask;
233 struct mthca_eq eq[MTHCA_NUM_EQ];
234 u64 icm_virt;
235 struct page *icm_page;
236 dma_addr_t icm_dma;
237 int have_irq;
238 u8 inta_pin;
239};
240
241struct mthca_cq_table {
242 struct mthca_alloc alloc;
243 spinlock_t lock;
244 struct mthca_array cq;
245 struct mthca_icm_table *table;
246};
247
248struct mthca_srq_table {
249 struct mthca_alloc alloc;
250 spinlock_t lock;
251 struct mthca_array srq;
252 struct mthca_icm_table *table;
253};
254
255struct mthca_qp_table {
256 struct mthca_alloc alloc;
257 u32 rdb_base;
258 int rdb_shift;
259 int sqp_start;
260 spinlock_t lock;
261 struct mthca_array qp;
262 struct mthca_icm_table *qp_table;
263 struct mthca_icm_table *eqp_table;
264 struct mthca_icm_table *rdb_table;
265};
266
267struct mthca_av_table {
268 struct pci_pool *pool;
269 int num_ddr_avs;
270 u64 ddr_av_base;
271 void __iomem *av_map;
272 struct mthca_alloc alloc;
273};
274
275struct mthca_mcg_table {
276 struct mutex mutex;
277 struct mthca_alloc alloc;
278 struct mthca_icm_table *table;
279};
280
281struct mthca_catas_err {
282 u64 addr;
283 u32 __iomem *map;
284 unsigned long stop;
285 u32 size;
286 struct timer_list timer;
287 struct list_head list;
288};
289
290extern struct mutex mthca_device_mutex;
291
292struct mthca_dev {
293 struct ib_device ib_dev;
294 struct pci_dev *pdev;
295
296 int hca_type;
297 unsigned long mthca_flags;
298 unsigned long device_cap_flags;
299
300 u32 rev_id;
301 char board_id[MTHCA_BOARD_ID_LEN];
302
303
304 u64 fw_ver;
305 union {
306 struct {
307 u64 fw_start;
308 u64 fw_end;
309 } tavor;
310 struct {
311 u64 clr_int_base;
312 u64 eq_arm_base;
313 u64 eq_set_ci_base;
314 struct mthca_icm *fw_icm;
315 struct mthca_icm *aux_icm;
316 u16 fw_pages;
317 } arbel;
318 } fw;
319
320 u64 ddr_start;
321 u64 ddr_end;
322
323 MTHCA_DECLARE_DOORBELL_LOCK(doorbell_lock)
324 struct mutex cap_mask_mutex;
325
326 void __iomem *hcr;
327 void __iomem *kar;
328 void __iomem *clr_base;
329 union {
330 struct {
331 void __iomem *ecr_base;
332 } tavor;
333 struct {
334 void __iomem *eq_arm;
335 void __iomem *eq_set_ci_base;
336 } arbel;
337 } eq_regs;
338
339 struct mthca_cmd cmd;
340 struct mthca_limits limits;
341
342 struct mthca_uar_table uar_table;
343 struct mthca_pd_table pd_table;
344 struct mthca_mr_table mr_table;
345 struct mthca_eq_table eq_table;
346 struct mthca_cq_table cq_table;
347 struct mthca_srq_table srq_table;
348 struct mthca_qp_table qp_table;
349 struct mthca_av_table av_table;
350 struct mthca_mcg_table mcg_table;
351
352 struct mthca_catas_err catas_err;
353
354 struct mthca_uar driver_uar;
355 struct mthca_db_table *db_tab;
356 struct mthca_pd driver_pd;
357 struct mthca_mr driver_mr;
358
359 struct ib_mad_agent *send_agent[MTHCA_MAX_PORTS][2];
360 struct ib_ah *sm_ah[MTHCA_MAX_PORTS];
361 spinlock_t sm_lock;
362 u8 rate[MTHCA_MAX_PORTS];
363};
364
365#ifdef CONFIG_INFINIBAND_MTHCA_DEBUG
366extern int mthca_debug_level;
367
368#define mthca_dbg(mdev, format, arg...) \
369 do { \
370 if (mthca_debug_level) \
371 dev_printk(KERN_DEBUG, &mdev->pdev->dev, format, ## arg); \
372 } while (0)
373
374#else
375
376#define mthca_dbg(mdev, format, arg...) do { (void) mdev; } while (0)
377
378#endif
379
380#define mthca_err(mdev, format, arg...) \
381 dev_err(&mdev->pdev->dev, format, ## arg)
382#define mthca_info(mdev, format, arg...) \
383 dev_info(&mdev->pdev->dev, format, ## arg)
384#define mthca_warn(mdev, format, arg...) \
385 dev_warn(&mdev->pdev->dev, format, ## arg)
386
387extern void __buggy_use_of_MTHCA_GET(void);
388extern void __buggy_use_of_MTHCA_PUT(void);
389
390#define MTHCA_GET(dest, source, offset) \
391 do { \
392 void *__p = (char *) (source) + (offset); \
393 switch (sizeof (dest)) { \
394 case 1: (dest) = *(u8 *) __p; break; \
395 case 2: (dest) = be16_to_cpup(__p); break; \
396 case 4: (dest) = be32_to_cpup(__p); break; \
397 case 8: (dest) = be64_to_cpup(__p); break; \
398 default: __buggy_use_of_MTHCA_GET(); \
399 } \
400 } while (0)
401
402#define MTHCA_PUT(dest, source, offset) \
403 do { \
404 void *__d = ((char *) (dest) + (offset)); \
405 switch (sizeof(source)) { \
406 case 1: *(u8 *) __d = (source); break; \
407 case 2: *(__be16 *) __d = cpu_to_be16(source); break; \
408 case 4: *(__be32 *) __d = cpu_to_be32(source); break; \
409 case 8: *(__be64 *) __d = cpu_to_be64(source); break; \
410 default: __buggy_use_of_MTHCA_PUT(); \
411 } \
412 } while (0)
413
414int mthca_reset(struct mthca_dev *mdev);
415
416u32 mthca_alloc(struct mthca_alloc *alloc);
417void mthca_free(struct mthca_alloc *alloc, u32 obj);
418int mthca_alloc_init(struct mthca_alloc *alloc, u32 num, u32 mask,
419 u32 reserved);
420void mthca_alloc_cleanup(struct mthca_alloc *alloc);
421void *mthca_array_get(struct mthca_array *array, int index);
422int mthca_array_set(struct mthca_array *array, int index, void *value);
423void mthca_array_clear(struct mthca_array *array, int index);
424int mthca_array_init(struct mthca_array *array, int nent);
425void mthca_array_cleanup(struct mthca_array *array, int nent);
426int mthca_buf_alloc(struct mthca_dev *dev, int size, int max_direct,
427 union mthca_buf *buf, int *is_direct, struct mthca_pd *pd,
428 int hca_write, struct mthca_mr *mr);
429void mthca_buf_free(struct mthca_dev *dev, int size, union mthca_buf *buf,
430 int is_direct, struct mthca_mr *mr);
431
432int mthca_init_uar_table(struct mthca_dev *dev);
433int mthca_init_pd_table(struct mthca_dev *dev);
434int mthca_init_mr_table(struct mthca_dev *dev);
435int mthca_init_eq_table(struct mthca_dev *dev);
436int mthca_init_cq_table(struct mthca_dev *dev);
437int mthca_init_srq_table(struct mthca_dev *dev);
438int mthca_init_qp_table(struct mthca_dev *dev);
439int mthca_init_av_table(struct mthca_dev *dev);
440int mthca_init_mcg_table(struct mthca_dev *dev);
441
442void mthca_cleanup_uar_table(struct mthca_dev *dev);
443void mthca_cleanup_pd_table(struct mthca_dev *dev);
444void mthca_cleanup_mr_table(struct mthca_dev *dev);
445void mthca_cleanup_eq_table(struct mthca_dev *dev);
446void mthca_cleanup_cq_table(struct mthca_dev *dev);
447void mthca_cleanup_srq_table(struct mthca_dev *dev);
448void mthca_cleanup_qp_table(struct mthca_dev *dev);
449void mthca_cleanup_av_table(struct mthca_dev *dev);
450void mthca_cleanup_mcg_table(struct mthca_dev *dev);
451
452int mthca_register_device(struct mthca_dev *dev);
453void mthca_unregister_device(struct mthca_dev *dev);
454
455void mthca_start_catas_poll(struct mthca_dev *dev);
456void mthca_stop_catas_poll(struct mthca_dev *dev);
457int __mthca_restart_one(struct pci_dev *pdev);
458int mthca_catas_init(void);
459void mthca_catas_cleanup(void);
460
461int mthca_uar_alloc(struct mthca_dev *dev, struct mthca_uar *uar);
462void mthca_uar_free(struct mthca_dev *dev, struct mthca_uar *uar);
463
464int mthca_pd_alloc(struct mthca_dev *dev, int privileged, struct mthca_pd *pd);
465void mthca_pd_free(struct mthca_dev *dev, struct mthca_pd *pd);
466
467int mthca_write_mtt_size(struct mthca_dev *dev);
468
469struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size);
470void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt);
471int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
472 int start_index, u64 *buffer_list, int list_len);
473int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
474 u64 iova, u64 total_size, u32 access, struct mthca_mr *mr);
475int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
476 u32 access, struct mthca_mr *mr);
477int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
478 u64 *buffer_list, int buffer_size_shift,
479 int list_len, u64 iova, u64 total_size,
480 u32 access, struct mthca_mr *mr);
481void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr);
482
483int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
484 u32 access, struct mthca_fmr *fmr);
485int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
486 int list_len, u64 iova);
487void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
488int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
489 int list_len, u64 iova);
490void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
491int mthca_free_fmr(struct mthca_dev *dev, struct mthca_fmr *fmr);
492
493int mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt);
494void mthca_unmap_eq_icm(struct mthca_dev *dev);
495
496int mthca_poll_cq(struct ib_cq *ibcq, int num_entries,
497 struct ib_wc *entry);
498int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
499int mthca_arbel_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
500int mthca_init_cq(struct mthca_dev *dev, int nent,
501 struct mthca_ucontext *ctx, u32 pdn,
502 struct mthca_cq *cq);
503void mthca_free_cq(struct mthca_dev *dev,
504 struct mthca_cq *cq);
505void mthca_cq_completion(struct mthca_dev *dev, u32 cqn);
506void mthca_cq_event(struct mthca_dev *dev, u32 cqn,
507 enum ib_event_type event_type);
508void mthca_cq_clean(struct mthca_dev *dev, struct mthca_cq *cq, u32 qpn,
509 struct mthca_srq *srq);
510void mthca_cq_resize_copy_cqes(struct mthca_cq *cq);
511int mthca_alloc_cq_buf(struct mthca_dev *dev, struct mthca_cq_buf *buf, int nent);
512void mthca_free_cq_buf(struct mthca_dev *dev, struct mthca_cq_buf *buf, int cqe);
513
514int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd,
515 struct ib_srq_attr *attr, struct mthca_srq *srq);
516void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq);
517int mthca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
518 enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
519int mthca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
520int mthca_max_srq_sge(struct mthca_dev *dev);
521void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
522 enum ib_event_type event_type);
523void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr);
524int mthca_tavor_post_srq_recv(struct ib_srq *srq, struct ib_recv_wr *wr,
525 struct ib_recv_wr **bad_wr);
526int mthca_arbel_post_srq_recv(struct ib_srq *srq, struct ib_recv_wr *wr,
527 struct ib_recv_wr **bad_wr);
528
529void mthca_qp_event(struct mthca_dev *dev, u32 qpn,
530 enum ib_event_type event_type);
531int mthca_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
532 struct ib_qp_init_attr *qp_init_attr);
533int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
534 struct ib_udata *udata);
535int mthca_tavor_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
536 struct ib_send_wr **bad_wr);
537int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
538 struct ib_recv_wr **bad_wr);
539int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
540 struct ib_send_wr **bad_wr);
541int mthca_arbel_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
542 struct ib_recv_wr **bad_wr);
543void mthca_free_err_wqe(struct mthca_dev *dev, struct mthca_qp *qp, int is_send,
544 int index, int *dbd, __be32 *new_wqe);
545int mthca_alloc_qp(struct mthca_dev *dev,
546 struct mthca_pd *pd,
547 struct mthca_cq *send_cq,
548 struct mthca_cq *recv_cq,
549 enum ib_qp_type type,
550 enum ib_sig_type send_policy,
551 struct ib_qp_cap *cap,
552 struct mthca_qp *qp);
553int mthca_alloc_sqp(struct mthca_dev *dev,
554 struct mthca_pd *pd,
555 struct mthca_cq *send_cq,
556 struct mthca_cq *recv_cq,
557 enum ib_sig_type send_policy,
558 struct ib_qp_cap *cap,
559 int qpn,
560 int port,
561 struct mthca_sqp *sqp);
562void mthca_free_qp(struct mthca_dev *dev, struct mthca_qp *qp);
563int mthca_create_ah(struct mthca_dev *dev,
564 struct mthca_pd *pd,
565 struct ib_ah_attr *ah_attr,
566 struct mthca_ah *ah);
567int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah *ah);
568int mthca_read_ah(struct mthca_dev *dev, struct mthca_ah *ah,
569 struct ib_ud_header *header);
570int mthca_ah_query(struct ib_ah *ibah, struct ib_ah_attr *attr);
571int mthca_ah_grh_present(struct mthca_ah *ah);
572u8 mthca_get_rate(struct mthca_dev *dev, int static_rate, u8 port);
573enum ib_rate mthca_rate_to_ib(struct mthca_dev *dev, u8 mthca_rate, u8 port);
574
575int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
576int mthca_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
577
578int mthca_process_mad(struct ib_device *ibdev,
579 int mad_flags,
580 u8 port_num,
581 struct ib_wc *in_wc,
582 struct ib_grh *in_grh,
583 struct ib_mad *in_mad,
584 struct ib_mad *out_mad);
585int mthca_create_agents(struct mthca_dev *dev);
586void mthca_free_agents(struct mthca_dev *dev);
587
588static inline struct mthca_dev *to_mdev(struct ib_device *ibdev)
589{
590 return container_of(ibdev, struct mthca_dev, ib_dev);
591}
592
593static inline int mthca_is_memfree(struct mthca_dev *dev)
594{
595 return dev->mthca_flags & MTHCA_FLAG_MEMFREE;
596}
597
598#endif
599
