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17#include <linux/module.h>
18#include <linux/kernel.h>
19#include <linux/sched.h>
20#include <linux/string.h>
21#include <linux/timer.h>
22#include <linux/delay.h>
23#include <linux/errno.h>
24#include <linux/slab.h>
25#include <linux/videodev.h>
26#include <linux/i2c.h>
27#include <linux/init.h>
28#include <linux/kthread.h>
29#include <linux/freezer.h>
30
31#include <media/tvaudio.h>
32#include <media/v4l2-common.h>
33#include <media/v4l2-chip-ident.h>
34
35#include <media/i2c-addr.h>
36
37
38
39
40static int debug = 0;
41module_param(debug, int, 0644);
42
43MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
44MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
45MODULE_LICENSE("GPL");
46
47#define UNSET (-1U)
48
49
50
51
52#define MAXREGS 64
53
54struct CHIPSTATE;
55typedef int (*getvalue)(int);
56typedef int (*checkit)(struct CHIPSTATE*);
57typedef int (*initialize)(struct CHIPSTATE*);
58typedef int (*getmode)(struct CHIPSTATE*);
59typedef void (*setmode)(struct CHIPSTATE*, int mode);
60typedef void (*checkmode)(struct CHIPSTATE*);
61
62
63typedef struct AUDIOCMD {
64 int count;
65 unsigned char bytes[MAXREGS+1];
66} audiocmd;
67
68
69struct CHIPDESC {
70 char *name;
71 int id;
72 int addr_lo, addr_hi;
73 int registers;
74
75 int *insmodopt;
76 checkit checkit;
77 initialize initialize;
78 int flags;
79#define CHIP_HAS_VOLUME 1
80#define CHIP_HAS_BASSTREBLE 2
81#define CHIP_HAS_INPUTSEL 4
82
83
84 audiocmd init;
85
86
87 int leftreg,rightreg,treblereg,bassreg;
88
89
90 int leftinit,rightinit,trebleinit,bassinit;
91
92
93 getvalue volfunc,treblefunc,bassfunc;
94
95
96 getmode getmode;
97 setmode setmode;
98
99
100 checkmode checkmode;
101
102
103 int inputreg;
104 int inputmap[4];
105 int inputmute;
106 int inputmask;
107};
108static struct CHIPDESC chiplist[];
109
110
111struct CHIPSTATE {
112 struct i2c_client c;
113
114
115 int type;
116
117
118 audiocmd shadow;
119
120
121 __u16 left,right,treble,bass,muted,mode;
122 int prevmode;
123 int radio;
124 int input;
125
126
127 struct task_struct *thread;
128 struct timer_list wt;
129 int watch_stereo;
130 int audmode;
131};
132
133
134
135
136static unsigned short normal_i2c[] = {
137 I2C_ADDR_TDA8425 >> 1,
138 I2C_ADDR_TEA6300 >> 1,
139 I2C_ADDR_TEA6420 >> 1,
140 I2C_ADDR_TDA9840 >> 1,
141 I2C_ADDR_TDA985x_L >> 1,
142 I2C_ADDR_TDA985x_H >> 1,
143 I2C_ADDR_TDA9874 >> 1,
144 I2C_ADDR_PIC16C54 >> 1,
145 I2C_CLIENT_END };
146I2C_CLIENT_INSMOD;
147
148static struct i2c_driver driver;
149static struct i2c_client client_template;
150
151
152
153
154
155static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
156{
157 unsigned char buffer[2];
158
159 if (-1 == subaddr) {
160 v4l_dbg(1, debug, &chip->c, "%s: chip_write: 0x%x\n",
161 chip->c.name, val);
162 chip->shadow.bytes[1] = val;
163 buffer[0] = val;
164 if (1 != i2c_master_send(&chip->c,buffer,1)) {
165 v4l_warn(&chip->c, "%s: I/O error (write 0x%x)\n",
166 chip->c.name, val);
167 return -1;
168 }
169 } else {
170 v4l_dbg(1, debug, &chip->c, "%s: chip_write: reg%d=0x%x\n",
171 chip->c.name, subaddr, val);
172 chip->shadow.bytes[subaddr+1] = val;
173 buffer[0] = subaddr;
174 buffer[1] = val;
175 if (2 != i2c_master_send(&chip->c,buffer,2)) {
176 v4l_warn(&chip->c, "%s: I/O error (write reg%d=0x%x)\n",
177 chip->c.name, subaddr, val);
178 return -1;
179 }
180 }
181 return 0;
182}
183
184static int chip_write_masked(struct CHIPSTATE *chip, int subaddr, int val, int mask)
185{
186 if (mask != 0) {
187 if (-1 == subaddr) {
188 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
189 } else {
190 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
191 }
192 }
193 return chip_write(chip, subaddr, val);
194}
195
196static int chip_read(struct CHIPSTATE *chip)
197{
198 unsigned char buffer;
199
200 if (1 != i2c_master_recv(&chip->c,&buffer,1)) {
201 v4l_warn(&chip->c, "%s: I/O error (read)\n",
202 chip->c.name);
203 return -1;
204 }
205 v4l_dbg(1, debug, &chip->c, "%s: chip_read: 0x%x\n",chip->c.name, buffer);
206 return buffer;
207}
208
209static int chip_read2(struct CHIPSTATE *chip, int subaddr)
210{
211 unsigned char write[1];
212 unsigned char read[1];
213 struct i2c_msg msgs[2] = {
214 { chip->c.addr, 0, 1, write },
215 { chip->c.addr, I2C_M_RD, 1, read }
216 };
217 write[0] = subaddr;
218
219 if (2 != i2c_transfer(chip->c.adapter,msgs,2)) {
220 v4l_warn(&chip->c, "%s: I/O error (read2)\n", chip->c.name);
221 return -1;
222 }
223 v4l_dbg(1, debug, &chip->c, "%s: chip_read2: reg%d=0x%x\n",
224 chip->c.name, subaddr,read[0]);
225 return read[0];
226}
227
228static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
229{
230 int i;
231
232 if (0 == cmd->count)
233 return 0;
234
235
236 v4l_dbg(1, debug, &chip->c, "%s: chip_cmd(%s): reg=%d, data:",
237 chip->c.name, name,cmd->bytes[0]);
238 for (i = 1; i < cmd->count; i++) {
239 if (debug)
240 printk(" 0x%x",cmd->bytes[i]);
241 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
242 }
243 if (debug)
244 printk("\n");
245
246
247 if (cmd->count != i2c_master_send(&chip->c,cmd->bytes,cmd->count)) {
248 v4l_warn(&chip->c, "%s: I/O error (%s)\n", chip->c.name, name);
249 return -1;
250 }
251 return 0;
252}
253
254
255
256
257
258
259
260
261static void chip_thread_wake(unsigned long data)
262{
263 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
264 wake_up_process(chip->thread);
265}
266
267static int chip_thread(void *data)
268{
269 struct CHIPSTATE *chip = data;
270 struct CHIPDESC *desc = chiplist + chip->type;
271
272 v4l_dbg(1, debug, &chip->c, "%s: thread started\n", chip->c.name);
273 set_freezable();
274 for (;;) {
275 set_current_state(TASK_INTERRUPTIBLE);
276 if (!kthread_should_stop())
277 schedule();
278 set_current_state(TASK_RUNNING);
279 try_to_freeze();
280 if (kthread_should_stop())
281 break;
282 v4l_dbg(1, debug, &chip->c, "%s: thread wakeup\n", chip->c.name);
283
284
285 if (chip->radio || chip->mode != 0)
286 continue;
287
288
289 desc->checkmode(chip);
290
291
292 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
293 }
294
295 v4l_dbg(1, debug, &chip->c, "%s: thread exiting\n", chip->c.name);
296 return 0;
297}
298
299static void generic_checkmode(struct CHIPSTATE *chip)
300{
301 struct CHIPDESC *desc = chiplist + chip->type;
302 int mode = desc->getmode(chip);
303
304 if (mode == chip->prevmode)
305 return;
306
307 v4l_dbg(1, debug, &chip->c, "%s: thread checkmode\n", chip->c.name);
308 chip->prevmode = mode;
309
310 if (mode & VIDEO_SOUND_STEREO)
311 desc->setmode(chip,VIDEO_SOUND_STEREO);
312 else if (mode & VIDEO_SOUND_LANG1)
313 desc->setmode(chip,VIDEO_SOUND_LANG1);
314 else if (mode & VIDEO_SOUND_LANG2)
315 desc->setmode(chip,VIDEO_SOUND_LANG2);
316 else
317 desc->setmode(chip,VIDEO_SOUND_MONO);
318}
319
320
321
322
323#define TDA9840_SW 0x00
324#define TDA9840_LVADJ 0x02
325#define TDA9840_STADJ 0x03
326#define TDA9840_TEST 0x04
327
328#define TDA9840_MONO 0x10
329#define TDA9840_STEREO 0x2a
330#define TDA9840_DUALA 0x12
331#define TDA9840_DUALB 0x1e
332#define TDA9840_DUALAB 0x1a
333#define TDA9840_DUALBA 0x16
334#define TDA9840_EXTERNAL 0x7a
335
336#define TDA9840_DS_DUAL 0x20
337#define TDA9840_ST_STEREO 0x40
338#define TDA9840_PONRES 0x80
339
340#define TDA9840_TEST_INT1SN 0x1
341#define TDA9840_TEST_INTFU 0x02
342
343static int tda9840_getmode(struct CHIPSTATE *chip)
344{
345 int val, mode;
346
347 val = chip_read(chip);
348 mode = VIDEO_SOUND_MONO;
349 if (val & TDA9840_DS_DUAL)
350 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
351 if (val & TDA9840_ST_STEREO)
352 mode |= VIDEO_SOUND_STEREO;
353
354 v4l_dbg(1, debug, &chip->c, "tda9840_getmode(): raw chip read: %d, return: %d\n",
355 val, mode);
356 return mode;
357}
358
359static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
360{
361 int update = 1;
362 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
363
364 switch (mode) {
365 case VIDEO_SOUND_MONO:
366 t |= TDA9840_MONO;
367 break;
368 case VIDEO_SOUND_STEREO:
369 t |= TDA9840_STEREO;
370 break;
371 case VIDEO_SOUND_LANG1:
372 t |= TDA9840_DUALA;
373 break;
374 case VIDEO_SOUND_LANG2:
375 t |= TDA9840_DUALB;
376 break;
377 default:
378 update = 0;
379 }
380
381 if (update)
382 chip_write(chip, TDA9840_SW, t);
383}
384
385static int tda9840_checkit(struct CHIPSTATE *chip)
386{
387 int rc;
388 rc = chip_read(chip);
389
390 return ((rc & 0x1f) == 0) ? 1 : 0;
391}
392
393
394
395
396
397#define TDA9855_VR 0x00
398#define TDA9855_VL 0x01
399#define TDA9855_BA 0x02
400#define TDA9855_TR 0x03
401#define TDA9855_SW 0x04
402
403
404#define TDA9850_C4 0x04
405
406
407#define TDA985x_C5 0x05
408#define TDA985x_C6 0x06
409#define TDA985x_C7 0x07
410#define TDA985x_A1 0x08
411#define TDA985x_A2 0x09
412#define TDA985x_A3 0x0a
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442
443#define TDA9855_MUTE 1<<7
444#define TDA9855_AVL 1<<6
445#define TDA9855_LOUD 1<<5
446#define TDA9855_SUR 1<<3
447
448
449
450#define TDA9855_EXT 1<<2
451#define TDA9855_INT 0
452
453
454
455
456
457
458
459
460#define TDA985x_SAP 3<<6
461#define TDA985x_STEREO 1<<6
462#define TDA985x_MONO 0
463#define TDA985x_LMU 1<<3
464
465
466#define TDA9855_TZCM 1<<5
467#define TDA9855_VZCM 1<<4
468#define TDA9855_LINEAR 0
469#define TDA9855_PSEUDO 1
470#define TDA9855_SPAT_30 2
471#define TDA9855_SPAT_50 3
472#define TDA9855_E_MONO 7
473
474
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477
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481
482
483#define TDA985x_STP 1<<5
484#define TDA985x_SAPP 1<<6
485#define TDA985x_STS 1<<7
486
487
488
489
490
491#define TDA985x_ADJ 1<<7
492
493static int tda9855_volume(int val) { return val/0x2e8+0x27; }
494static int tda9855_bass(int val) { return val/0xccc+0x06; }
495static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
496
497static int tda985x_getmode(struct CHIPSTATE *chip)
498{
499 int mode;
500
501 mode = ((TDA985x_STP | TDA985x_SAPP) &
502 chip_read(chip)) >> 4;
503
504
505 return mode | VIDEO_SOUND_MONO;
506}
507
508static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
509{
510 int update = 1;
511 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
512
513 switch (mode) {
514 case VIDEO_SOUND_MONO:
515 c6 |= TDA985x_MONO;
516 break;
517 case VIDEO_SOUND_STEREO:
518 c6 |= TDA985x_STEREO;
519 break;
520 case VIDEO_SOUND_LANG1:
521 c6 |= TDA985x_SAP;
522 break;
523 default:
524 update = 0;
525 }
526 if (update)
527 chip_write(chip,TDA985x_C6,c6);
528}
529
530
531
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534
535
536#define TDA9873_SW 0x00
537#define TDA9873_AD 0x01
538#define TDA9873_PT 0x02
539
540
541
542
543
544
545
546
547
548#define TDA9873_INP_MASK 3
549#define TDA9873_INTERNAL 0
550#define TDA9873_EXT_STEREO 2
551#define TDA9873_EXT_MONO 1
552
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563
564#define TDA9873_TR_MASK (7 << 2)
565#define TDA9873_TR_MONO 4
566#define TDA9873_TR_STEREO 1 << 4
567#define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
568#define TDA9873_TR_DUALA 1 << 2
569#define TDA9873_TR_DUALB 1 << 3
570
571
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575
576
577#define TDA9873_GAIN_NORMAL 1 << 5
578#define TDA9873_MUTE 1 << 6
579#define TDA9873_AUTOMUTE 1 << 7
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585
586
587#define TDA9873_STEREO_ADJ 0x06
588
589
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597
598#define TDA9873_BG 0
599#define TDA9873_M 1
600#define TDA9873_DK1 2
601#define TDA9873_DK2 3
602#define TDA9873_DK3 4
603#define TDA9873_I 5
604
605
606
607#define TDA9873_IDR_NORM 0
608#define TDA9873_IDR_FAST 1 << 7
609
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618
619
620#define TDA9873_PORTS 3
621
622
623#define TDA9873_TST_PORT 1 << 2
624
625
626
627
628
629
630
631
632#define TDA9873_MOUT_MONO 0
633#define TDA9873_MOUT_FMONO 0
634#define TDA9873_MOUT_DUALA 0
635#define TDA9873_MOUT_DUALB 1 << 3
636#define TDA9873_MOUT_ST 1 << 4
637#define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
638#define TDA9873_MOUT_EXTL 1 << 5
639#define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
640#define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
641#define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
642
643
644#define TDA9873_PONR 0
645#define TDA9873_STEREO 2
646#define TDA9873_DUAL 4
647
648static int tda9873_getmode(struct CHIPSTATE *chip)
649{
650 int val,mode;
651
652 val = chip_read(chip);
653 mode = VIDEO_SOUND_MONO;
654 if (val & TDA9873_STEREO)
655 mode |= VIDEO_SOUND_STEREO;
656 if (val & TDA9873_DUAL)
657 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
658 v4l_dbg(1, debug, &chip->c, "tda9873_getmode(): raw chip read: %d, return: %d\n",
659 val, mode);
660 return mode;
661}
662
663static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
664{
665 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
666
667
668 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
669 v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): external input\n");
670 return;
671 }
672
673 v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
674 v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): sw_data = %d\n", sw_data);
675
676 switch (mode) {
677 case VIDEO_SOUND_MONO:
678 sw_data |= TDA9873_TR_MONO;
679 break;
680 case VIDEO_SOUND_STEREO:
681 sw_data |= TDA9873_TR_STEREO;
682 break;
683 case VIDEO_SOUND_LANG1:
684 sw_data |= TDA9873_TR_DUALA;
685 break;
686 case VIDEO_SOUND_LANG2:
687 sw_data |= TDA9873_TR_DUALB;
688 break;
689 default:
690 chip->mode = 0;
691 return;
692 }
693
694 chip_write(chip, TDA9873_SW, sw_data);
695 v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
696 mode, sw_data);
697}
698
699static int tda9873_checkit(struct CHIPSTATE *chip)
700{
701 int rc;
702
703 if (-1 == (rc = chip_read2(chip,254)))
704 return 0;
705 return (rc & ~0x1f) == 0x80;
706}
707
708
709
710
711
712
713
714#define TDA9874A_AGCGR 0x00
715#define TDA9874A_GCONR 0x01
716#define TDA9874A_MSR 0x02
717#define TDA9874A_C1FRA 0x03
718#define TDA9874A_C1FRB 0x04
719#define TDA9874A_C1FRC 0x05
720#define TDA9874A_C2FRA 0x06
721#define TDA9874A_C2FRB 0x07
722#define TDA9874A_C2FRC 0x08
723#define TDA9874A_DCR 0x09
724#define TDA9874A_FMER 0x0a
725#define TDA9874A_FMMR 0x0b
726#define TDA9874A_C1OLAR 0x0c
727#define TDA9874A_C2OLAR 0x0d
728#define TDA9874A_NCONR 0x0e
729#define TDA9874A_NOLAR 0x0f
730#define TDA9874A_NLELR 0x10
731#define TDA9874A_NUELR 0x11
732#define TDA9874A_AMCONR 0x12
733#define TDA9874A_SDACOSR 0x13
734#define TDA9874A_AOSR 0x14
735#define TDA9874A_DAICONR 0x15
736#define TDA9874A_I2SOSR 0x16
737#define TDA9874A_I2SOLAR 0x17
738#define TDA9874A_MDACOSR 0x18
739#define TDA9874A_ESP 0xFF
740
741
742#define TDA9874A_DSR 0x00
743#define TDA9874A_NSR 0x01
744#define TDA9874A_NECR 0x02
745#define TDA9874A_DR1 0x03
746#define TDA9874A_DR2 0x04
747#define TDA9874A_LLRA 0x05
748#define TDA9874A_LLRB 0x06
749#define TDA9874A_SIFLR 0x07
750#define TDA9874A_TR2 252
751#define TDA9874A_TR1 253
752#define TDA9874A_DIC 254
753#define TDA9874A_SIC 255
754
755
756static int tda9874a_mode = 1;
757static int tda9874a_GCONR = 0xc0;
758static int tda9874a_NCONR = 0x01;
759static int tda9874a_ESP = 0x07;
760static int tda9874a_dic = -1;
761
762
763static unsigned int tda9874a_SIF = UNSET;
764static unsigned int tda9874a_AMSEL = UNSET;
765static unsigned int tda9874a_STD = UNSET;
766module_param(tda9874a_SIF, int, 0444);
767module_param(tda9874a_AMSEL, int, 0444);
768module_param(tda9874a_STD, int, 0444);
769
770
771
772
773
774
775
776
777
778static struct tda9874a_MODES {
779 char *name;
780 audiocmd cmd;
781} tda9874a_modelist[9] = {
782 { "A2, B/G",
783 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
784 { "A2, M (Korea)",
785 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
786 { "A2, D/K (1)",
787 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
788 { "A2, D/K (2)",
789 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
790 { "A2, D/K (3)",
791 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
792 { "NICAM, I",
793 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
794 { "NICAM, B/G",
795 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
796 { "NICAM, D/K",
797 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
798 { "NICAM, L",
799 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
800};
801
802static int tda9874a_setup(struct CHIPSTATE *chip)
803{
804 chip_write(chip, TDA9874A_AGCGR, 0x00);
805 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
806 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
807 if(tda9874a_dic == 0x11) {
808 chip_write(chip, TDA9874A_FMMR, 0x80);
809 } else {
810 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
811 chip_write(chip, TDA9874A_FMMR, 0x00);
812 }
813 chip_write(chip, TDA9874A_C1OLAR, 0x00);
814 chip_write(chip, TDA9874A_C2OLAR, 0x00);
815 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
816 chip_write(chip, TDA9874A_NOLAR, 0x00);
817
818
819
820 chip_write(chip, TDA9874A_NLELR, 0x14);
821 chip_write(chip, TDA9874A_NUELR, 0x50);
822
823 if(tda9874a_dic == 0x11) {
824 chip_write(chip, TDA9874A_AMCONR, 0xf9);
825 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
826 chip_write(chip, TDA9874A_AOSR, 0x80);
827 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
828 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
829 } else {
830 chip_write(chip, TDA9874A_AMCONR, 0xfb);
831 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
832 chip_write(chip, TDA9874A_AOSR, 0x00);
833 }
834 v4l_dbg(1, debug, &chip->c, "tda9874a_setup(): %s [0x%02X].\n",
835 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
836 return 1;
837}
838
839static int tda9874a_getmode(struct CHIPSTATE *chip)
840{
841 int dsr,nsr,mode;
842 int necr;
843
844 mode = VIDEO_SOUND_MONO;
845
846 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
847 return mode;
848 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
849 return mode;
850 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
851 return mode;
852
853
854 chip->shadow.bytes[MAXREGS-2] = dsr;
855 chip->shadow.bytes[MAXREGS-1] = nsr;
856
857 if(tda9874a_mode) {
858
859
860
861
862
863
864
865
866 if(nsr & 0x02)
867 mode |= VIDEO_SOUND_STEREO;
868 if(nsr & 0x01)
869 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
870 } else {
871 if(dsr & 0x02)
872 mode |= VIDEO_SOUND_STEREO;
873 if(dsr & 0x04)
874 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
875 }
876
877 v4l_dbg(1, debug, &chip->c, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
878 dsr, nsr, necr, mode);
879 return mode;
880}
881
882static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
883{
884
885
886 if(tda9874a_mode) {
887 if(chip->shadow.bytes[MAXREGS-2] & 0x20)
888 tda9874a_NCONR &= 0xfe;
889 else
890 tda9874a_NCONR |= 0x01;
891 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
892 }
893
894
895
896
897
898
899
900 if(tda9874a_dic == 0x11) {
901 int aosr = 0x80;
902 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
903
904 switch(mode) {
905 case VIDEO_SOUND_MONO:
906 case VIDEO_SOUND_STEREO:
907 break;
908 case VIDEO_SOUND_LANG1:
909 aosr = 0x80;
910 mdacosr = (tda9874a_mode) ? 0x82:0x80;
911 break;
912 case VIDEO_SOUND_LANG2:
913 aosr = 0xa0;
914 mdacosr = (tda9874a_mode) ? 0x83:0x81;
915 break;
916 default:
917 chip->mode = 0;
918 return;
919 }
920 chip_write(chip, TDA9874A_AOSR, aosr);
921 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
922
923 v4l_dbg(1, debug, &chip->c, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
924 mode, aosr, mdacosr);
925
926 } else {
927 int fmmr,aosr;
928
929 switch(mode) {
930 case VIDEO_SOUND_MONO:
931 fmmr = 0x00;
932 aosr = 0x10;
933 break;
934 case VIDEO_SOUND_STEREO:
935 if(tda9874a_mode) {
936 fmmr = 0x00;
937 aosr = 0x00;
938 } else {
939 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04;
940 aosr = 0x00;
941 }
942 break;
943 case VIDEO_SOUND_LANG1:
944 fmmr = 0x02;
945 aosr = 0x10;
946 break;
947 case VIDEO_SOUND_LANG2:
948 fmmr = 0x02;
949 aosr = 0x20;
950 break;
951 default:
952 chip->mode = 0;
953 return;
954 }
955 chip_write(chip, TDA9874A_FMMR, fmmr);
956 chip_write(chip, TDA9874A_AOSR, aosr);
957
958 v4l_dbg(1, debug, &chip->c, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
959 mode, fmmr, aosr);
960 }
961}
962
963static int tda9874a_checkit(struct CHIPSTATE *chip)
964{
965 int dic,sic;
966
967 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
968 return 0;
969 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
970 return 0;
971
972 v4l_dbg(1, debug, &chip->c, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
973
974 if((dic == 0x11)||(dic == 0x07)) {
975 v4l_info(&chip->c, "found tda9874%s.\n", (dic == 0x11) ? "a":"h");
976 tda9874a_dic = dic;
977 return 1;
978 }
979 return 0;
980}
981
982static int tda9874a_initialize(struct CHIPSTATE *chip)
983{
984 if (tda9874a_SIF > 2)
985 tda9874a_SIF = 1;
986 if (tda9874a_STD > 8)
987 tda9874a_STD = 0;
988 if(tda9874a_AMSEL > 1)
989 tda9874a_AMSEL = 0;
990
991 if(tda9874a_SIF == 1)
992 tda9874a_GCONR = 0xc0;
993 else
994 tda9874a_GCONR = 0xc1;
995
996 tda9874a_ESP = tda9874a_STD;
997 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
998
999 if(tda9874a_AMSEL == 0)
1000 tda9874a_NCONR = 0x01;
1001 else
1002 tda9874a_NCONR = 0x05;
1003
1004 tda9874a_setup(chip);
1005 return 0;
1006}
1007
1008
1009
1010
1011
1012#define TEA6300_VL 0x00
1013#define TEA6300_VR 0x01
1014#define TEA6300_BA 0x02
1015#define TEA6300_TR 0x03
1016#define TEA6300_FA 0x04
1017#define TEA6300_S 0x05
1018
1019#define TEA6300_S_SA 0x01
1020#define TEA6300_S_SB 0x02
1021#define TEA6300_S_SC 0x04
1022#define TEA6300_S_GMU 0x80
1023
1024#define TEA6320_V 0x00
1025#define TEA6320_FFR 0x01
1026#define TEA6320_FFL 0x02
1027#define TEA6320_FRR 0x03
1028#define TEA6320_FRL 0x04
1029#define TEA6320_BA 0x05
1030#define TEA6320_TR 0x06
1031#define TEA6320_S 0x07
1032
1033#define TEA6320_S_SA 0x07
1034#define TEA6320_S_SB 0x06
1035#define TEA6320_S_SC 0x05
1036#define TEA6320_S_SD 0x04
1037#define TEA6320_S_GMU 0x80
1038
1039#define TEA6420_S_SA 0x00
1040#define TEA6420_S_SB 0x01
1041#define TEA6420_S_SC 0x02
1042#define TEA6420_S_SD 0x03
1043#define TEA6420_S_SE 0x04
1044#define TEA6420_S_GMU 0x05
1045
1046static int tea6300_shift10(int val) { return val >> 10; }
1047static int tea6300_shift12(int val) { return val >> 12; }
1048
1049
1050
1051static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1052static int tea6320_shift11(int val) { return val >> 11; }
1053static int tea6320_initialize(struct CHIPSTATE * chip)
1054{
1055 chip_write(chip, TEA6320_FFR, 0x3f);
1056 chip_write(chip, TEA6320_FFL, 0x3f);
1057 chip_write(chip, TEA6320_FRR, 0x3f);
1058 chip_write(chip, TEA6320_FRL, 0x3f);
1059
1060 return 0;
1061}
1062
1063
1064
1065
1066
1067#define TDA8425_VL 0x00
1068#define TDA8425_VR 0x01
1069#define TDA8425_BA 0x02
1070#define TDA8425_TR 0x03
1071#define TDA8425_S1 0x08
1072
1073#define TDA8425_S1_OFF 0xEE
1074#define TDA8425_S1_CH1 0xCE
1075#define TDA8425_S1_CH2 0xCF
1076#define TDA8425_S1_MU 0x20
1077#define TDA8425_S1_STEREO 0x18
1078#define TDA8425_S1_STEREO_SPATIAL 0x18
1079#define TDA8425_S1_STEREO_LINEAR 0x08
1080#define TDA8425_S1_STEREO_PSEUDO 0x10
1081#define TDA8425_S1_STEREO_MONO 0x00
1082#define TDA8425_S1_ML 0x06
1083#define TDA8425_S1_ML_SOUND_A 0x02
1084#define TDA8425_S1_ML_SOUND_B 0x04
1085#define TDA8425_S1_ML_STEREO 0x06
1086#define TDA8425_S1_IS 0x01
1087
1088
1089static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1090static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1091
1092static int tda8425_initialize(struct CHIPSTATE *chip)
1093{
1094 struct CHIPDESC *desc = chiplist + chip->type;
1095 int inputmap[4] = { TDA8425_S1_CH2, TDA8425_S1_CH1,
1096 TDA8425_S1_CH1, TDA8425_S1_OFF};
1097
1098 if (chip->c.adapter->id == I2C_HW_B_RIVA) {
1099 memcpy (desc->inputmap, inputmap, sizeof (inputmap));
1100 }
1101 return 0;
1102}
1103
1104static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1105{
1106 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1107
1108 if (mode & VIDEO_SOUND_LANG1) {
1109 s1 |= TDA8425_S1_ML_SOUND_A;
1110 s1 |= TDA8425_S1_STEREO_PSEUDO;
1111
1112 } else if (mode & VIDEO_SOUND_LANG2) {
1113 s1 |= TDA8425_S1_ML_SOUND_B;
1114 s1 |= TDA8425_S1_STEREO_PSEUDO;
1115
1116 } else {
1117 s1 |= TDA8425_S1_ML_STEREO;
1118
1119 if (mode & VIDEO_SOUND_MONO)
1120 s1 |= TDA8425_S1_STEREO_MONO;
1121 if (mode & VIDEO_SOUND_STEREO)
1122 s1 |= TDA8425_S1_STEREO_SPATIAL;
1123 }
1124 chip_write(chip,TDA8425_S1,s1);
1125}
1126
1127
1128
1129
1130
1131
1132#define PIC16C54_REG_KEY_CODE 0x01
1133#define PIC16C54_REG_MISC 0x02
1134
1135
1136#define PIC16C54_MISC_RESET_REMOTE_CTL 0x01
1137
1138#define PIC16C54_MISC_MTS_MAIN 0x02
1139#define PIC16C54_MISC_MTS_SAP 0x04
1140#define PIC16C54_MISC_MTS_BOTH 0x08
1141#define PIC16C54_MISC_SND_MUTE 0x10
1142#define PIC16C54_MISC_SND_NOTMUTE 0x20
1143#define PIC16C54_MISC_SWITCH_TUNER 0x40
1144#define PIC16C54_MISC_SWITCH_LINE 0x80
1145
1146
1147
1148
1149
1150#define TA8874Z_LED_STE 0x80
1151#define TA8874Z_LED_BIL 0x40
1152#define TA8874Z_LED_EXT 0x20
1153#define TA8874Z_MONO_SET 0x10
1154#define TA8874Z_MUTE 0x08
1155#define TA8874Z_F_MONO 0x04
1156#define TA8874Z_MODE_SUB 0x02
1157#define TA8874Z_MODE_MAIN 0x01
1158
1159
1160
1161#define TA8874Z_SEPARATION 0x3f
1162#define TA8874Z_SEPARATION_DEFAULT 0x10
1163
1164
1165#define TA8874Z_B1 0x80
1166#define TA8874Z_B0 0x40
1167#define TA8874Z_CHAG_FLAG 0x20
1168
1169
1170
1171
1172
1173
1174
1175static int ta8874z_getmode(struct CHIPSTATE *chip)
1176{
1177 int val, mode;
1178
1179 val = chip_read(chip);
1180 mode = VIDEO_SOUND_MONO;
1181 if (val & TA8874Z_B1){
1182 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
1183 }else if (!(val & TA8874Z_B0)){
1184 mode |= VIDEO_SOUND_STEREO;
1185 }
1186
1187 return mode;
1188}
1189
1190static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1191static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1192static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1193static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1194
1195static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1196{
1197 int update = 1;
1198 audiocmd *t = NULL;
1199 v4l_dbg(1, debug, &chip->c, "ta8874z_setmode(): mode: 0x%02x\n", mode);
1200
1201 switch(mode){
1202 case VIDEO_SOUND_MONO:
1203 t = &ta8874z_mono;
1204 break;
1205 case VIDEO_SOUND_STEREO:
1206 t = &ta8874z_stereo;
1207 break;
1208 case VIDEO_SOUND_LANG1:
1209 t = &ta8874z_main;
1210 break;
1211 case VIDEO_SOUND_LANG2:
1212 t = &ta8874z_sub;
1213 break;
1214 default:
1215 update = 0;
1216 }
1217
1218 if(update)
1219 chip_cmd(chip, "TA8874Z", t);
1220}
1221
1222static int ta8874z_checkit(struct CHIPSTATE *chip)
1223{
1224 int rc;
1225 rc = chip_read(chip);
1226 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1227}
1228
1229
1230
1231
1232
1233static int tda8425 = 1;
1234static int tda9840 = 1;
1235static int tda9850 = 1;
1236static int tda9855 = 1;
1237static int tda9873 = 1;
1238static int tda9874a = 1;
1239static int tea6300 = 0;
1240static int tea6320 = 0;
1241static int tea6420 = 1;
1242static int pic16c54 = 1;
1243static int ta8874z = 0;
1244
1245module_param(tda8425, int, 0444);
1246module_param(tda9840, int, 0444);
1247module_param(tda9850, int, 0444);
1248module_param(tda9855, int, 0444);
1249module_param(tda9873, int, 0444);
1250module_param(tda9874a, int, 0444);
1251module_param(tea6300, int, 0444);
1252module_param(tea6320, int, 0444);
1253module_param(tea6420, int, 0444);
1254module_param(pic16c54, int, 0444);
1255module_param(ta8874z, int, 0444);
1256
1257static struct CHIPDESC chiplist[] = {
1258 {
1259 .name = "tda9840",
1260 .id = I2C_DRIVERID_TDA9840,
1261 .insmodopt = &tda9840,
1262 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1263 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1264 .registers = 5,
1265
1266 .checkit = tda9840_checkit,
1267 .getmode = tda9840_getmode,
1268 .setmode = tda9840_setmode,
1269 .checkmode = generic_checkmode,
1270
1271 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1272 } }
1273 },
1274 {
1275 .name = "tda9873h",
1276 .id = I2C_DRIVERID_TDA9873,
1277 .checkit = tda9873_checkit,
1278 .insmodopt = &tda9873,
1279 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1280 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1281 .registers = 3,
1282 .flags = CHIP_HAS_INPUTSEL,
1283
1284 .getmode = tda9873_getmode,
1285 .setmode = tda9873_setmode,
1286 .checkmode = generic_checkmode,
1287
1288 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1289 .inputreg = TDA9873_SW,
1290 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
1291 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1292 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1293
1294 },
1295 {
1296 .name = "tda9874h/a",
1297 .id = I2C_DRIVERID_TDA9874,
1298 .checkit = tda9874a_checkit,
1299 .initialize = tda9874a_initialize,
1300 .insmodopt = &tda9874a,
1301 .addr_lo = I2C_ADDR_TDA9874 >> 1,
1302 .addr_hi = I2C_ADDR_TDA9874 >> 1,
1303
1304 .getmode = tda9874a_getmode,
1305 .setmode = tda9874a_setmode,
1306 .checkmode = generic_checkmode,
1307 },
1308 {
1309 .name = "tda9850",
1310 .id = I2C_DRIVERID_TDA9850,
1311 .insmodopt = &tda9850,
1312 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1313 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1314 .registers = 11,
1315
1316 .getmode = tda985x_getmode,
1317 .setmode = tda985x_setmode,
1318
1319 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1320 },
1321 {
1322 .name = "tda9855",
1323 .id = I2C_DRIVERID_TDA9855,
1324 .insmodopt = &tda9855,
1325 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1326 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1327 .registers = 11,
1328 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1329
1330 .leftreg = TDA9855_VL,
1331 .rightreg = TDA9855_VR,
1332 .bassreg = TDA9855_BA,
1333 .treblereg = TDA9855_TR,
1334 .volfunc = tda9855_volume,
1335 .bassfunc = tda9855_bass,
1336 .treblefunc = tda9855_treble,
1337
1338 .getmode = tda985x_getmode,
1339 .setmode = tda985x_setmode,
1340
1341 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1342 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1343 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1344 0x07, 0x10, 0x10, 0x03 }}
1345 },
1346 {
1347 .name = "tea6300",
1348 .id = I2C_DRIVERID_TEA6300,
1349 .insmodopt = &tea6300,
1350 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1351 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1352 .registers = 6,
1353 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1354
1355 .leftreg = TEA6300_VR,
1356 .rightreg = TEA6300_VL,
1357 .bassreg = TEA6300_BA,
1358 .treblereg = TEA6300_TR,
1359 .volfunc = tea6300_shift10,
1360 .bassfunc = tea6300_shift12,
1361 .treblefunc = tea6300_shift12,
1362
1363 .inputreg = TEA6300_S,
1364 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1365 .inputmute = TEA6300_S_GMU,
1366 },
1367 {
1368 .name = "tea6320",
1369 .id = I2C_DRIVERID_TEA6300,
1370 .initialize = tea6320_initialize,
1371 .insmodopt = &tea6320,
1372 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1373 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1374 .registers = 8,
1375 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1376
1377 .leftreg = TEA6320_V,
1378 .rightreg = TEA6320_V,
1379 .bassreg = TEA6320_BA,
1380 .treblereg = TEA6320_TR,
1381 .volfunc = tea6320_volume,
1382 .bassfunc = tea6320_shift11,
1383 .treblefunc = tea6320_shift11,
1384
1385 .inputreg = TEA6320_S,
1386 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1387 .inputmute = TEA6300_S_GMU,
1388 },
1389 {
1390 .name = "tea6420",
1391 .id = I2C_DRIVERID_TEA6420,
1392 .insmodopt = &tea6420,
1393 .addr_lo = I2C_ADDR_TEA6420 >> 1,
1394 .addr_hi = I2C_ADDR_TEA6420 >> 1,
1395 .registers = 1,
1396 .flags = CHIP_HAS_INPUTSEL,
1397
1398 .inputreg = -1,
1399 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1400 .inputmute = TEA6300_S_GMU,
1401 },
1402 {
1403 .name = "tda8425",
1404 .id = I2C_DRIVERID_TDA8425,
1405 .insmodopt = &tda8425,
1406 .addr_lo = I2C_ADDR_TDA8425 >> 1,
1407 .addr_hi = I2C_ADDR_TDA8425 >> 1,
1408 .registers = 9,
1409 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1410
1411 .leftreg = TDA8425_VL,
1412 .rightreg = TDA8425_VR,
1413 .bassreg = TDA8425_BA,
1414 .treblereg = TDA8425_TR,
1415 .volfunc = tda8425_shift10,
1416 .bassfunc = tda8425_shift12,
1417 .treblefunc = tda8425_shift12,
1418
1419 .inputreg = TDA8425_S1,
1420 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1421 .inputmute = TDA8425_S1_OFF,
1422
1423 .setmode = tda8425_setmode,
1424 .initialize = tda8425_initialize,
1425 },
1426 {
1427 .name = "pic16c54 (PV951)",
1428 .id = I2C_DRIVERID_PIC16C54_PV9,
1429 .insmodopt = &pic16c54,
1430 .addr_lo = I2C_ADDR_PIC16C54 >> 1,
1431 .addr_hi = I2C_ADDR_PIC16C54>> 1,
1432 .registers = 2,
1433 .flags = CHIP_HAS_INPUTSEL,
1434
1435 .inputreg = PIC16C54_REG_MISC,
1436 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1437 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1438 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1439 PIC16C54_MISC_SND_MUTE},
1440 .inputmute = PIC16C54_MISC_SND_MUTE,
1441 },
1442 {
1443 .name = "ta8874z",
1444 .id = -1,
1445
1446 .checkit = ta8874z_checkit,
1447 .insmodopt = &ta8874z,
1448 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1449 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1450 .registers = 2,
1451
1452 .getmode = ta8874z_getmode,
1453 .setmode = ta8874z_setmode,
1454 .checkmode = generic_checkmode,
1455
1456 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1457 },
1458 { .name = NULL }
1459};
1460
1461
1462
1463
1464
1465static int chip_attach(struct i2c_adapter *adap, int addr, int kind)
1466{
1467 struct CHIPSTATE *chip;
1468 struct CHIPDESC *desc;
1469
1470 chip = kzalloc(sizeof(*chip),GFP_KERNEL);
1471 if (!chip)
1472 return -ENOMEM;
1473 memcpy(&chip->c,&client_template,sizeof(struct i2c_client));
1474 chip->c.adapter = adap;
1475 chip->c.addr = addr;
1476 i2c_set_clientdata(&chip->c, chip);
1477
1478
1479 v4l_dbg(1, debug, &chip->c, "chip found @ 0x%x\n", addr<<1);
1480 for (desc = chiplist; desc->name != NULL; desc++) {
1481 if (0 == *(desc->insmodopt))
1482 continue;
1483 if (addr < desc->addr_lo ||
1484 addr > desc->addr_hi)
1485 continue;
1486 if (desc->checkit && !desc->checkit(chip))
1487 continue;
1488 break;
1489 }
1490 if (desc->name == NULL) {
1491 v4l_dbg(1, debug, &chip->c, "no matching chip description found\n");
1492 return -EIO;
1493 }
1494 v4l_info(&chip->c, "%s found @ 0x%x (%s)\n", desc->name, addr<<1, adap->name);
1495 if (desc->flags) {
1496 v4l_dbg(1, debug, &chip->c, "matches:%s%s%s.\n",
1497 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1498 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1499 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
1500 }
1501
1502
1503 strcpy(chip->c.name, desc->name);
1504 chip->type = desc-chiplist;
1505 chip->shadow.count = desc->registers+1;
1506 chip->prevmode = -1;
1507 chip->audmode = V4L2_TUNER_MODE_LANG1;
1508
1509 i2c_attach_client(&chip->c);
1510
1511
1512 if (desc->initialize != NULL)
1513 desc->initialize(chip);
1514 else
1515 chip_cmd(chip,"init",&desc->init);
1516
1517 if (desc->flags & CHIP_HAS_VOLUME) {
1518 chip->left = desc->leftinit ? desc->leftinit : 65535;
1519 chip->right = desc->rightinit ? desc->rightinit : 65535;
1520 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1521 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1522 }
1523 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1524 chip->treble = desc->trebleinit ? desc->trebleinit : 32768;
1525 chip->bass = desc->bassinit ? desc->bassinit : 32768;
1526 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1527 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1528 }
1529
1530 chip->thread = NULL;
1531 if (desc->checkmode) {
1532
1533 init_timer(&chip->wt);
1534 chip->wt.function = chip_thread_wake;
1535 chip->wt.data = (unsigned long)chip;
1536 chip->thread = kthread_run(chip_thread, chip, chip->c.name);
1537 if (IS_ERR(chip->thread)) {
1538 v4l_warn(&chip->c, "%s: failed to create kthread\n",
1539 chip->c.name);
1540 chip->thread = NULL;
1541 }
1542 }
1543 return 0;
1544}
1545
1546static int chip_probe(struct i2c_adapter *adap)
1547{
1548
1549
1550 if ((adap->id == I2C_HW_SAA7146))
1551 return 0;
1552 if (adap->class & I2C_CLASS_TV_ANALOG)
1553 return i2c_probe(adap, &addr_data, chip_attach);
1554 return 0;
1555}
1556
1557static int chip_detach(struct i2c_client *client)
1558{
1559 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1560
1561 del_timer_sync(&chip->wt);
1562 if (chip->thread) {
1563
1564 kthread_stop(chip->thread);
1565 chip->thread = NULL;
1566 }
1567
1568 i2c_detach_client(&chip->c);
1569 kfree(chip);
1570 return 0;
1571}
1572
1573static int tvaudio_set_ctrl(struct CHIPSTATE *chip, struct v4l2_control *ctrl)
1574{
1575 struct CHIPDESC *desc = chiplist + chip->type;
1576
1577 switch (ctrl->id) {
1578 case V4L2_CID_AUDIO_MUTE:
1579 if (ctrl->value < 0 || ctrl->value >= 2)
1580 return -ERANGE;
1581 chip->muted = ctrl->value;
1582 if (chip->muted)
1583 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1584 else
1585 chip_write_masked(chip,desc->inputreg,
1586 desc->inputmap[chip->input],desc->inputmask);
1587 break;
1588 default:
1589 return -EINVAL;
1590 }
1591 return 0;
1592}
1593
1594
1595
1596
1597
1598static int chip_command(struct i2c_client *client,
1599 unsigned int cmd, void *arg)
1600{
1601 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1602 struct CHIPDESC *desc = chiplist + chip->type;
1603
1604 v4l_dbg(1, debug, &chip->c, "%s: chip_command 0x%x\n", chip->c.name, cmd);
1605
1606 switch (cmd) {
1607 case AUDC_SET_RADIO:
1608 chip->radio = 1;
1609 chip->watch_stereo = 0;
1610
1611 break;
1612
1613
1614
1615
1616 case VIDIOCGAUDIO:
1617 {
1618 struct video_audio *va = arg;
1619
1620 if (desc->flags & CHIP_HAS_VOLUME) {
1621 va->flags |= VIDEO_AUDIO_VOLUME;
1622 va->volume = max(chip->left,chip->right);
1623 if (va->volume)
1624 va->balance = (32768*min(chip->left,chip->right))/
1625 va->volume;
1626 else
1627 va->balance = 32768;
1628 }
1629 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1630 va->flags |= VIDEO_AUDIO_BASS | VIDEO_AUDIO_TREBLE;
1631 va->bass = chip->bass;
1632 va->treble = chip->treble;
1633 }
1634 if (!chip->radio) {
1635 if (desc->getmode)
1636 va->mode = desc->getmode(chip);
1637 else
1638 va->mode = VIDEO_SOUND_MONO;
1639 }
1640 break;
1641 }
1642
1643 case VIDIOCSAUDIO:
1644 {
1645 struct video_audio *va = arg;
1646
1647 if (desc->flags & CHIP_HAS_VOLUME) {
1648 chip->left = (min(65536 - va->balance,32768) *
1649 va->volume) / 32768;
1650 chip->right = (min(va->balance,(__u16)32768) *
1651 va->volume) / 32768;
1652 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1653 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1654 }
1655 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1656 chip->bass = va->bass;
1657 chip->treble = va->treble;
1658 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1659 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1660 }
1661 if (desc->setmode && va->mode) {
1662 chip->watch_stereo = 0;
1663
1664 chip->mode = va->mode;
1665 desc->setmode(chip,va->mode);
1666 }
1667 break;
1668 }
1669
1670 case VIDIOC_S_CTRL:
1671 return tvaudio_set_ctrl(chip, arg);
1672
1673 case VIDIOC_INT_G_AUDIO_ROUTING:
1674 {
1675 struct v4l2_routing *rt = arg;
1676
1677 rt->input = chip->input;
1678 rt->output = 0;
1679 break;
1680 }
1681
1682 case VIDIOC_INT_S_AUDIO_ROUTING:
1683 {
1684 struct v4l2_routing *rt = arg;
1685
1686 if (!(desc->flags & CHIP_HAS_INPUTSEL) || rt->input >= 4)
1687 return -EINVAL;
1688
1689 chip->input = rt->input;
1690 if (chip->muted)
1691 break;
1692 chip_write_masked(chip, desc->inputreg,
1693 desc->inputmap[chip->input], desc->inputmask);
1694 break;
1695 }
1696
1697 case VIDIOC_S_TUNER:
1698 {
1699 struct v4l2_tuner *vt = arg;
1700 int mode = 0;
1701
1702 if (chip->radio)
1703 break;
1704 switch (vt->audmode) {
1705 case V4L2_TUNER_MODE_MONO:
1706 mode = VIDEO_SOUND_MONO;
1707 break;
1708 case V4L2_TUNER_MODE_STEREO:
1709 case V4L2_TUNER_MODE_LANG1_LANG2:
1710 mode = VIDEO_SOUND_STEREO;
1711 break;
1712 case V4L2_TUNER_MODE_LANG1:
1713 mode = VIDEO_SOUND_LANG1;
1714 break;
1715 case V4L2_TUNER_MODE_LANG2:
1716 mode = VIDEO_SOUND_LANG2;
1717 break;
1718 default:
1719 return -EINVAL;
1720 }
1721 chip->audmode = vt->audmode;
1722
1723 if (desc->setmode && mode) {
1724 chip->watch_stereo = 0;
1725
1726 chip->mode = mode;
1727 desc->setmode(chip, mode);
1728 }
1729 break;
1730 }
1731
1732 case VIDIOC_G_TUNER:
1733 {
1734 struct v4l2_tuner *vt = arg;
1735 int mode = VIDEO_SOUND_MONO;
1736
1737 if (chip->radio)
1738 break;
1739 vt->audmode = chip->audmode;
1740 vt->rxsubchans = 0;
1741 vt->capability = V4L2_TUNER_CAP_STEREO |
1742 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1743
1744 if (desc->getmode)
1745 mode = desc->getmode(chip);
1746
1747 if (mode & VIDEO_SOUND_MONO)
1748 vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
1749 if (mode & VIDEO_SOUND_STEREO)
1750 vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
1751
1752
1753
1754 if (mode & VIDEO_SOUND_LANG1)
1755 vt->rxsubchans = V4L2_TUNER_SUB_LANG1 |
1756 V4L2_TUNER_SUB_LANG2;
1757 break;
1758 }
1759
1760 case VIDIOCSCHAN:
1761 case VIDIOC_S_STD:
1762 chip->radio = 0;
1763 break;
1764
1765 case VIDIOCSFREQ:
1766 case VIDIOC_S_FREQUENCY:
1767 chip->mode = 0;
1768 if (desc->checkmode) {
1769 desc->setmode(chip,VIDEO_SOUND_MONO);
1770 if (chip->prevmode != VIDEO_SOUND_MONO)
1771 chip->prevmode = -1;
1772 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1773
1774 }
1775 break;
1776
1777 case VIDIOC_G_CHIP_IDENT:
1778 return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_TVAUDIO, 0);
1779 }
1780 return 0;
1781}
1782
1783static struct i2c_driver driver = {
1784 .driver = {
1785 .name = "tvaudio",
1786 },
1787 .id = I2C_DRIVERID_TVAUDIO,
1788 .attach_adapter = chip_probe,
1789 .detach_client = chip_detach,
1790 .command = chip_command,
1791};
1792
1793static struct i2c_client client_template =
1794{
1795 .name = "(unset)",
1796 .driver = &driver,
1797};
1798
1799static int __init audiochip_init_module(void)
1800{
1801 struct CHIPDESC *desc;
1802
1803 if (debug) {
1804 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1805 printk(KERN_INFO "tvaudio: known chips: ");
1806 for (desc = chiplist; desc->name != NULL; desc++)
1807 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1808 printk("\n");
1809 }
1810
1811 return i2c_add_driver(&driver);
1812}
1813
1814static void __exit audiochip_cleanup_module(void)
1815{
1816 i2c_del_driver(&driver);
1817}
1818
1819module_init(audiochip_init_module);
1820module_exit(audiochip_cleanup_module);
1821
1822
1823
1824
1825
1826
1827