LXR linux/drivers/message/fusion/lsi/mpi

   1/*
   2 *  Copyright (c) 2000-2007 LSI Corporation.
   3 *
   4 *
   5 *           Name:  mpi_ioc.h
   6 *          Title:  MPI IOC, Port, Event, FW Download, and FW Upload messages
   7 *  Creation Date:  August 11, 2000
   8 *
   9 *    mpi_ioc.h Version:  01.05.14
  10 *
  11 *  Version History
  12 *  ---------------
  13 *
  14 *  Date      Version   Description
  15 *  --------  --------  ------------------------------------------------------
  16 *  05-08-00  00.10.01  Original release for 0.10 spec dated 4/26/2000.
  17 *  05-24-00  00.10.02  Added _MSG_IOC_INIT_REPLY structure.
  18 *  06-06-00  01.00.01  Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY.
  19 *  06-12-00  01.00.02  Added _MSG_PORT_ENABLE_REPLY structure.
  20 *                      Added _MSG_EVENT_ACK_REPLY structure.
  21 *                      Added _MSG_FW_DOWNLOAD_REPLY structure.
  22 *                      Added _MSG_TOOLBOX_REPLY structure.
  23 *  06-30-00  01.00.03  Added MaxLanBuckets to _PORT_FACT_REPLY structure.
  24 *  07-27-00  01.00.04  Added _EVENT_DATA structure definitions for _SCSI,
  25 *                      _LINK_STATUS, _LOOP_STATE and _LOGOUT.
  26 *  08-11-00  01.00.05  Switched positions of MsgLength and Function fields in
  27 *                      _MSG_EVENT_ACK_REPLY structure to match specification.
  28 *  11-02-00  01.01.01  Original release for post 1.0 work.
  29 *                      Added a value for Manufacturer to WhoInit.
  30 *  12-04-00  01.01.02  Modified IOCFacts reply, added FWUpload messages, and
  31 *                      removed toolbox message.
  32 *  01-09-01  01.01.03  Added event enabled and disabled defines.
  33 *                      Added structures for FwHeader and DataHeader.
  34 *                      Added ImageType to FwUpload reply.
  35 *  02-20-01  01.01.04  Started using MPI_POINTER.
  36 *  02-27-01  01.01.05  Added event for RAID status change and its event data.
  37 *                      Added IocNumber field to MSG_IOC_FACTS_REPLY.
  38 *  03-27-01  01.01.06  Added defines for ProductId field of MPI_FW_HEADER.
  39 *                      Added structure offset comments.
  40 *  04-09-01  01.01.07  Added structure EVENT_DATA_EVENT_CHANGE.
  41 *  08-08-01  01.02.01  Original release for v1.2 work.
  42 *                      New format for FWVersion and ProductId in
  43 *                      MSG_IOC_FACTS_REPLY and MPI_FW_HEADER.
  44 *  08-31-01  01.02.02  Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and
  45 *                      related structure and defines.
  46 *                      Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED.
  47 *                      Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE.
  48 *                      Replaced a reserved field in MSG_IOC_FACTS_REPLY with
  49 *                      IOCExceptions and changed DataImageSize to reserved.
  50 *                      Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and
  51 *                      MPI_FW_UPLOAD_ITYPE_NVDATA.
  52 *  09-28-01  01.02.03  Modified Event Data for Integrated RAID.
  53 *  11-01-01  01.02.04  Added defines for MPI_EXT_IMAGE_HEADER ImageType field.
  54 *  03-14-02  01.02.05  Added HeaderVersion field to MSG_IOC_FACTS_REPLY.
  55 *  05-31-02  01.02.06  Added define for
  56 *                      MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID.
  57 *                      Added AliasIndex to EVENT_DATA_LOGOUT structure.
  58 *  04-01-03  01.02.07  Added defines for MPI_FW_HEADER_SIGNATURE_.
  59 *  06-26-03  01.02.08  Added new values to the product family defines.
  60 *  04-29-04  01.02.09  Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and
  61 *                      added related defines.
  62 *  05-11-04  01.03.01  Original release for MPI v1.3.
  63 *  08-19-04  01.05.01  Added four new fields to MSG_IOC_INIT.
  64 *                      Added three new fields to MSG_IOC_FACTS_REPLY.
  65 *                      Defined four new bits for the IOCCapabilities field of
  66 *                      the IOCFacts reply.
  67 *                      Added two new PortTypes for the PortFacts reply.
  68 *                      Added six new events along with their EventData
  69 *                      structures.
  70 *                      Added a new MsgFlag to the FwDownload request to
  71 *                      indicate last segment.
  72 *                      Defined a new image type of boot loader.
  73 *                      Added FW family codes for SAS product families.
  74 *  10-05-04  01.05.02  Added ReplyFifoHostSignalingAddr field to
  75 *                      MSG_IOC_FACTS_REPLY.
  76 *  12-07-04  01.05.03  Added more defines for SAS Discovery Error event.
  77 *  12-09-04  01.05.04  Added Unsupported device to SAS Device event.
  78 *  01-15-05  01.05.05  Added event data for SAS SES Event.
  79 *  02-09-05  01.05.06  Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define.
  80 *  02-22-05  01.05.07  Added Host Page Buffer Persistent flag to IOC Facts
  81 *                      Reply and IOC Init Request.
  82 *  03-11-05  01.05.08  Added family code for 1068E family.
  83 *                      Removed IOCFacts Reply EEDP Capability bit.
  84 *  06-24-05  01.05.09  Added 5 new IOCFacts Reply IOCCapabilities bits.
  85 *                      Added Max SATA Targets to SAS Discovery Error event.
  86 *  08-30-05  01.05.10  Added 4 new events and their event data structures.
  87 *                      Added new ReasonCode value for SAS Device Status Change
  88 *                      event.
  89 *                      Added new family code for FC949E.
  90 *  03-27-06  01.05.11  Added MPI_IOCFACTS_CAPABILITY_TLR.
  91 *                      Added additional Reason Codes and more event data fields
  92 *                      to EVENT_DATA_SAS_DEVICE_STATUS_CHANGE.
  93 *                      Added EVENT_DATA_SAS_BROADCAST_PRIMITIVE structure and
  94 *                      new event.
  95 *                      Added MPI_EVENT_SAS_SMP_ERROR and event data structure.
  96 *                      Added MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE and event
  97 *                      data structure.
  98 *                      Added MPI_EVENT_SAS_INIT_TABLE_OVERFLOW and event
  99 *                      data structure.
 100 *                      Added MPI_EXT_IMAGE_TYPE_INITIALIZATION.
 101 *  10-11-06  01.05.12  Added MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED.
 102 *                      Added MaxInitiators field to PortFacts reply.
 103 *                      Added SAS Device Status Change ReasonCode for
 104 *                      asynchronous notificaiton.
 105 *                      Added MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE and event
 106 *                      data structure.
 107 *                      Added new ImageType values for FWDownload and FWUpload
 108 *                      requests.
 109 *  02-28-07  01.05.13  Added MPI_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT for SAS
 110 *                      Broadcast Event Data (replacing _RESERVED2).
 111 *                      For Discovery Error Event Data DiscoveryStatus field,
 112 *                      replaced _MULTPL_PATHS with _UNSUPPORTED_DEVICE and
 113 *                      added _MULTI_PORT_DOMAIN.
 114 *  05-24-07  01.05.14  Added Common Boot Block type to FWDownload Request.
 115 *                      Added Common Boot Block type to FWUpload Request.
 116 *  --------------------------------------------------------------------------
 117 */
 118
 119#ifndef MPI_IOC_H
 120#define MPI_IOC_H
 121
 122
 123/*****************************************************************************
 124*
 125*               I O C    M e s s a g e s
 126*
 127*****************************************************************************/
 128
 129/****************************************************************************/
 130/*  IOCInit message                                                         */
 131/****************************************************************************/
 132
 133typedef struct _MSG_IOC_INIT
 134{
 135    U8                      WhoInit;                    /* 00h */
 136    U8                      Reserved;                   /* 01h */
 137    U8                      ChainOffset;                /* 02h */
 138    U8                      Function;                   /* 03h */
 139    U8                      Flags;                      /* 04h */
 140    U8                      MaxDevices;                 /* 05h */
 141    U8                      MaxBuses;                   /* 06h */
 142    U8                      MsgFlags;                   /* 07h */
 143    U32                     MsgContext;                 /* 08h */
 144    U16                     ReplyFrameSize;             /* 0Ch */
 145    U8                      Reserved1[2];               /* 0Eh */
 146    U32                     HostMfaHighAddr;            /* 10h */
 147    U32                     SenseBufferHighAddr;        /* 14h */
 148    U32                     ReplyFifoHostSignalingAddr; /* 18h */
 149    SGE_SIMPLE_UNION        HostPageBufferSGE;          /* 1Ch */
 150    U16                     MsgVersion;                 /* 28h */
 151    U16                     HeaderVersion;              /* 2Ah */
 152} MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
 153  IOCInit_t, MPI_POINTER pIOCInit_t;
 154
 155/* WhoInit values */
 156#define MPI_WHOINIT_NO_ONE                              (0x00)
 157#define MPI_WHOINIT_SYSTEM_BIOS                         (0x01)
 158#define MPI_WHOINIT_ROM_BIOS                            (0x02)
 159#define MPI_WHOINIT_PCI_PEER                            (0x03)
 160#define MPI_WHOINIT_HOST_DRIVER                         (0x04)
 161#define MPI_WHOINIT_MANUFACTURER                        (0x05)
 162
 163/* Flags values */
 164#define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT   (0x04)
 165#define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL        (0x02)
 166#define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE              (0x01)
 167
 168/* MsgVersion */
 169#define MPI_IOCINIT_MSGVERSION_MAJOR_MASK               (0xFF00)
 170#define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT              (8)
 171#define MPI_IOCINIT_MSGVERSION_MINOR_MASK               (0x00FF)
 172#define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT              (0)
 173
 174/* HeaderVersion */
 175#define MPI_IOCINIT_HEADERVERSION_UNIT_MASK             (0xFF00)
 176#define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT            (8)
 177#define MPI_IOCINIT_HEADERVERSION_DEV_MASK              (0x00FF)
 178#define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT             (0)
 179
 180
 181typedef struct _MSG_IOC_INIT_REPLY
 182{
 183    U8                      WhoInit;                    /* 00h */
 184    U8                      Reserved;                   /* 01h */
 185    U8                      MsgLength;                  /* 02h */
 186    U8                      Function;                   /* 03h */
 187    U8                      Flags;                      /* 04h */
 188    U8                      MaxDevices;                 /* 05h */
 189    U8                      MaxBuses;                   /* 06h */
 190    U8                      MsgFlags;                   /* 07h */
 191    U32                     MsgContext;                 /* 08h */
 192    U16                     Reserved2;                  /* 0Ch */
 193    U16                     IOCStatus;                  /* 0Eh */
 194    U32                     IOCLogInfo;                 /* 10h */
 195} MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY,
 196  IOCInitReply_t, MPI_POINTER pIOCInitReply_t;
 197
 198
 199
 200/****************************************************************************/
 201/*  IOC Facts message                                                       */
 202/****************************************************************************/
 203
 204typedef struct _MSG_IOC_FACTS
 205{
 206    U8                      Reserved[2];                /* 00h */
 207    U8                      ChainOffset;                /* 01h */
 208    U8                      Function;                   /* 02h */
 209    U8                      Reserved1[3];               /* 03h */
 210    U8                      MsgFlags;                   /* 04h */
 211    U32                     MsgContext;                 /* 08h */
 212} MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS,
 213  IOCFacts_t, MPI_POINTER pIOCFacts_t;
 214
 215typedef struct _MPI_FW_VERSION_STRUCT
 216{
 217    U8                      Dev;                        /* 00h */
 218    U8                      Unit;                       /* 01h */
 219    U8                      Minor;                      /* 02h */
 220    U8                      Major;                      /* 03h */
 221} MPI_FW_VERSION_STRUCT;
 222
 223typedef union _MPI_FW_VERSION
 224{
 225    MPI_FW_VERSION_STRUCT   Struct;
 226    U32                     Word;
 227} MPI_FW_VERSION;
 228
 229/* IOC Facts Reply */
 230typedef struct _MSG_IOC_FACTS_REPLY
 231{
 232    U16                     MsgVersion;                 /* 00h */
 233    U8                      MsgLength;                  /* 02h */
 234    U8                      Function;                   /* 03h */
 235    U16                     HeaderVersion;              /* 04h */
 236    U8                      IOCNumber;                  /* 06h */
 237    U8                      MsgFlags;                   /* 07h */
 238    U32                     MsgContext;                 /* 08h */
 239    U16                     IOCExceptions;              /* 0Ch */
 240    U16                     IOCStatus;                  /* 0Eh */
 241    U32                     IOCLogInfo;                 /* 10h */
 242    U8                      MaxChainDepth;              /* 14h */
 243    U8                      WhoInit;                    /* 15h */
 244    U8                      BlockSize;                  /* 16h */
 245    U8                      Flags;                      /* 17h */
 246    U16                     ReplyQueueDepth;            /* 18h */
 247    U16                     RequestFrameSize;           /* 1Ah */
 248    U16                     Reserved_0101_FWVersion;    /* 1Ch */ /* obsolete 16-bit FWVersion */
 249    U16                     ProductID;                  /* 1Eh */
 250    U32                     CurrentHostMfaHighAddr;     /* 20h */
 251    U16                     GlobalCredits;              /* 24h */
 252    U8                      NumberOfPorts;              /* 26h */
 253    U8                      EventState;                 /* 27h */
 254    U32                     CurrentSenseBufferHighAddr; /* 28h */
 255    U16                     CurReplyFrameSize;          /* 2Ch */
 256    U8                      MaxDevices;                 /* 2Eh */
 257    U8                      MaxBuses;                   /* 2Fh */
 258    U32                     FWImageSize;                /* 30h */
 259    U32                     IOCCapabilities;            /* 34h */
 260    MPI_FW_VERSION          FWVersion;                  /* 38h */
 261    U16                     HighPriorityQueueDepth;     /* 3Ch */
 262    U16                     Reserved2;                  /* 3Eh */
 263    SGE_SIMPLE_UNION        HostPageBufferSGE;          /* 40h */
 264    U32                     ReplyFifoHostSignalingAddr; /* 4Ch */
 265} MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
 266  IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
 267
 268#define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK              (0xFF00)
 269#define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT             (8)
 270#define MPI_IOCFACTS_MSGVERSION_MINOR_MASK              (0x00FF)
 271#define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT             (0)
 272
 273#define MPI_IOCFACTS_HDRVERSION_UNIT_MASK               (0xFF00)
 274#define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT              (8)
 275#define MPI_IOCFACTS_HDRVERSION_DEV_MASK                (0x00FF)
 276#define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT               (0)
 277
 278#define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL        (0x0001)
 279#define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID         (0x0002)
 280#define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL            (0x0004)
 281#define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL       (0x0008)
 282#define MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED        (0x0010)
 283
 284#define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT             (0x01)
 285#define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL       (0x02)
 286#define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT  (0x04)
 287
 288#define MPI_IOCFACTS_EVENTSTATE_DISABLED                (0x00)
 289#define MPI_IOCFACTS_EVENTSTATE_ENABLED                 (0x01)
 290
 291#define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q              (0x00000001)
 292#define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL       (0x00000002)
 293#define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING     (0x00000004)
 294#define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER       (0x00000008)
 295#define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER         (0x00000010)
 296#define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER         (0x00000020)
 297#define MPI_IOCFACTS_CAPABILITY_EEDP                    (0x00000040)
 298#define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL           (0x00000080)
 299#define MPI_IOCFACTS_CAPABILITY_MULTICAST               (0x00000100)
 300#define MPI_IOCFACTS_CAPABILITY_SCSIIO32                (0x00000200)
 301#define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16             (0x00000400)
 302#define MPI_IOCFACTS_CAPABILITY_TLR                     (0x00000800)
 303
 304
 305/*****************************************************************************
 306*
 307*               P o r t    M e s s a g e s
 308*
 309*****************************************************************************/
 310
 311/****************************************************************************/
 312/*  Port Facts message and Reply                                            */
 313/****************************************************************************/
 314
 315typedef struct _MSG_PORT_FACTS
 316{
 317     U8                     Reserved[2];                /* 00h */
 318     U8                     ChainOffset;                /* 02h */
 319     U8                     Function;                   /* 03h */
 320     U8                     Reserved1[2];               /* 04h */
 321     U8                     PortNumber;                 /* 06h */
 322     U8                     MsgFlags;                   /* 07h */
 323     U32                    MsgContext;                 /* 08h */
 324} MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS,
 325  PortFacts_t, MPI_POINTER pPortFacts_t;
 326
 327typedef struct _MSG_PORT_FACTS_REPLY
 328{
 329     U16                    Reserved;                   /* 00h */
 330     U8                     MsgLength;                  /* 02h */
 331     U8                     Function;                   /* 03h */
 332     U16                    Reserved1;                  /* 04h */
 333     U8                     PortNumber;                 /* 06h */
 334     U8                     MsgFlags;                   /* 07h */
 335     U32                    MsgContext;                 /* 08h */
 336     U16                    Reserved2;                  /* 0Ch */
 337     U16                    IOCStatus;                  /* 0Eh */
 338     U32                    IOCLogInfo;                 /* 10h */
 339     U8                     Reserved3;                  /* 14h */
 340     U8                     PortType;                   /* 15h */
 341     U16                    MaxDevices;                 /* 16h */
 342     U16                    PortSCSIID;                 /* 18h */
 343     U16                    ProtocolFlags;              /* 1Ah */
 344     U16                    MaxPostedCmdBuffers;        /* 1Ch */
 345     U16                    MaxPersistentIDs;           /* 1Eh */
 346     U16                    MaxLanBuckets;              /* 20h */
 347     U8                     MaxInitiators;              /* 22h */
 348     U8                     Reserved4;                  /* 23h */
 349     U32                    Reserved5;                  /* 24h */
 350} MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
 351  PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
 352
 353
 354/* PortTypes values */
 355
 356#define MPI_PORTFACTS_PORTTYPE_INACTIVE         (0x00)
 357#define MPI_PORTFACTS_PORTTYPE_SCSI             (0x01)
 358#define MPI_PORTFACTS_PORTTYPE_FC               (0x10)
 359#define MPI_PORTFACTS_PORTTYPE_ISCSI            (0x20)
 360#define MPI_PORTFACTS_PORTTYPE_SAS              (0x30)
 361
 362/* ProtocolFlags values */
 363
 364#define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR       (0x01)
 365#define MPI_PORTFACTS_PROTOCOL_LAN              (0x02)
 366#define MPI_PORTFACTS_PROTOCOL_TARGET           (0x04)
 367#define MPI_PORTFACTS_PROTOCOL_INITIATOR        (0x08)
 368
 369
 370/****************************************************************************/
 371/*  Port Enable Message                                                     */
 372/****************************************************************************/
 373
 374typedef struct _MSG_PORT_ENABLE
 375{
 376    U8                      Reserved[2];                /* 00h */
 377    U8                      ChainOffset;                /* 02h */
 378    U8                      Function;                   /* 03h */
 379    U8                      Reserved1[2];               /* 04h */
 380    U8                      PortNumber;                 /* 06h */
 381    U8                      MsgFlags;                   /* 07h */
 382    U32                     MsgContext;                 /* 08h */
 383} MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE,
 384  PortEnable_t, MPI_POINTER pPortEnable_t;
 385
 386typedef struct _MSG_PORT_ENABLE_REPLY
 387{
 388    U8                      Reserved[2];                /* 00h */
 389    U8                      MsgLength;                  /* 02h */
 390    U8                      Function;                   /* 03h */
 391    U8                      Reserved1[2];               /* 04h */
 392    U8                      PortNumber;                 /* 05h */
 393    U8                      MsgFlags;                   /* 07h */
 394    U32                     MsgContext;                 /* 08h */
 395    U16                     Reserved2;                  /* 0Ch */
 396    U16                     IOCStatus;                  /* 0Eh */
 397    U32                     IOCLogInfo;                 /* 10h */
 398} MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY,
 399  PortEnableReply_t, MPI_POINTER pPortEnableReply_t;
 400
 401
 402/*****************************************************************************
 403*
 404*               E v e n t    M e s s a g e s
 405*
 406*****************************************************************************/
 407
 408/****************************************************************************/
 409/*  Event Notification messages                                             */
 410/****************************************************************************/
 411
 412typedef struct _MSG_EVENT_NOTIFY
 413{
 414    U8                      Switch;                     /* 00h */
 415    U8                      Reserved;                   /* 01h */
 416    U8                      ChainOffset;                /* 02h */
 417    U8                      Function;                   /* 03h */
 418    U8                      Reserved1[3];               /* 04h */
 419    U8                      MsgFlags;                   /* 07h */
 420    U32                     MsgContext;                 /* 08h */
 421} MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY,
 422  EventNotification_t, MPI_POINTER pEventNotification_t;
 423
 424/* Event Notification Reply */
 425
 426typedef struct _MSG_EVENT_NOTIFY_REPLY
 427{
 428     U16                    EventDataLength;            /* 00h */
 429     U8                     MsgLength;                  /* 02h */
 430     U8                     Function;                   /* 03h */
 431     U8                     Reserved1[2];               /* 04h */
 432     U8                     AckRequired;                /* 06h */
 433     U8                     MsgFlags;                   /* 07h */
 434     U32                    MsgContext;                 /* 08h */
 435     U8                     Reserved2[2];               /* 0Ch */
 436     U16                    IOCStatus;                  /* 0Eh */
 437     U32                    IOCLogInfo;                 /* 10h */
 438     U32                    Event;                      /* 14h */
 439     U32                    EventContext;               /* 18h */
 440     U32                    Data[1];                    /* 1Ch */
 441} MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY,
 442  EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t;
 443
 444/* Event Acknowledge */
 445
 446typedef struct _MSG_EVENT_ACK
 447{
 448    U8                      Reserved[2];                /* 00h */
 449    U8                      ChainOffset;                /* 02h */
 450    U8                      Function;                   /* 03h */
 451    U8                      Reserved1[3];               /* 04h */
 452    U8                      MsgFlags;                   /* 07h */
 453    U32                     MsgContext;                 /* 08h */
 454    U32                     Event;                      /* 0Ch */
 455    U32                     EventContext;               /* 10h */
 456} MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK,
 457  EventAck_t, MPI_POINTER pEventAck_t;
 458
 459typedef struct _MSG_EVENT_ACK_REPLY
 460{
 461    U8                      Reserved[2];                /* 00h */
 462    U8                      MsgLength;                  /* 02h */
 463    U8                      Function;                   /* 03h */
 464    U8                      Reserved1[3];               /* 04h */
 465    U8                      MsgFlags;                   /* 07h */
 466    U32                     MsgContext;                 /* 08h */
 467    U16                     Reserved2;                  /* 0Ch */
 468    U16                     IOCStatus;                  /* 0Eh */
 469    U32                     IOCLogInfo;                 /* 10h */
 470} MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY,
 471  EventAckReply_t, MPI_POINTER pEventAckReply_t;
 472
 473/* Switch */
 474
 475#define MPI_EVENT_NOTIFICATION_SWITCH_OFF   (0x00)
 476#define MPI_EVENT_NOTIFICATION_SWITCH_ON    (0x01)
 477
 478/* Event */
 479
 480#define MPI_EVENT_NONE                          (0x00000000)
 481#define MPI_EVENT_LOG_DATA                      (0x00000001)
 482#define MPI_EVENT_STATE_CHANGE                  (0x00000002)
 483#define MPI_EVENT_UNIT_ATTENTION                (0x00000003)
 484#define MPI_EVENT_IOC_BUS_RESET                 (0x00000004)
 485#define MPI_EVENT_EXT_BUS_RESET                 (0x00000005)
 486#define MPI_EVENT_RESCAN                        (0x00000006)
 487#define MPI_EVENT_LINK_STATUS_CHANGE            (0x00000007)
 488#define MPI_EVENT_LOOP_STATE_CHANGE             (0x00000008)
 489#define MPI_EVENT_LOGOUT                        (0x00000009)
 490#define MPI_EVENT_EVENT_CHANGE                  (0x0000000A)
 491#define MPI_EVENT_INTEGRATED_RAID               (0x0000000B)
 492#define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE     (0x0000000C)
 493#define MPI_EVENT_ON_BUS_TIMER_EXPIRED          (0x0000000D)
 494#define MPI_EVENT_QUEUE_FULL                    (0x0000000E)
 495#define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE      (0x0000000F)
 496#define MPI_EVENT_SAS_SES                       (0x00000010)
 497#define MPI_EVENT_PERSISTENT_TABLE_FULL         (0x00000011)
 498#define MPI_EVENT_SAS_PHY_LINK_STATUS           (0x00000012)
 499#define MPI_EVENT_SAS_DISCOVERY_ERROR           (0x00000013)
 500#define MPI_EVENT_IR_RESYNC_UPDATE              (0x00000014)
 501#define MPI_EVENT_IR2                           (0x00000015)
 502#define MPI_EVENT_SAS_DISCOVERY                 (0x00000016)
 503#define MPI_EVENT_SAS_BROADCAST_PRIMITIVE       (0x00000017)
 504#define MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x00000018)
 505#define MPI_EVENT_SAS_INIT_TABLE_OVERFLOW       (0x00000019)
 506#define MPI_EVENT_SAS_SMP_ERROR                 (0x0000001A)
 507#define MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE    (0x0000001B)
 508#define MPI_EVENT_LOG_ENTRY_ADDED               (0x00000021)
 509
 510/* AckRequired field values */
 511
 512#define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
 513#define MPI_EVENT_NOTIFICATION_ACK_REQUIRED     (0x01)
 514
 515/* EventChange Event data */
 516
 517typedef struct _EVENT_DATA_EVENT_CHANGE
 518{
 519    U8                      EventState;                 /* 00h */
 520    U8                      Reserved;                   /* 01h */
 521    U16                     Reserved1;                  /* 02h */
 522} EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE,
 523  EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t;
 524
 525/* LogEntryAdded Event data */
 526
 527/* this structure matches MPI_LOG_0_ENTRY in mpi_cnfg.h */
 528#define MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH    (0x1C)
 529typedef struct _EVENT_DATA_LOG_ENTRY
 530{
 531    U32         TimeStamp;                          /* 00h */
 532    U32         Reserved1;                          /* 04h */
 533    U16         LogSequence;                        /* 08h */
 534    U16         LogEntryQualifier;                  /* 0Ah */
 535    U8          LogData[MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH]; /* 0Ch */
 536} EVENT_DATA_LOG_ENTRY, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY,
 537  MpiEventDataLogEntry_t, MPI_POINTER pMpiEventDataLogEntry_t;
 538
 539typedef struct _EVENT_DATA_LOG_ENTRY_ADDED
 540{
 541    U16                     LogSequence;            /* 00h */
 542    U16                     Reserved1;              /* 02h */
 543    U32                     Reserved2;              /* 04h */
 544    EVENT_DATA_LOG_ENTRY    LogEntry;               /* 08h */
 545} EVENT_DATA_LOG_ENTRY_ADDED, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY_ADDED,
 546  MpiEventDataLogEntryAdded_t, MPI_POINTER pMpiEventDataLogEntryAdded_t;
 547
 548/* SCSI Event data for Port, Bus and Device forms */
 549
 550typedef struct _EVENT_DATA_SCSI
 551{
 552    U8                      TargetID;                   /* 00h */
 553    U8                      BusPort;                    /* 01h */
 554    U16                     Reserved;                   /* 02h */
 555} EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI,
 556  EventDataScsi_t, MPI_POINTER pEventDataScsi_t;
 557
 558/* SCSI Device Status Change Event data */
 559
 560typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
 561{
 562    U8                      TargetID;                   /* 00h */
 563    U8                      Bus;                        /* 01h */
 564    U8                      ReasonCode;                 /* 02h */
 565    U8                      LUN;                        /* 03h */
 566    U8                      ASC;                        /* 04h */
 567    U8                      ASCQ;                       /* 05h */
 568    U16                     Reserved;                   /* 06h */
 569} EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
 570  MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
 571  MpiEventDataScsiDeviceStatusChange_t,
 572  MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t;
 573
 574/* MPI SCSI Device Status Change Event data ReasonCode values */
 575#define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED                (0x03)
 576#define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING       (0x04)
 577#define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA           (0x05)
 578
 579/* SAS Device Status Change Event data */
 580
 581typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
 582{
 583    U8                      TargetID;                   /* 00h */
 584    U8                      Bus;                        /* 01h */
 585    U8                      ReasonCode;                 /* 02h */
 586    U8                      Reserved;                   /* 03h */
 587    U8                      ASC;                        /* 04h */
 588    U8                      ASCQ;                       /* 05h */
 589    U16                     DevHandle;                  /* 06h */
 590    U32                     DeviceInfo;                 /* 08h */
 591    U16                     ParentDevHandle;            /* 0Ch */
 592    U8                      PhyNum;                     /* 0Eh */
 593    U8                      Reserved1;                  /* 0Fh */
 594    U64                     SASAddress;                 /* 10h */
 595    U8                      LUN[8];                     /* 18h */
 596    U16                     TaskTag;                    /* 20h */
 597    U16                     Reserved2;                  /* 22h */
 598} EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
 599  MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
 600  MpiEventDataSasDeviceStatusChange_t,
 601  MPI_POINTER pMpiEventDataSasDeviceStatusChange_t;
 602
 603/* MPI SAS Device Status Change Event data ReasonCode values */
 604#define MPI_EVENT_SAS_DEV_STAT_RC_ADDED                     (0x03)
 605#define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING            (0x04)
 606#define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA                (0x05)
 607#define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED          (0x06)
 608#define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED               (0x07)
 609#define MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET     (0x08)
 610#define MPI_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL       (0x09)
 611#define MPI_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL   (0x0A)
 612#define MPI_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL   (0x0B)
 613#define MPI_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL       (0x0C)
 614#define MPI_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION        (0x0D)
 615
 616
 617/* SCSI Event data for Queue Full event */
 618
 619typedef struct _EVENT_DATA_QUEUE_FULL
 620{
 621    U8                      TargetID;                   /* 00h */
 622    U8                      Bus;                        /* 01h */
 623    U16                     CurrentDepth;               /* 02h */
 624} EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL,
 625  EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t;
 626
 627/* MPI Integrated RAID Event data */
 628
 629typedef struct _EVENT_DATA_RAID
 630{
 631    U8                      VolumeID;                   /* 00h */
 632    U8                      VolumeBus;                  /* 01h */
 633    U8                      ReasonCode;                 /* 02h */
 634    U8                      PhysDiskNum;                /* 03h */
 635    U8                      ASC;                        /* 04h */
 636    U8                      ASCQ;                       /* 05h */
 637    U16                     Reserved;                   /* 06h */
 638    U32                     SettingsStatus;             /* 08h */
 639} EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
 640  MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
 641
 642/* MPI Integrated RAID Event data ReasonCode values */
 643#define MPI_EVENT_RAID_RC_VOLUME_CREATED                (0x00)
 644#define MPI_EVENT_RAID_RC_VOLUME_DELETED                (0x01)
 645#define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED       (0x02)
 646#define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED         (0x03)
 647#define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED       (0x04)
 648#define MPI_EVENT_RAID_RC_PHYSDISK_CREATED              (0x05)
 649#define MPI_EVENT_RAID_RC_PHYSDISK_DELETED              (0x06)
 650#define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED     (0x07)
 651#define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED       (0x08)
 652#define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED             (0x09)
 653#define MPI_EVENT_RAID_RC_SMART_DATA                    (0x0A)
 654#define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED        (0x0B)
 655
 656
 657/* MPI Integrated RAID Resync Update Event data */
 658
 659typedef struct _MPI_EVENT_DATA_IR_RESYNC_UPDATE
 660{
 661    U8                      VolumeID;                   /* 00h */
 662    U8                      VolumeBus;                  /* 01h */
 663    U8                      ResyncComplete;             /* 02h */
 664    U8                      Reserved1;                  /* 03h */
 665    U32                     Reserved2;                  /* 04h */
 666} MPI_EVENT_DATA_IR_RESYNC_UPDATE,
 667  MPI_POINTER PTR_MPI_EVENT_DATA_IR_RESYNC_UPDATE,
 668  MpiEventDataIrResyncUpdate_t, MPI_POINTER pMpiEventDataIrResyncUpdate_t;
 669
 670/* MPI IR2 Event data */
 671
 672/* MPI_LD_STATE or MPI_PD_STATE */
 673typedef struct _IR2_STATE_CHANGED
 674{
 675    U16                 PreviousState;  /* 00h */
 676    U16                 NewState;       /* 02h */
 677} IR2_STATE_CHANGED, MPI_POINTER PTR_IR2_STATE_CHANGED;
 678
 679typedef struct _IR2_PD_INFO
 680{
 681    U16                 DeviceHandle;           /* 00h */
 682    U8                  TruncEnclosureHandle;   /* 02h */
 683    U8                  TruncatedSlot;          /* 03h */
 684} IR2_PD_INFO, MPI_POINTER PTR_IR2_PD_INFO;
 685
 686typedef union _MPI_IR2_RC_EVENT_DATA
 687{
 688    IR2_STATE_CHANGED   StateChanged;
 689    U32                 Lba;
 690    IR2_PD_INFO         PdInfo;
 691} MPI_IR2_RC_EVENT_DATA, MPI_POINTER PTR_MPI_IR2_RC_EVENT_DATA;
 692
 693typedef struct _MPI_EVENT_DATA_IR2
 694{
 695    U8                      TargetID;             /* 00h */
 696    U8                      Bus;                  /* 01h */
 697    U8                      ReasonCode;           /* 02h */
 698    U8                      PhysDiskNum;          /* 03h */
 699    MPI_IR2_RC_EVENT_DATA   IR2EventData;         /* 04h */
 700} MPI_EVENT_DATA_IR2, MPI_POINTER PTR_MPI_EVENT_DATA_IR2,
 701  MpiEventDataIR2_t, MPI_POINTER pMpiEventDataIR2_t;
 702
 703/* MPI IR2 Event data ReasonCode values */
 704#define MPI_EVENT_IR2_RC_LD_STATE_CHANGED           (0x01)
 705#define MPI_EVENT_IR2_RC_PD_STATE_CHANGED           (0x02)
 706#define MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL       (0x03)
 707#define MPI_EVENT_IR2_RC_PD_INSERTED                (0x04)
 708#define MPI_EVENT_IR2_RC_PD_REMOVED                 (0x05)
 709#define MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED       (0x06)
 710#define MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR       (0x07)
 711
 712/* defines for logical disk states */
 713#define MPI_LD_STATE_OPTIMAL                        (0x00)
 714#define MPI_LD_STATE_DEGRADED                       (0x01)
 715#define MPI_LD_STATE_FAILED                         (0x02)
 716#define MPI_LD_STATE_MISSING                        (0x03)
 717#define MPI_LD_STATE_OFFLINE                        (0x04)
 718
 719/* defines for physical disk states */
 720#define MPI_PD_STATE_ONLINE                         (0x00)
 721#define MPI_PD_STATE_MISSING                        (0x01)
 722#define MPI_PD_STATE_NOT_COMPATIBLE                 (0x02)
 723#define MPI_PD_STATE_FAILED                         (0x03)
 724#define MPI_PD_STATE_INITIALIZING                   (0x04)
 725#define MPI_PD_STATE_OFFLINE_AT_HOST_REQUEST        (0x05)
 726#define MPI_PD_STATE_FAILED_AT_HOST_REQUEST         (0x06)
 727#define MPI_PD_STATE_OFFLINE_FOR_ANOTHER_REASON     (0xFF)
 728
 729/* MPI Link Status Change Event data */
 730
 731typedef struct _EVENT_DATA_LINK_STATUS
 732{
 733    U8                      State;                      /* 00h */
 734    U8                      Reserved;                   /* 01h */
 735    U16                     Reserved1;                  /* 02h */
 736    U8                      Reserved2;                  /* 04h */
 737    U8                      Port;                       /* 05h */
 738    U16                     Reserved3;                  /* 06h */
 739} EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS,
 740  EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t;
 741
 742#define MPI_EVENT_LINK_STATUS_FAILURE       (0x00000000)
 743#define MPI_EVENT_LINK_STATUS_ACTIVE        (0x00000001)
 744
 745/* MPI Loop State Change Event data */
 746
 747typedef struct _EVENT_DATA_LOOP_STATE
 748{
 749    U8                      Character4;                 /* 00h */
 750    U8                      Character3;                 /* 01h */
 751    U8                      Type;                       /* 02h */
 752    U8                      Reserved;                   /* 03h */
 753    U8                      Reserved1;                  /* 04h */
 754    U8                      Port;                       /* 05h */
 755    U16                     Reserved2;                  /* 06h */
 756} EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE,
 757  EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t;
 758
 759#define MPI_EVENT_LOOP_STATE_CHANGE_LIP     (0x0001)
 760#define MPI_EVENT_LOOP_STATE_CHANGE_LPE     (0x0002)
 761#define MPI_EVENT_LOOP_STATE_CHANGE_LPB     (0x0003)
 762
 763/* MPI LOGOUT Event data */
 764
 765typedef struct _EVENT_DATA_LOGOUT
 766{
 767    U32                     NPortID;                    /* 00h */
 768    U8                      AliasIndex;                 /* 04h */
 769    U8                      Port;                       /* 05h */
 770    U16                     Reserved1;                  /* 06h */
 771} EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT,
 772  EventDataLogout_t, MPI_POINTER pEventDataLogout_t;
 773
 774#define MPI_EVENT_LOGOUT_ALL_ALIASES        (0xFF)
 775
 776/* SAS SES Event data */
 777
 778typedef struct _EVENT_DATA_SAS_SES
 779{
 780    U8                      PhyNum;                     /* 00h */
 781    U8                      Port;                       /* 01h */
 782    U8                      PortWidth;                  /* 02h */
 783    U8                      Reserved1;                  /* 04h */
 784} EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
 785  MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
 786
 787/* SAS Broadcast Primitive Event data */
 788
 789typedef struct _EVENT_DATA_SAS_BROADCAST_PRIMITIVE
 790{
 791    U8                      PhyNum;                     /* 00h */
 792    U8                      Port;                       /* 01h */
 793    U8                      PortWidth;                  /* 02h */
 794    U8                      Primitive;                  /* 04h */
 795} EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
 796  MPI_POINTER PTR_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
 797  MpiEventDataSasBroadcastPrimitive_t,
 798  MPI_POINTER pMpiEventDataSasBroadcastPrimitive_t;
 799
 800#define MPI_EVENT_PRIMITIVE_CHANGE              (0x01)
 801#define MPI_EVENT_PRIMITIVE_EXPANDER            (0x03)
 802#define MPI_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT  (0x04)
 803#define MPI_EVENT_PRIMITIVE_RESERVED3           (0x05)
 804#define MPI_EVENT_PRIMITIVE_RESERVED4           (0x06)
 805#define MPI_EVENT_PRIMITIVE_CHANGE0_RESERVED    (0x07)
 806#define MPI_EVENT_PRIMITIVE_CHANGE1_RESERVED    (0x08)
 807
 808/* SAS Phy Link Status Event data */
 809
 810typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
 811{
 812    U8                      PhyNum;                     /* 00h */
 813    U8                      LinkRates;                  /* 01h */
 814    U16                     DevHandle;                  /* 02h */
 815    U64                     SASAddress;                 /* 04h */
 816} EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS,
 817  MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t;
 818
 819/* defines for the LinkRates field of the SAS PHY Link Status event */
 820#define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK                   (0xF0)
 821#define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT                  (4)
 822#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK                  (0x0F)
 823#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT                 (0)
 824#define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN                   (0x00)
 825#define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED              (0x01)
 826#define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION  (0x02)
 827#define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE         (0x03)
 828#define MPI_EVENT_SAS_PLS_LR_RATE_1_5                       (0x08)
 829#define MPI_EVENT_SAS_PLS_LR_RATE_3_0                       (0x09)
 830
 831/* SAS Discovery Event data */
 832
 833typedef struct _EVENT_DATA_SAS_DISCOVERY
 834{
 835    U32                     DiscoveryStatus;            /* 00h */
 836    U32                     Reserved1;                  /* 04h */
 837} EVENT_DATA_SAS_DISCOVERY, MPI_POINTER PTR_EVENT_DATA_SAS_DISCOVERY,
 838  EventDataSasDiscovery_t, MPI_POINTER pEventDataSasDiscovery_t;
 839
 840#define MPI_EVENT_SAS_DSCVRY_COMPLETE                       (0x00000000)
 841#define MPI_EVENT_SAS_DSCVRY_IN_PROGRESS                    (0x00000001)
 842#define MPI_EVENT_SAS_DSCVRY_PHY_BITS_MASK                  (0xFFFF0000)
 843#define MPI_EVENT_SAS_DSCVRY_PHY_BITS_SHIFT                 (16)
 844
 845/* SAS Discovery Errror Event data */
 846
 847typedef struct _EVENT_DATA_DISCOVERY_ERROR
 848{
 849    U32                     DiscoveryStatus;            /* 00h */
 850    U8                      Port;                       /* 04h */
 851    U8                      Reserved1;                  /* 05h */
 852    U16                     Reserved2;                  /* 06h */
 853} EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR,
 854  EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t;
 855
 856#define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED               (0x00000001)
 857#define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE        (0x00000002)
 858#define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS              (0x00000004)
 859#define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR                (0x00000008)
 860#define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT                 (0x00000010)
 861#define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES           (0x00000020)
 862#define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST             (0x00000040)
 863#define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED         (0x00000080)
 864#define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR               (0x00000100)
 865#define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE          (0x00000200)
 866#define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE              (0x00000400)
 867#define MPI_EVENT_DSCVRY_ERR_DS_UNSUPPORTED_DEVICE          (0x00000800)
 868#define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS            (0x00001000)
 869#define MPI_EVENT_DSCVRY_ERR_DS_MULTI_PORT_DOMAIN           (0x00002000)
 870
 871/* SAS SMP Error Event data */
 872
 873typedef struct _EVENT_DATA_SAS_SMP_ERROR
 874{
 875    U8                      Status;                     /* 00h */
 876    U8                      Port;                       /* 01h */
 877    U8                      SMPFunctionResult;          /* 02h */
 878    U8                      Reserved1;                  /* 03h */
 879    U64                     SASAddress;                 /* 04h */
 880} EVENT_DATA_SAS_SMP_ERROR, MPI_POINTER PTR_EVENT_DATA_SAS_SMP_ERROR,
 881  MpiEventDataSasSmpError_t, MPI_POINTER pMpiEventDataSasSmpError_t;
 882
 883/* defines for the Status field of the SAS SMP Error event */
 884#define MPI_EVENT_SAS_SMP_FUNCTION_RESULT_VALID         (0x00)
 885#define MPI_EVENT_SAS_SMP_CRC_ERROR                     (0x01)
 886#define MPI_EVENT_SAS_SMP_TIMEOUT                       (0x02)
 887#define MPI_EVENT_SAS_SMP_NO_DESTINATION                (0x03)
 888#define MPI_EVENT_SAS_SMP_BAD_DESTINATION               (0x04)
 889
 890/* SAS Initiator Device Status Change Event data */
 891
 892typedef struct _EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
 893{
 894    U8                      ReasonCode;                 /* 00h */
 895    U8                      Port;                       /* 01h */
 896    U16                     DevHandle;                  /* 02h */
 897    U64                     SASAddress;                 /* 04h */
 898} EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
 899  MPI_POINTER PTR_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
 900  MpiEventDataSasInitDevStatusChange_t,
 901  MPI_POINTER pMpiEventDataSasInitDevStatusChange_t;
 902
 903/* defines for the ReasonCode field of the SAS Initiator Device Status Change event */
 904#define MPI_EVENT_SAS_INIT_RC_ADDED                 (0x01)
 905
 906/* SAS Initiator Device Table Overflow Event data */
 907
 908typedef struct _EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
 909{
 910    U8                      MaxInit;                    /* 00h */
 911    U8                      CurrentInit;                /* 01h */
 912    U16                     Reserved1;                  /* 02h */
 913} EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
 914  MPI_POINTER PTR_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
 915  MpiEventDataSasInitTableOverflow_t,
 916  MPI_POINTER pMpiEventDataSasInitTableOverflow_t;
 917
 918/* SAS Expander Status Change Event data */
 919
 920typedef struct _EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE
 921{
 922    U8                      ReasonCode;             /* 00h */
 923    U8                      Reserved1;              /* 01h */
 924    U16                     Reserved2;              /* 02h */
 925    U8                      PhysicalPort;           /* 04h */
 926    U8                      Reserved3;              /* 05h */
 927    U16                     EnclosureHandle;        /* 06h */
 928    U64                     SASAddress;             /* 08h */
 929    U32                     DiscoveryStatus;        /* 10h */
 930    U16                     DevHandle;              /* 14h */
 931    U16                     ParentDevHandle;        /* 16h */
 932    U16                     ExpanderChangeCount;    /* 18h */
 933    U16                     ExpanderRouteIndexes;   /* 1Ah */
 934    U8                      NumPhys;                /* 1Ch */
 935    U8                      SASLevel;               /* 1Dh */
 936    U8                      Flags;                  /* 1Eh */
 937    U8                      Reserved4;              /* 1Fh */
 938} EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE,
 939  MPI_POINTER PTR_EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE,
 940  MpiEventDataSasExpanderStatusChange_t,
 941  MPI_POINTER pMpiEventDataSasExpanderStatusChange_t;
 942
 943/* values for ReasonCode field of SAS Expander Status Change Event data */
 944#define MPI_EVENT_SAS_EXP_RC_ADDED                      (0x00)
 945#define MPI_EVENT_SAS_EXP_RC_NOT_RESPONDING             (0x01)
 946
 947/* values for DiscoveryStatus field of SAS Expander Status Change Event data */
 948#define MPI_EVENT_SAS_EXP_DS_LOOP_DETECTED              (0x00000001)
 949#define MPI_EVENT_SAS_EXP_DS_UNADDRESSABLE_DEVICE       (0x00000002)
 950#define MPI_EVENT_SAS_EXP_DS_MULTIPLE_PORTS             (0x00000004)
 951#define MPI_EVENT_SAS_EXP_DS_EXPANDER_ERR               (0x00000008)
 952#define MPI_EVENT_SAS_EXP_DS_SMP_TIMEOUT                (0x00000010)
 953#define MPI_EVENT_SAS_EXP_DS_OUT_ROUTE_ENTRIES          (0x00000020)
 954#define MPI_EVENT_SAS_EXP_DS_INDEX_NOT_EXIST            (0x00000040)
 955#define MPI_EVENT_SAS_EXP_DS_SMP_FUNCTION_FAILED        (0x00000080)
 956#define MPI_EVENT_SAS_EXP_DS_SMP_CRC_ERROR              (0x00000100)
 957#define MPI_EVENT_SAS_EXP_DS_SUBTRACTIVE_LINK           (0x00000200)
 958#define MPI_EVENT_SAS_EXP_DS_TABLE_LINK                 (0x00000400)
 959#define MPI_EVENT_SAS_EXP_DS_UNSUPPORTED_DEVICE         (0x00000800)
 960
 961/* values for Flags field of SAS Expander Status Change Event data */
 962#define MPI_EVENT_SAS_EXP_FLAGS_ROUTE_TABLE_CONFIG      (0x02)
 963#define MPI_EVENT_SAS_EXP_FLAGS_CONFIG_IN_PROGRESS      (0x01)
 964
 965
 966
 967/*****************************************************************************
 968*
 969*               F i r m w a r e    L o a d    M e s s a g e s
 970*
 971*****************************************************************************/
 972
 973/****************************************************************************/
 974/*  Firmware Download message and associated structures                     */
 975/****************************************************************************/
 976
 977typedef struct _MSG_FW_DOWNLOAD
 978{
 979    U8                      ImageType;                  /* 00h */
 980    U8                      Reserved;                   /* 01h */
 981    U8                      ChainOffset;                /* 02h */
 982    U8                      Function;                   /* 03h */
 983    U8                      Reserved1[3];               /* 04h */
 984    U8                      MsgFlags;                   /* 07h */
 985    U32                     MsgContext;                 /* 08h */
 986    SGE_MPI_UNION           SGL;                        /* 0Ch */
 987} MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
 988  FWDownload_t, MPI_POINTER pFWDownload_t;
 989
 990#define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT    (0x01)
 991
 992#define MPI_FW_DOWNLOAD_ITYPE_RESERVED          (0x00)
 993#define MPI_FW_DOWNLOAD_ITYPE_FW                (0x01)
 994#define MPI_FW_DOWNLOAD_ITYPE_BIOS              (0x02)
 995#define MPI_FW_DOWNLOAD_ITYPE_NVDATA            (0x03)
 996#define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER        (0x04)
 997#define MPI_FW_DOWNLOAD_ITYPE_MANUFACTURING     (0x06)
 998#define MPI_FW_DOWNLOAD_ITYPE_CONFIG_1          (0x07)
 999#define MPI_FW_DOWNLOAD_ITYPE_CONFIG_2          (0x08)
1000#define MPI_FW_DOWNLOAD_ITYPE_MEGARAID          (0x09)

1001#define MPI_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
1002
1003
1004typedef struct _FWDownloadTCSGE
1005{
1006    U8                      Reserved;                   /* 00h */
1007    U8                      ContextSize;                /* 01h */
1008    U8                      DetailsLength;              /* 02h */
1009    U8                      Flags;                      /* 03h */
1010    U32                     Reserved_0100_Checksum;     /* 04h */ /* obsolete Checksum */
1011    U32                     ImageOffset;                /* 08h */
1012    U32                     ImageSize;                  /* 0Ch */
1013} FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE,
1014  FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t;
1015
1016/* Firmware Download reply */
1017typedef struct _MSG_FW_DOWNLOAD_REPLY
1018{
1019    U8                      ImageType;                  /* 00h */
1020    U8                      Reserved;                   /* 01h */
1021    U8                      MsgLength;                  /* 02h */
1022    U8                      Function;                   /* 03h */
1023    U8                      Reserved1[3];               /* 04h */
1024    U8                      MsgFlags;                   /* 07h */
1025    U32                     MsgContext;                 /* 08h */
1026    U16                     Reserved2;                  /* 0Ch */
1027    U16                     IOCStatus;                  /* 0Eh */
1028    U32                     IOCLogInfo;                 /* 10h */
1029} MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY,
1030  FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t;
1031
1032
1033/****************************************************************************/
1034/*  Firmware Upload message and associated structures                       */
1035/****************************************************************************/
1036
1037typedef struct _MSG_FW_UPLOAD
1038{
1039    U8                      ImageType;                  /* 00h */
1040    U8                      Reserved;                   /* 01h */
1041    U8                      ChainOffset;                /* 02h */
1042    U8                      Function;                   /* 03h */
1043    U8                      Reserved1[3];               /* 04h */
1044    U8                      MsgFlags;                   /* 07h */
1045    U32                     MsgContext;                 /* 08h */
1046    SGE_MPI_UNION           SGL;                        /* 0Ch */
1047} MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
1048  FWUpload_t, MPI_POINTER pFWUpload_t;
1049
1050#define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM          (0x00)
1051#define MPI_FW_UPLOAD_ITYPE_FW_FLASH            (0x01)
1052#define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH          (0x02)
1053#define MPI_FW_UPLOAD_ITYPE_NVDATA              (0x03)
1054#define MPI_FW_UPLOAD_ITYPE_BOOTLOADER          (0x04)
1055#define MPI_FW_UPLOAD_ITYPE_FW_BACKUP           (0x05)
1056#define MPI_FW_UPLOAD_ITYPE_MANUFACTURING       (0x06)
1057#define MPI_FW_UPLOAD_ITYPE_CONFIG_1            (0x07)
1058#define MPI_FW_UPLOAD_ITYPE_CONFIG_2            (0x08)
1059#define MPI_FW_UPLOAD_ITYPE_MEGARAID            (0x09)
1060#define MPI_FW_UPLOAD_ITYPE_COMPLETE            (0x0A)
1061#define MPI_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK   (0x0B)
1062
1063typedef struct _FWUploadTCSGE
1064{
1065    U8                      Reserved;                   /* 00h */
1066    U8                      ContextSize;                /* 01h */
1067    U8                      DetailsLength;              /* 02h */
1068    U8                      Flags;                      /* 03h */
1069    U32                     Reserved1;                  /* 04h */
1070    U32                     ImageOffset;                /* 08h */
1071    U32                     ImageSize;                  /* 0Ch */
1072} FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE,
1073  FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t;
1074
1075/* Firmware Upload reply */
1076typedef struct _MSG_FW_UPLOAD_REPLY
1077{
1078    U8                      ImageType;                  /* 00h */
1079    U8                      Reserved;                   /* 01h */
1080    U8                      MsgLength;                  /* 02h */
1081    U8                      Function;                   /* 03h */
1082    U8                      Reserved1[3];               /* 04h */
1083    U8                      MsgFlags;                   /* 07h */
1084    U32                     MsgContext;                 /* 08h */
1085    U16                     Reserved2;                  /* 0Ch */
1086    U16                     IOCStatus;                  /* 0Eh */
1087    U32                     IOCLogInfo;                 /* 10h */
1088    U32                     ActualImageSize;            /* 14h */
1089} MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY,
1090  FWUploadReply_t, MPI_POINTER pFWUploadReply_t;
1091
1092
1093typedef struct _MPI_FW_HEADER
1094{
1095    U32                     ArmBranchInstruction0;      /* 00h */
1096    U32                     Signature0;                 /* 04h */
1097    U32                     Signature1;                 /* 08h */
1098    U32                     Signature2;                 /* 0Ch */
1099    U32                     ArmBranchInstruction1;      /* 10h */
1100    U32                     ArmBranchInstruction2;      /* 14h */
1101    U32                     Reserved;                   /* 18h */
1102    U32                     Checksum;                   /* 1Ch */
1103    U16                     VendorId;                   /* 20h */
1104    U16                     ProductId;                  /* 22h */
1105    MPI_FW_VERSION          FWVersion;                  /* 24h */
1106    U32                     SeqCodeVersion;             /* 28h */
1107    U32                     ImageSize;                  /* 2Ch */
1108    U32                     NextImageHeaderOffset;      /* 30h */
1109    U32                     LoadStartAddress;           /* 34h */
1110    U32                     IopResetVectorValue;        /* 38h */
1111    U32                     IopResetRegAddr;            /* 3Ch */
1112    U32                     VersionNameWhat;            /* 40h */
1113    U8                      VersionName[32];            /* 44h */
1114    U32                     VendorNameWhat;             /* 64h */
1115    U8                      VendorName[32];             /* 68h */
1116} MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER,
1117  MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t;
1118
1119#define MPI_FW_HEADER_WHAT_SIGNATURE        (0x29232840)
1120
1121/* defines for using the ProductId field */
1122#define MPI_FW_HEADER_PID_TYPE_MASK             (0xF000)
1123#define MPI_FW_HEADER_PID_TYPE_SCSI             (0x0000)
1124#define MPI_FW_HEADER_PID_TYPE_FC               (0x1000)
1125#define MPI_FW_HEADER_PID_TYPE_SAS              (0x2000)
1126
1127#define MPI_FW_HEADER_SIGNATURE_0               (0x5AEAA55A)
1128#define MPI_FW_HEADER_SIGNATURE_1               (0xA55AEAA5)
1129#define MPI_FW_HEADER_SIGNATURE_2               (0x5AA55AEA)
1130
1131#define MPI_FW_HEADER_PID_PROD_MASK                     (0x0F00)
1132#define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI           (0x0100)
1133#define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI    (0x0200)
1134#define MPI_FW_HEADER_PID_PROD_TARGET_SCSI              (0x0300)
1135#define MPI_FW_HEADER_PID_PROD_IM_SCSI                  (0x0400)
1136#define MPI_FW_HEADER_PID_PROD_IS_SCSI                  (0x0500)
1137#define MPI_FW_HEADER_PID_PROD_CTX_SCSI                 (0x0600)
1138#define MPI_FW_HEADER_PID_PROD_IR_SCSI                  (0x0700)
1139
1140#define MPI_FW_HEADER_PID_FAMILY_MASK           (0x00FF)
1141/* SCSI */
1142#define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI    (0x0001)
1143#define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI    (0x0002)
1144#define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI    (0x0003)
1145#define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI    (0x0004)
1146#define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI    (0x0005)
1147#define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI    (0x0006)
1148#define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI    (0x0007)
1149#define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI    (0x0008)
1150#define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI    (0x0009)
1151#define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI    (0x000A)
1152#define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI   (0x000B)
1153#define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI   (0x000C)
1154/* Fibre Channel */
1155#define MPI_FW_HEADER_PID_FAMILY_909_FC         (0x0000)
1156#define MPI_FW_HEADER_PID_FAMILY_919_FC         (0x0001) /* 919 and 929     */
1157#define MPI_FW_HEADER_PID_FAMILY_919X_FC        (0x0002) /* 919X and 929X   */
1158#define MPI_FW_HEADER_PID_FAMILY_919XL_FC       (0x0003) /* 919XL and 929XL */
1159#define MPI_FW_HEADER_PID_FAMILY_939X_FC        (0x0004) /* 939X and 949X   */
1160#define MPI_FW_HEADER_PID_FAMILY_959_FC         (0x0005)
1161#define MPI_FW_HEADER_PID_FAMILY_949E_FC        (0x0006)
1162/* SAS */
1163#define MPI_FW_HEADER_PID_FAMILY_1064_SAS       (0x0001)
1164#define MPI_FW_HEADER_PID_FAMILY_1068_SAS       (0x0002)
1165#define MPI_FW_HEADER_PID_FAMILY_1078_SAS       (0x0003)
1166#define MPI_FW_HEADER_PID_FAMILY_106xE_SAS      (0x0004) /* 1068E, 1066E, and 1064E */
1167
1168typedef struct _MPI_EXT_IMAGE_HEADER
1169{
1170    U8                      ImageType;                  /* 00h */
1171    U8                      Reserved;                   /* 01h */
1172    U16                     Reserved1;                  /* 02h */
1173    U32                     Checksum;                   /* 04h */
1174    U32                     ImageSize;                  /* 08h */
1175    U32                     NextImageHeaderOffset;      /* 0Ch */
1176    U32                     LoadStartAddress;           /* 10h */
1177    U32                     Reserved2;                  /* 14h */
1178} MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
1179  MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
1180
1181/* defines for the ImageType field */
1182#define MPI_EXT_IMAGE_TYPE_UNSPECIFIED          (0x00)
1183#define MPI_EXT_IMAGE_TYPE_FW                   (0x01)
1184#define MPI_EXT_IMAGE_TYPE_NVDATA               (0x03)
1185#define MPI_EXT_IMAGE_TYPE_BOOTLOADER           (0x04)
1186#define MPI_EXT_IMAGE_TYPE_INITIALIZATION       (0x05)
1187
1188#endif
1189