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56#include <linux/module.h>
57#include <linux/moduleparam.h>
58#include <linux/init.h>
59#include <linux/ioport.h>
60#include <linux/platform_device.h>
61#include <linux/interrupt.h>
62#include <linux/blkdev.h>
63#include <linux/delay.h>
64#include <linux/err.h>
65#include <linux/dma-mapping.h>
66#include <linux/clk.h>
67#include <linux/atmel_pdc.h>
68
69#include <linux/mmc/host.h>
70
71#include <asm/io.h>
72#include <asm/irq.h>
73#include <asm/mach/mmc.h>
74#include <asm/arch/board.h>
75#include <asm/arch/cpu.h>
76#include <asm/arch/gpio.h>
77#include <asm/arch/at91_mci.h>
78
79#define DRIVER_NAME "at91_mci"
80
81#define FL_SENT_COMMAND (1 << 0)
82#define FL_SENT_STOP (1 << 1)
83
84#define AT91_MCI_ERRORS (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE \
85 | AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE \
86 | AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)
87
88#define at91_mci_read(host, reg) __raw_readl((host)->baseaddr + (reg))
89#define at91_mci_write(host, reg, val) __raw_writel((val), (host)->baseaddr + (reg))
90
91
92
93
94
95struct at91mci_host
96{
97 struct mmc_host *mmc;
98 struct mmc_command *cmd;
99 struct mmc_request *request;
100
101 void __iomem *baseaddr;
102 int irq;
103
104 struct at91_mmc_data *board;
105 int present;
106
107 struct clk *mci_clk;
108
109
110
111
112
113 unsigned int flags;
114
115 u32 bus_mode;
116
117
118 unsigned int* buffer;
119 dma_addr_t physical_address;
120 unsigned int total_length;
121
122
123 int in_use_index;
124
125
126 int transfer_index;
127};
128
129
130
131
132static inline void at91_mci_sg_to_dma(struct at91mci_host *host, struct mmc_data *data)
133{
134 unsigned int len, i, size;
135 unsigned *dmabuf = host->buffer;
136
137 size = host->total_length;
138 len = data->sg_len;
139
140
141
142
143
144
145 for (i = 0; i < len; i++) {
146 struct scatterlist *sg;
147 int amount;
148 unsigned int *sgbuffer;
149
150 sg = &data->sg[i];
151
152 sgbuffer = kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
153 amount = min(size, sg->length);
154 size -= amount;
155
156 if (cpu_is_at91rm9200()) {
157 int index;
158
159 for (index = 0; index < (amount / 4); index++)
160 *dmabuf++ = swab32(sgbuffer[index]);
161 }
162 else
163 memcpy(dmabuf, sgbuffer, amount);
164
165 kunmap_atomic(sgbuffer, KM_BIO_SRC_IRQ);
166
167 if (size == 0)
168 break;
169 }
170
171
172
173
174
175 BUG_ON(size != 0);
176}
177
178
179
180
181static void at91_mci_pre_dma_read(struct at91mci_host *host)
182{
183 int i;
184 struct scatterlist *sg;
185 struct mmc_command *cmd;
186 struct mmc_data *data;
187
188 pr_debug("pre dma read\n");
189
190 cmd = host->cmd;
191 if (!cmd) {
192 pr_debug("no command\n");
193 return;
194 }
195
196 data = cmd->data;
197 if (!data) {
198 pr_debug("no data\n");
199 return;
200 }
201
202 for (i = 0; i < 2; i++) {
203
204 if (host->transfer_index >= data->sg_len) {
205 pr_debug("Nothing left to transfer (index = %d)\n", host->transfer_index);
206 break;
207 }
208
209
210 if (i == 0) {
211 if (at91_mci_read(host, ATMEL_PDC_RCR) != 0) {
212 pr_debug("Transfer active in current\n");
213 continue;
214 }
215 }
216 else {
217 if (at91_mci_read(host, ATMEL_PDC_RNCR) != 0) {
218 pr_debug("Transfer active in next\n");
219 continue;
220 }
221 }
222
223
224 pr_debug("Using transfer index %d\n", host->transfer_index);
225
226 sg = &data->sg[host->transfer_index++];
227 pr_debug("sg = %p\n", sg);
228
229 sg->dma_address = dma_map_page(NULL, sg_page(sg), sg->offset, sg->length, DMA_FROM_DEVICE);
230
231 pr_debug("dma address = %08X, length = %d\n", sg->dma_address, sg->length);
232
233 if (i == 0) {
234 at91_mci_write(host, ATMEL_PDC_RPR, sg->dma_address);
235 at91_mci_write(host, ATMEL_PDC_RCR, sg->length / 4);
236 }
237 else {
238 at91_mci_write(host, ATMEL_PDC_RNPR, sg->dma_address);
239 at91_mci_write(host, ATMEL_PDC_RNCR, sg->length / 4);
240 }
241 }
242
243 pr_debug("pre dma read done\n");
244}
245
246
247
248
249static void at91_mci_post_dma_read(struct at91mci_host *host)
250{
251 struct mmc_command *cmd;
252 struct mmc_data *data;
253
254 pr_debug("post dma read\n");
255
256 cmd = host->cmd;
257 if (!cmd) {
258 pr_debug("no command\n");
259 return;
260 }
261
262 data = cmd->data;
263 if (!data) {
264 pr_debug("no data\n");
265 return;
266 }
267
268 while (host->in_use_index < host->transfer_index) {
269 struct scatterlist *sg;
270
271 pr_debug("finishing index %d\n", host->in_use_index);
272
273 sg = &data->sg[host->in_use_index++];
274
275 pr_debug("Unmapping page %08X\n", sg->dma_address);
276
277 dma_unmap_page(NULL, sg->dma_address, sg->length, DMA_FROM_DEVICE);
278
279 data->bytes_xfered += sg->length;
280
281 if (cpu_is_at91rm9200()) {
282 unsigned int *buffer;
283 int index;
284
285
286 buffer = kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
287 pr_debug("buffer = %p, length = %d\n", buffer, sg->length);
288
289 for (index = 0; index < (sg->length / 4); index++)
290 buffer[index] = swab32(buffer[index]);
291
292 kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
293 }
294
295 flush_dcache_page(sg_page(sg));
296 }
297
298
299 if (host->transfer_index < data->sg_len)
300 at91_mci_pre_dma_read(host);
301 else {
302 at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_ENDRX);
303 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF);
304 }
305
306 pr_debug("post dma read done\n");
307}
308
309
310
311
312static void at91_mci_handle_transmitted(struct at91mci_host *host)
313{
314 struct mmc_command *cmd;
315 struct mmc_data *data;
316
317 pr_debug("Handling the transmit\n");
318
319
320 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
321
322
323 at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE);
324
325 cmd = host->cmd;
326 if (!cmd) return;
327
328 data = cmd->data;
329 if (!data) return;
330
331 if (cmd->data->blocks > 1) {
332 pr_debug("multiple write : wait for BLKE...\n");
333 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE);
334 } else
335 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
336
337 data->bytes_xfered = host->total_length;
338}
339
340
341static int at91_mci_handle_cmdrdy(struct at91mci_host *host)
342{
343 if (!host->cmd)
344 return 1;
345 else if (!host->cmd->data) {
346 if (host->flags & FL_SENT_STOP) {
347
348 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
349 } else return 1;
350 } else if (host->cmd->data->flags & MMC_DATA_WRITE) {
351
352 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_TXBUFE);
353 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE);
354 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
355 }
356
357
358 return 0;
359}
360
361
362
363
364
365static void at91_mci_enable(struct at91mci_host *host)
366{
367 unsigned int mr;
368
369 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
370 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
371 at91_mci_write(host, AT91_MCI_DTOR, AT91_MCI_DTOMUL_1M | AT91_MCI_DTOCYC);
372 mr = AT91_MCI_PDCMODE | 0x34a;
373
374 if (cpu_is_at91sam9260() || cpu_is_at91sam9263())
375 mr |= AT91_MCI_RDPROOF | AT91_MCI_WRPROOF;
376
377 at91_mci_write(host, AT91_MCI_MR, mr);
378
379
380 at91_mci_write(host, AT91_MCI_SDCR, host->board->slot_b);
381}
382
383
384
385
386static void at91_mci_disable(struct at91mci_host *host)
387{
388 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS | AT91_MCI_SWRST);
389}
390
391
392
393
394static void at91_mci_send_command(struct at91mci_host *host, struct mmc_command *cmd)
395{
396 unsigned int cmdr, mr;
397 unsigned int block_length;
398 struct mmc_data *data = cmd->data;
399
400 unsigned int blocks;
401 unsigned int ier = 0;
402
403 host->cmd = cmd;
404
405
406 if ((at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) {
407 pr_debug("Clearing timeout\n");
408 at91_mci_write(host, AT91_MCI_ARGR, 0);
409 at91_mci_write(host, AT91_MCI_CMDR, AT91_MCI_OPDCMD);
410 while (!(at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_CMDRDY)) {
411
412 pr_debug("Clearing: SR = %08X\n", at91_mci_read(host, AT91_MCI_SR));
413 }
414 }
415
416 cmdr = cmd->opcode;
417
418 if (mmc_resp_type(cmd) == MMC_RSP_NONE)
419 cmdr |= AT91_MCI_RSPTYP_NONE;
420 else {
421
422 cmdr |= AT91_MCI_MAXLAT;
423
424 if (mmc_resp_type(cmd) == MMC_RSP_R2)
425 cmdr |= AT91_MCI_RSPTYP_136;
426 else
427 cmdr |= AT91_MCI_RSPTYP_48;
428 }
429
430 if (data) {
431
432 if ( data->blksz & 0x3 ) {
433 pr_debug("Unsupported block size\n");
434 cmd->error = -EINVAL;
435 mmc_request_done(host->mmc, host->request);
436 return;
437 }
438
439 block_length = data->blksz;
440 blocks = data->blocks;
441
442
443 if (data->flags & MMC_DATA_READ)
444 cmdr |= (AT91_MCI_TRDIR | AT91_MCI_TRCMD_START);
445 else if (data->flags & MMC_DATA_WRITE)
446 cmdr |= AT91_MCI_TRCMD_START;
447
448 if (data->flags & MMC_DATA_STREAM)
449 cmdr |= AT91_MCI_TRTYP_STREAM;
450 if (data->blocks > 1)
451 cmdr |= AT91_MCI_TRTYP_MULTIPLE;
452 }
453 else {
454 block_length = 0;
455 blocks = 0;
456 }
457
458 if (host->flags & FL_SENT_STOP)
459 cmdr |= AT91_MCI_TRCMD_STOP;
460
461 if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
462 cmdr |= AT91_MCI_OPDCMD;
463
464
465
466
467 pr_debug("Sending command %d as %08X, arg = %08X, blocks = %d, length = %d (MR = %08X)\n",
468 cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(host, AT91_MCI_MR));
469
470 if (!data) {
471 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTDIS | ATMEL_PDC_RXTDIS);
472 at91_mci_write(host, ATMEL_PDC_RPR, 0);
473 at91_mci_write(host, ATMEL_PDC_RCR, 0);
474 at91_mci_write(host, ATMEL_PDC_RNPR, 0);
475 at91_mci_write(host, ATMEL_PDC_RNCR, 0);
476 at91_mci_write(host, ATMEL_PDC_TPR, 0);
477 at91_mci_write(host, ATMEL_PDC_TCR, 0);
478 at91_mci_write(host, ATMEL_PDC_TNPR, 0);
479 at91_mci_write(host, ATMEL_PDC_TNCR, 0);
480 ier = AT91_MCI_CMDRDY;
481 } else {
482
483 mr = at91_mci_read(host, AT91_MCI_MR) & 0x7fff;
484 at91_mci_write(host, AT91_MCI_MR, mr | (block_length << 16) | AT91_MCI_PDCMODE);
485
486
487
488
489 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
490
491 if (cmdr & AT91_MCI_TRCMD_START) {
492 data->bytes_xfered = 0;
493 host->transfer_index = 0;
494 host->in_use_index = 0;
495 if (cmdr & AT91_MCI_TRDIR) {
496
497
498
499 host->buffer = NULL;
500 host->total_length = 0;
501
502 at91_mci_pre_dma_read(host);
503 ier = AT91_MCI_ENDRX ;
504 }
505 else {
506
507
508
509 host->total_length = block_length * blocks;
510 host->buffer = dma_alloc_coherent(NULL,
511 host->total_length,
512 &host->physical_address, GFP_KERNEL);
513
514 at91_mci_sg_to_dma(host, data);
515
516 pr_debug("Transmitting %d bytes\n", host->total_length);
517
518 at91_mci_write(host, ATMEL_PDC_TPR, host->physical_address);
519 at91_mci_write(host, ATMEL_PDC_TCR, host->total_length / 4);
520 ier = AT91_MCI_CMDRDY;
521 }
522 }
523 }
524
525
526
527
528
529
530 at91_mci_write(host, AT91_MCI_ARGR, cmd->arg);
531 at91_mci_write(host, AT91_MCI_CMDR, cmdr);
532
533 if (cmdr & AT91_MCI_TRCMD_START) {
534 if (cmdr & AT91_MCI_TRDIR)
535 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
536 }
537
538
539 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_ERRORS | ier);
540}
541
542
543
544
545static void at91_mci_process_next(struct at91mci_host *host)
546{
547 if (!(host->flags & FL_SENT_COMMAND)) {
548 host->flags |= FL_SENT_COMMAND;
549 at91_mci_send_command(host, host->request->cmd);
550 }
551 else if ((!(host->flags & FL_SENT_STOP)) && host->request->stop) {
552 host->flags |= FL_SENT_STOP;
553 at91_mci_send_command(host, host->request->stop);
554 }
555 else
556 mmc_request_done(host->mmc, host->request);
557}
558
559
560
561
562static void at91_mci_completed_command(struct at91mci_host *host)
563{
564 struct mmc_command *cmd = host->cmd;
565 unsigned int status;
566
567 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
568
569 cmd->resp[0] = at91_mci_read(host, AT91_MCI_RSPR(0));
570 cmd->resp[1] = at91_mci_read(host, AT91_MCI_RSPR(1));
571 cmd->resp[2] = at91_mci_read(host, AT91_MCI_RSPR(2));
572 cmd->resp[3] = at91_mci_read(host, AT91_MCI_RSPR(3));
573
574 if (host->buffer) {
575 dma_free_coherent(NULL, host->total_length, host->buffer, host->physical_address);
576 host->buffer = NULL;
577 }
578
579 status = at91_mci_read(host, AT91_MCI_SR);
580
581 pr_debug("Status = %08X [%08X %08X %08X %08X]\n",
582 status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
583
584 if (status & AT91_MCI_ERRORS) {
585 if ((status & AT91_MCI_RCRCE) && !(mmc_resp_type(cmd) & MMC_RSP_CRC)) {
586 cmd->error = 0;
587 }
588 else {
589 if (status & (AT91_MCI_RTOE | AT91_MCI_DTOE))
590 cmd->error = -ETIMEDOUT;
591 else if (status & (AT91_MCI_RCRCE | AT91_MCI_DCRCE))
592 cmd->error = -EILSEQ;
593 else
594 cmd->error = -EIO;
595
596 pr_debug("Error detected and set to %d (cmd = %d, retries = %d)\n",
597 cmd->error, cmd->opcode, cmd->retries);
598 }
599 }
600 else
601 cmd->error = 0;
602
603 at91_mci_process_next(host);
604}
605
606
607
608
609static void at91_mci_request(struct mmc_host *mmc, struct mmc_request *mrq)
610{
611 struct at91mci_host *host = mmc_priv(mmc);
612 host->request = mrq;
613 host->flags = 0;
614
615 at91_mci_process_next(host);
616}
617
618
619
620
621static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
622{
623 int clkdiv;
624 struct at91mci_host *host = mmc_priv(mmc);
625 unsigned long at91_master_clock = clk_get_rate(host->mci_clk);
626
627 host->bus_mode = ios->bus_mode;
628
629 if (ios->clock == 0) {
630
631 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS);
632 clkdiv = 0;
633 }
634 else {
635
636 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
637
638 if ((at91_master_clock % (ios->clock * 2)) == 0)
639 clkdiv = ((at91_master_clock / ios->clock) / 2) - 1;
640 else
641 clkdiv = (at91_master_clock / ios->clock) / 2;
642
643 pr_debug("clkdiv = %d. mcck = %ld\n", clkdiv,
644 at91_master_clock / (2 * (clkdiv + 1)));
645 }
646 if (ios->bus_width == MMC_BUS_WIDTH_4 && host->board->wire4) {
647 pr_debug("MMC: Setting controller bus width to 4\n");
648 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) | AT91_MCI_SDCBUS);
649 }
650 else {
651 pr_debug("MMC: Setting controller bus width to 1\n");
652 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
653 }
654
655
656 at91_mci_write(host, AT91_MCI_MR, (at91_mci_read(host, AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv);
657
658
659 if (host->board->vcc_pin) {
660 switch (ios->power_mode) {
661 case MMC_POWER_OFF:
662 at91_set_gpio_value(host->board->vcc_pin, 0);
663 break;
664 case MMC_POWER_UP:
665 case MMC_POWER_ON:
666 at91_set_gpio_value(host->board->vcc_pin, 1);
667 break;
668 }
669 }
670}
671
672
673
674
675static irqreturn_t at91_mci_irq(int irq, void *devid)
676{
677 struct at91mci_host *host = devid;
678 int completed = 0;
679 unsigned int int_status, int_mask;
680
681 int_status = at91_mci_read(host, AT91_MCI_SR);
682 int_mask = at91_mci_read(host, AT91_MCI_IMR);
683
684 pr_debug("MCI irq: status = %08X, %08X, %08X\n", int_status, int_mask,
685 int_status & int_mask);
686
687 int_status = int_status & int_mask;
688
689 if (int_status & AT91_MCI_ERRORS) {
690 completed = 1;
691
692 if (int_status & AT91_MCI_UNRE)
693 pr_debug("MMC: Underrun error\n");
694 if (int_status & AT91_MCI_OVRE)
695 pr_debug("MMC: Overrun error\n");
696 if (int_status & AT91_MCI_DTOE)
697 pr_debug("MMC: Data timeout\n");
698 if (int_status & AT91_MCI_DCRCE)
699 pr_debug("MMC: CRC error in data\n");
700 if (int_status & AT91_MCI_RTOE)
701 pr_debug("MMC: Response timeout\n");
702 if (int_status & AT91_MCI_RENDE)
703 pr_debug("MMC: Response end bit error\n");
704 if (int_status & AT91_MCI_RCRCE)
705 pr_debug("MMC: Response CRC error\n");
706 if (int_status & AT91_MCI_RDIRE)
707 pr_debug("MMC: Response direction error\n");
708 if (int_status & AT91_MCI_RINDE)
709 pr_debug("MMC: Response index error\n");
710 } else {
711
712
713 if (int_status & AT91_MCI_TXBUFE) {
714 pr_debug("TX buffer empty\n");
715 at91_mci_handle_transmitted(host);
716 }
717
718 if (int_status & AT91_MCI_ENDRX) {
719 pr_debug("ENDRX\n");
720 at91_mci_post_dma_read(host);
721 }
722
723 if (int_status & AT91_MCI_RXBUFF) {
724 pr_debug("RX buffer full\n");
725 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
726 at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_RXBUFF | AT91_MCI_ENDRX);
727 completed = 1;
728 }
729
730 if (int_status & AT91_MCI_ENDTX)
731 pr_debug("Transmit has ended\n");
732
733 if (int_status & AT91_MCI_NOTBUSY) {
734 pr_debug("Card is ready\n");
735 completed = 1;
736 }
737
738 if (int_status & AT91_MCI_DTIP)
739 pr_debug("Data transfer in progress\n");
740
741 if (int_status & AT91_MCI_BLKE) {
742 pr_debug("Block transfer has ended\n");
743 completed = 1;
744 }
745
746 if (int_status & AT91_MCI_TXRDY)
747 pr_debug("Ready to transmit\n");
748
749 if (int_status & AT91_MCI_RXRDY)
750 pr_debug("Ready to receive\n");
751
752 if (int_status & AT91_MCI_CMDRDY) {
753 pr_debug("Command ready\n");
754 completed = at91_mci_handle_cmdrdy(host);
755 }
756 }
757
758 if (completed) {
759 pr_debug("Completed command\n");
760 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
761 at91_mci_completed_command(host);
762 } else
763 at91_mci_write(host, AT91_MCI_IDR, int_status);
764
765 return IRQ_HANDLED;
766}
767
768static irqreturn_t at91_mmc_det_irq(int irq, void *_host)
769{
770 struct at91mci_host *host = _host;
771 int present = !at91_get_gpio_value(irq);
772
773
774
775
776
777 if (present != host->present) {
778 host->present = present;
779 pr_debug("%s: card %s\n", mmc_hostname(host->mmc),
780 present ? "insert" : "remove");
781 if (!present) {
782 pr_debug("****** Resetting SD-card bus width ******\n");
783 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
784 }
785 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
786 }
787 return IRQ_HANDLED;
788}
789
790static int at91_mci_get_ro(struct mmc_host *mmc)
791{
792 int read_only = 0;
793 struct at91mci_host *host = mmc_priv(mmc);
794
795 if (host->board->wp_pin) {
796 read_only = at91_get_gpio_value(host->board->wp_pin);
797 printk(KERN_WARNING "%s: card is %s\n", mmc_hostname(mmc),
798 (read_only ? "read-only" : "read-write") );
799 }
800 else {
801 printk(KERN_WARNING "%s: host does not support reading read-only "
802 "switch. Assuming write-enable.\n", mmc_hostname(mmc));
803 }
804 return read_only;
805}
806
807static const struct mmc_host_ops at91_mci_ops = {
808 .request = at91_mci_request,
809 .set_ios = at91_mci_set_ios,
810 .get_ro = at91_mci_get_ro,
811};
812
813
814
815
816static int __init at91_mci_probe(struct platform_device *pdev)
817{
818 struct mmc_host *mmc;
819 struct at91mci_host *host;
820 struct resource *res;
821 int ret;
822
823 pr_debug("Probe MCI devices\n");
824
825 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
826 if (!res)
827 return -ENXIO;
828
829 if (!request_mem_region(res->start, res->end - res->start + 1, DRIVER_NAME))
830 return -EBUSY;
831
832 mmc = mmc_alloc_host(sizeof(struct at91mci_host), &pdev->dev);
833 if (!mmc) {
834 pr_debug("Failed to allocate mmc host\n");
835 release_mem_region(res->start, res->end - res->start + 1);
836 return -ENOMEM;
837 }
838
839 mmc->ops = &at91_mci_ops;
840 mmc->f_min = 375000;
841 mmc->f_max = 25000000;
842 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
843
844 mmc->max_blk_size = 4095;
845 mmc->max_blk_count = mmc->max_req_size;
846
847 host = mmc_priv(mmc);
848 host->mmc = mmc;
849 host->buffer = NULL;
850 host->bus_mode = 0;
851 host->board = pdev->dev.platform_data;
852 if (host->board->wire4) {
853 if (cpu_is_at91sam9260() || cpu_is_at91sam9263())
854 mmc->caps |= MMC_CAP_4_BIT_DATA;
855 else
856 printk("AT91 MMC: 4 wire bus mode not supported"
857 " - using 1 wire\n");
858 }
859
860
861
862
863 host->mci_clk = clk_get(&pdev->dev, "mci_clk");
864 if (IS_ERR(host->mci_clk)) {
865 printk(KERN_ERR "AT91 MMC: no clock defined.\n");
866 mmc_free_host(mmc);
867 release_mem_region(res->start, res->end - res->start + 1);
868 return -ENODEV;
869 }
870
871
872
873
874 host->baseaddr = ioremap(res->start, res->end - res->start + 1);
875 if (!host->baseaddr) {
876 clk_put(host->mci_clk);
877 mmc_free_host(mmc);
878 release_mem_region(res->start, res->end - res->start + 1);
879 return -ENOMEM;
880 }
881
882
883
884
885 clk_enable(host->mci_clk);
886 at91_mci_disable(host);
887 at91_mci_enable(host);
888
889
890
891
892 host->irq = platform_get_irq(pdev, 0);
893 ret = request_irq(host->irq, at91_mci_irq, IRQF_SHARED, DRIVER_NAME, host);
894 if (ret) {
895 printk(KERN_ERR "AT91 MMC: Failed to request MCI interrupt\n");
896 clk_disable(host->mci_clk);
897 clk_put(host->mci_clk);
898 mmc_free_host(mmc);
899 iounmap(host->baseaddr);
900 release_mem_region(res->start, res->end - res->start + 1);
901 return ret;
902 }
903
904 platform_set_drvdata(pdev, mmc);
905
906
907
908
909 if (host->board->det_pin) {
910 host->present = !at91_get_gpio_value(host->board->det_pin);
911 device_init_wakeup(&pdev->dev, 1);
912 }
913 else
914 host->present = -1;
915
916 mmc_add_host(mmc);
917
918
919
920
921 if (host->board->det_pin) {
922 ret = request_irq(host->board->det_pin, at91_mmc_det_irq,
923 0, DRIVER_NAME, host);
924 if (ret)
925 printk(KERN_ERR "AT91 MMC: Couldn't allocate MMC detect irq\n");
926 }
927
928 pr_debug("Added MCI driver\n");
929
930 return 0;
931}
932
933
934
935
936static int __exit at91_mci_remove(struct platform_device *pdev)
937{
938 struct mmc_host *mmc = platform_get_drvdata(pdev);
939 struct at91mci_host *host;
940 struct resource *res;
941
942 if (!mmc)
943 return -1;
944
945 host = mmc_priv(mmc);
946
947 if (host->board->det_pin) {
948 device_init_wakeup(&pdev->dev, 0);
949 free_irq(host->board->det_pin, host);
950 cancel_delayed_work(&host->mmc->detect);
951 }
952
953 at91_mci_disable(host);
954 mmc_remove_host(mmc);
955 free_irq(host->irq, host);
956
957 clk_disable(host->mci_clk);
958 clk_put(host->mci_clk);
959
960 iounmap(host->baseaddr);
961 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
962 release_mem_region(res->start, res->end - res->start + 1);
963
964 mmc_free_host(mmc);
965 platform_set_drvdata(pdev, NULL);
966 pr_debug("MCI Removed\n");
967
968 return 0;
969}
970
971#ifdef CONFIG_PM
972static int at91_mci_suspend(struct platform_device *pdev, pm_message_t state)
973{
974 struct mmc_host *mmc = platform_get_drvdata(pdev);
975 struct at91mci_host *host = mmc_priv(mmc);
976 int ret = 0;
977
978 if (host->board->det_pin && device_may_wakeup(&pdev->dev))
979 enable_irq_wake(host->board->det_pin);
980
981 if (mmc)
982 ret = mmc_suspend_host(mmc, state);
983
984 return ret;
985}
986
987static int at91_mci_resume(struct platform_device *pdev)
988{
989 struct mmc_host *mmc = platform_get_drvdata(pdev);
990 struct at91mci_host *host = mmc_priv(mmc);
991 int ret = 0;
992
993 if (host->board->det_pin && device_may_wakeup(&pdev->dev))
994 disable_irq_wake(host->board->det_pin);
995
996 if (mmc)
997 ret = mmc_resume_host(mmc);
998
999 return ret;
1000}
1001#else
1002#define at91_mci_suspend NULL
1003#define at91_mci_resume NULL
1004#endif
1005
1006static struct platform_driver at91_mci_driver = {
1007 .remove = __exit_p(at91_mci_remove),
1008 .suspend = at91_mci_suspend,
1009 .resume = at91_mci_resume,
1010 .driver = {
1011 .name = DRIVER_NAME,
1012 .owner = THIS_MODULE,
1013 },
1014};
1015
1016static int __init at91_mci_init(void)
1017{
1018 return platform_driver_probe(&at91_mci_driver, at91_mci_probe);
1019}
1020
1021static void __exit at91_mci_exit(void)
1022{
1023 platform_driver_unregister(&at91_mci_driver);
1024}
1025
1026module_init(at91_mci_init);
1027module_exit(at91_mci_exit);
1028
1029MODULE_DESCRIPTION("AT91 Multimedia Card Interface driver");
1030MODULE_AUTHOR("Nick Randell");
1031MODULE_LICENSE("GPL");
1032