LXR linux/drivers/net/chelsio/cphy.h

   1/*****************************************************************************
   2 *                                                                           *
   3 * File: cphy.h                                                              *
   4 * $Revision: 1.7 $                                                          *
   5 * $Date: 2005/06/21 18:29:47 $                                              *
   6 * Description:                                                              *
   7 *  part of the Chelsio 10Gb Ethernet Driver.                                *
   8 *                                                                           *
   9 * This program is free software; you can redistribute it and/or modify      *
  10 * it under the terms of the GNU General Public License, version 2, as       *
  11 * published by the Free Software Foundation.                                *
  12 *                                                                           *
  13 * You should have received a copy of the GNU General Public License along   *
  14 * with this program; if not, write to the Free Software Foundation, Inc.,   *
  15 * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.                 *
  16 *                                                                           *
  17 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED    *
  18 * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF      *
  19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.                     *
  20 *                                                                           *
  21 * http://www.chelsio.com                                                    *
  22 *                                                                           *
  23 * Copyright (c) 2003 - 2005 Chelsio Communications, Inc.                    *
  24 * All rights reserved.                                                      *
  25 *                                                                           *
  26 * Maintainers: maintainers@chelsio.com                                      *
  27 *                                                                           *
  28 * Authors: Dimitrios Michailidis   <dm@chelsio.com>                         *
  29 *          Tina Yang               <tainay@chelsio.com>                     *
  30 *          Felix Marti             <felix@chelsio.com>                      *
  31 *          Scott Bardone           <sbardone@chelsio.com>                   *
  32 *          Kurt Ottaway            <kottaway@chelsio.com>                   *
  33 *          Frank DiMambro          <frank@chelsio.com>                      *
  34 *                                                                           *
  35 * History:                                                                  *
  36 *                                                                           *
  37 ****************************************************************************/
  38
  39#ifndef _CXGB_CPHY_H_
  40#define _CXGB_CPHY_H_
  41
  42#include "common.h"
  43
  44struct mdio_ops {
  45        void (*init)(adapter_t *adapter, const struct board_info *bi);
  46        int  (*read)(adapter_t *adapter, int phy_addr, int mmd_addr,
  47                     int reg_addr, unsigned int *val);
  48        int  (*write)(adapter_t *adapter, int phy_addr, int mmd_addr,
  49                      int reg_addr, unsigned int val);
  50};
  51
  52/* PHY interrupt types */
  53enum {
  54        cphy_cause_link_change = 0x1,
  55        cphy_cause_error = 0x2,
  56        cphy_cause_fifo_error = 0x3
  57};
  58
  59enum {
  60        PHY_LINK_UP = 0x1,
  61        PHY_AUTONEG_RDY = 0x2,
  62        PHY_AUTONEG_EN = 0x4
  63};
  64
  65struct cphy;
  66
  67/* PHY operations */
  68struct cphy_ops {
  69        void (*destroy)(struct cphy *);
  70        int (*reset)(struct cphy *, int wait);
  71
  72        int (*interrupt_enable)(struct cphy *);
  73        int (*interrupt_disable)(struct cphy *);
  74        int (*interrupt_clear)(struct cphy *);
  75        int (*interrupt_handler)(struct cphy *);
  76
  77        int (*autoneg_enable)(struct cphy *);
  78        int (*autoneg_disable)(struct cphy *);
  79        int (*autoneg_restart)(struct cphy *);
  80
  81        int (*advertise)(struct cphy *phy, unsigned int advertise_map);
  82        int (*set_loopback)(struct cphy *, int on);
  83        int (*set_speed_duplex)(struct cphy *phy, int speed, int duplex);
  84        int (*get_link_status)(struct cphy *phy, int *link_ok, int *speed,
  85                               int *duplex, int *fc);
  86};
  87
  88/* A PHY instance */
  89struct cphy {
  90        int addr;                            /* PHY address */
  91        int state;      /* Link status state machine */
  92        adapter_t *adapter;                  /* associated adapter */
  93
  94        struct delayed_work phy_update;
  95
  96        u16 bmsr;
  97        int count;
  98        int act_count;
  99        int act_on;
 100
 101        u32 elmer_gpo;
 102
 103        const struct cphy_ops *ops;            /* PHY operations */
 104        int (*mdio_read)(adapter_t *adapter, int phy_addr, int mmd_addr,
 105                         int reg_addr, unsigned int *val);
 106        int (*mdio_write)(adapter_t *adapter, int phy_addr, int mmd_addr,
 107                          int reg_addr, unsigned int val);
 108        struct cphy_instance *instance;
 109};
 110
 111/* Convenience MDIO read/write wrappers */
 112static inline int mdio_read(struct cphy *cphy, int mmd, int reg,
 113                            unsigned int *valp)
 114{
 115        return cphy->mdio_read(cphy->adapter, cphy->addr, mmd, reg, valp);
 116}
 117
 118static inline int mdio_write(struct cphy *cphy, int mmd, int reg,
 119                             unsigned int val)
 120{
 121        return cphy->mdio_write(cphy->adapter, cphy->addr, mmd, reg, val);
 122}
 123
 124static inline int simple_mdio_read(struct cphy *cphy, int reg,
 125                                   unsigned int *valp)
 126{
 127        return mdio_read(cphy, 0, reg, valp);
 128}
 129
 130static inline int simple_mdio_write(struct cphy *cphy, int reg,
 131                                    unsigned int val)
 132{
 133        return mdio_write(cphy, 0, reg, val);
 134}
 135
 136/* Convenience initializer */
 137static inline void cphy_init(struct cphy *phy, adapter_t *adapter,
 138                             int phy_addr, struct cphy_ops *phy_ops,
 139                             const struct mdio_ops *mdio_ops)
 140{
 141        phy->adapter = adapter;
 142        phy->addr    = phy_addr;
 143        phy->ops     = phy_ops;
 144        if (mdio_ops) {
 145                phy->mdio_read  = mdio_ops->read;
 146                phy->mdio_write = mdio_ops->write;
 147        }
 148}
 149
 150/* Operations of the PHY-instance factory */
 151struct gphy {
 152        /* Construct a PHY instance with the given PHY address */
 153        struct cphy *(*create)(adapter_t *adapter, int phy_addr,
 154                               const struct mdio_ops *mdio_ops);
 155
 156        /*
 157         * Reset the PHY chip.  This resets the whole PHY chip, not individual
 158         * ports.
 159         */
 160        int (*reset)(adapter_t *adapter);
 161};
 162
 163extern const struct gphy t1_my3126_ops;
 164extern const struct gphy t1_mv88e1xxx_ops;
 165extern const struct gphy t1_vsc8244_ops;
 166extern const struct gphy t1_mv88x201x_ops;
 167
 168#endif /* _CXGB_CPHY_H_ */
 169