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23#include <sound/driver.h>
24#include <linux/delay.h>
25#include <linux/init.h>
26#include <linux/interrupt.h>
27#include <linux/pci.h>
28#include <linux/slab.h>
29#include <linux/moduleparam.h>
30
31#include <sound/core.h>
32#include <sound/control.h>
33#include <sound/pcm.h>
34#include <sound/info.h>
35#include <sound/asoundef.h>
36#include <sound/initval.h>
37
38#include <asm/current.h>
39#include <asm/io.h>
40
41static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
42static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
43static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
44static int precise_ptr[SNDRV_CARDS];
45
46module_param_array(index, int, NULL, 0444);
47MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
48module_param_array(id, charp, NULL, 0444);
49MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
50module_param_array(enable, bool, NULL, 0444);
51MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
52module_param_array(precise_ptr, bool, NULL, 0444);
53MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
54MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
55MODULE_DESCRIPTION("RME Digi9652/Digi9636");
56MODULE_LICENSE("GPL");
57MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall},"
58 "{RME,Hammerfall-Light}}");
59
60
61
62
63
64
65
66
67
68
69#define RME9652_NCHANNELS 26
70#define RME9636_NCHANNELS 18
71
72
73
74#define RME9652_SYNC_FROM_SPDIF 0
75#define RME9652_SYNC_FROM_ADAT1 1
76#define RME9652_SYNC_FROM_ADAT2 2
77#define RME9652_SYNC_FROM_ADAT3 3
78
79
80
81#define RME9652_SPDIFIN_OPTICAL 0
82#define RME9652_SPDIFIN_COAXIAL 1
83#define RME9652_SPDIFIN_INTERN 2
84
85
86
87#define RME9652_IRQ (1<<0)
88#define RME9652_lock_2 (1<<1)
89#define RME9652_lock_1 (1<<2)
90#define RME9652_lock_0 (1<<3)
91#define RME9652_fs48 (1<<4)
92#define RME9652_wsel_rd (1<<5)
93
94#define RME9652_sync_2 (1<<16)
95#define RME9652_sync_1 (1<<17)
96#define RME9652_sync_0 (1<<18)
97#define RME9652_DS_rd (1<<19)
98#define RME9652_tc_busy (1<<20)
99#define RME9652_tc_out (1<<21)
100#define RME9652_F_0 (1<<22)
101#define RME9652_F_1 (1<<23)
102#define RME9652_F_2 (1<<24)
103#define RME9652_ERF (1<<25)
104#define RME9652_buffer_id (1<<26)
105#define RME9652_tc_valid (1<<27)
106#define RME9652_SPDIF_READ (1<<28)
107
108#define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
109#define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
110#define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2)
111#define rme9652_decode_spdif_rate(x) ((x)>>22)
112
113
114
115#define RME9652_buf_pos 0x000FFC0
116
117
118
119
120
121#define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
122
123
124
125
126
127#define RME9652_IO_EXTENT 1024
128
129#define RME9652_init_buffer 0
130#define RME9652_play_buffer 32
131#define RME9652_rec_buffer 36
132#define RME9652_control_register 64
133#define RME9652_irq_clear 96
134#define RME9652_time_code 100
135#define RME9652_thru_base 128
136
137
138
139
140
141
142
143#define RME9652_status_register 0
144
145
146
147
148#define RME9652_start_bit (1<<0)
149
150#define RME9652_Master (1<<4)
151#define RME9652_IE (1<<5)
152#define RME9652_freq (1<<6)
153#define RME9652_freq1 (1<<7)
154#define RME9652_DS (1<<8)
155#define RME9652_PRO (1<<9)
156#define RME9652_EMP (1<<10)
157#define RME9652_Dolby (1<<11)
158#define RME9652_opt_out (1<<12)
159#define RME9652_wsel (1<<13)
160#define RME9652_inp_0 (1<<14)
161#define RME9652_inp_1 (1<<15)
162#define RME9652_SyncPref_ADAT2 (1<<16)
163#define RME9652_SyncPref_ADAT3 (1<<17)
164#define RME9652_SPDIF_RESET (1<<18)
165#define RME9652_SPDIF_SELECT (1<<19)
166#define RME9652_SPDIF_CLOCK (1<<20)
167#define RME9652_SPDIF_WRITE (1<<21)
168#define RME9652_ADAT1_INTERNAL (1<<22)
169
170
171
172#define RME9652_latency 0x0e
173#define rme9652_encode_latency(x) (((x)&0x7)<<1)
174#define rme9652_decode_latency(x) (((x)>>1)&0x7)
175#define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
176#define RME9652_inp (RME9652_inp_0|RME9652_inp_1)
177#define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
178#define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
179
180#define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
181#define RME9652_SyncPref_ADAT1 0
182#define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
183
184
185
186#define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024)
187#define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES)
188
189
190
191
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193
194
195
196
197
198#define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
199#define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
200
201struct snd_rme9652 {
202 int dev;
203
204 spinlock_t lock;
205 int irq;
206 unsigned long port;
207 void __iomem *iobase;
208
209 int precise_ptr;
210
211 u32 control_register;
212 u32 thru_bits;
213
214 u32 creg_spdif;
215 u32 creg_spdif_stream;
216
217 char *card_name;
218
219 size_t hw_offsetmask;
220 size_t prev_hw_offset;
221 size_t max_jitter;
222
223 size_t period_bytes;
224
225 unsigned char ds_channels;
226 unsigned char ss_channels;
227
228 struct snd_dma_buffer playback_dma_buf;
229 struct snd_dma_buffer capture_dma_buf;
230
231 unsigned char *capture_buffer;
232 unsigned char *playback_buffer;
233
234 pid_t capture_pid;
235 pid_t playback_pid;
236
237 struct snd_pcm_substream *capture_substream;
238 struct snd_pcm_substream *playback_substream;
239 int running;
240
241 int passthru;
242 int hw_rev;
243
244 int last_spdif_sample_rate;
245 int last_adat_sample_rate;
246
247 char *channel_map;
248
249 struct snd_card *card;
250 struct snd_pcm *pcm;
251 struct pci_dev *pci;
252 struct snd_kcontrol *spdif_ctl;
253
254};
255
256
257
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259
260
261
262
263
264static char channel_map_9652_ss[26] = {
265 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
266 18, 19, 20, 21, 22, 23, 24, 25
267};
268
269static char channel_map_9636_ss[26] = {
270 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
271
272 24, 25,
273
274 -1, -1, -1, -1, -1, -1, -1, -1
275};
276
277static char channel_map_9652_ds[26] = {
278
279 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
280
281 24, 25,
282
283 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
284};
285
286static char channel_map_9636_ds[26] = {
287
288 1, 3, 5, 7, 9, 11, 13, 15,
289
290 24, 25
291
292 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
293};
294
295static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
296{
297 dmab->dev.type = SNDRV_DMA_TYPE_DEV;
298 dmab->dev.dev = snd_dma_pci_data(pci);
299 if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) {
300 if (dmab->bytes >= size)
301 return 0;
302 }
303 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
304 size, dmab) < 0)
305 return -ENOMEM;
306 return 0;
307}
308
309static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
310{
311 if (dmab->area) {
312 dmab->dev.dev = NULL;
313 snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci));
314 }
315}
316
317
318static struct pci_device_id snd_rme9652_ids[] = {
319 {
320 .vendor = 0x10ee,
321 .device = 0x3fc4,
322 .subvendor = PCI_ANY_ID,
323 .subdevice = PCI_ANY_ID,
324 },
325 { 0, },
326};
327
328MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
329
330static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val)
331{
332 writel(val, rme9652->iobase + reg);
333}
334
335static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg)
336{
337 return readl(rme9652->iobase + reg);
338}
339
340static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652)
341{
342 unsigned long flags;
343 int ret = 1;
344
345 spin_lock_irqsave(&rme9652->lock, flags);
346 if ((rme9652->playback_pid != rme9652->capture_pid) &&
347 (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
348 ret = 0;
349 }
350 spin_unlock_irqrestore(&rme9652->lock, flags);
351 return ret;
352}
353
354static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652)
355{
356 if (rme9652_running_double_speed(rme9652)) {
357 return (rme9652_read(rme9652, RME9652_status_register) &
358 RME9652_fs48) ? 96000 : 88200;
359 } else {
360 return (rme9652_read(rme9652, RME9652_status_register) &
361 RME9652_fs48) ? 48000 : 44100;
362 }
363}
364
365static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652)
366{
367 unsigned int i;
368
369 i = rme9652->control_register & RME9652_latency;
370 rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
371 rme9652->hw_offsetmask =
372 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
373 rme9652->max_jitter = 80;
374}
375
376static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652)
377{
378 int status;
379 unsigned int offset, frag;
380 snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
381 snd_pcm_sframes_t delta;
382
383 status = rme9652_read(rme9652, RME9652_status_register);
384 if (!rme9652->precise_ptr)
385 return (status & RME9652_buffer_id) ? period_size : 0;
386 offset = status & RME9652_buf_pos;
387
388
389
390
391
392 delta = rme9652->prev_hw_offset - offset;
393 delta &= 0xffff;
394 if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
395 offset = rme9652->prev_hw_offset;
396 else
397 rme9652->prev_hw_offset = offset;
398 offset &= rme9652->hw_offsetmask;
399 offset /= 4;
400 frag = status & RME9652_buffer_id;
401
402 if (offset < period_size) {
403 if (offset > rme9652->max_jitter) {
404 if (frag)
405 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n", status, offset);
406 } else if (!frag)
407 return 0;
408 offset -= rme9652->max_jitter;
409 if ((int)offset < 0)
410 offset += period_size * 2;
411 } else {
412 if (offset > period_size + rme9652->max_jitter) {
413 if (!frag)
414 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n", status, offset);
415 } else if (frag)
416 return period_size;
417 offset -= rme9652->max_jitter;
418 }
419
420 return offset;
421}
422
423static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652)
424{
425 int i;
426
427
428
429
430
431
432
433 for (i = 0; i < 8; i++) {
434 rme9652_write(rme9652, i * 4, 0);
435 udelay(10);
436 }
437 rme9652->prev_hw_offset = 0;
438}
439
440static inline void rme9652_start(struct snd_rme9652 *s)
441{
442 s->control_register |= (RME9652_IE | RME9652_start_bit);
443 rme9652_write(s, RME9652_control_register, s->control_register);
444}
445
446static inline void rme9652_stop(struct snd_rme9652 *s)
447{
448 s->control_register &= ~(RME9652_start_bit | RME9652_IE);
449 rme9652_write(s, RME9652_control_register, s->control_register);
450}
451
452static int rme9652_set_interrupt_interval(struct snd_rme9652 *s,
453 unsigned int frames)
454{
455 int restart = 0;
456 int n;
457
458 spin_lock_irq(&s->lock);
459
460 if ((restart = s->running)) {
461 rme9652_stop(s);
462 }
463
464 frames >>= 7;
465 n = 0;
466 while (frames) {
467 n++;
468 frames >>= 1;
469 }
470
471 s->control_register &= ~RME9652_latency;
472 s->control_register |= rme9652_encode_latency(n);
473
474 rme9652_write(s, RME9652_control_register, s->control_register);
475
476 rme9652_compute_period_size(s);
477
478 if (restart)
479 rme9652_start(s);
480
481 spin_unlock_irq(&s->lock);
482
483 return 0;
484}
485
486static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate)
487{
488 int restart;
489 int reject_if_open = 0;
490 int xrate;
491
492 if (!snd_rme9652_use_is_exclusive (rme9652)) {
493 return -EBUSY;
494 }
495
496
497
498
499
500
501
502
503
504
505
506
507 spin_lock_irq(&rme9652->lock);
508 xrate = rme9652_adat_sample_rate(rme9652);
509
510 switch (rate) {
511 case 44100:
512 if (xrate > 48000) {
513 reject_if_open = 1;
514 }
515 rate = 0;
516 break;
517 case 48000:
518 if (xrate > 48000) {
519 reject_if_open = 1;
520 }
521 rate = RME9652_freq;
522 break;
523 case 88200:
524 if (xrate < 48000) {
525 reject_if_open = 1;
526 }
527 rate = RME9652_DS;
528 break;
529 case 96000:
530 if (xrate < 48000) {
531 reject_if_open = 1;
532 }
533 rate = RME9652_DS | RME9652_freq;
534 break;
535 default:
536 spin_unlock_irq(&rme9652->lock);
537 return -EINVAL;
538 }
539
540 if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
541 spin_unlock_irq(&rme9652->lock);
542 return -EBUSY;
543 }
544
545 if ((restart = rme9652->running)) {
546 rme9652_stop(rme9652);
547 }
548 rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
549 rme9652->control_register |= rate;
550 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
551
552 if (restart) {
553 rme9652_start(rme9652);
554 }
555
556 if (rate & RME9652_DS) {
557 if (rme9652->ss_channels == RME9652_NCHANNELS) {
558 rme9652->channel_map = channel_map_9652_ds;
559 } else {
560 rme9652->channel_map = channel_map_9636_ds;
561 }
562 } else {
563 if (rme9652->ss_channels == RME9652_NCHANNELS) {
564 rme9652->channel_map = channel_map_9652_ss;
565 } else {
566 rme9652->channel_map = channel_map_9636_ss;
567 }
568 }
569
570 spin_unlock_irq(&rme9652->lock);
571 return 0;
572}
573
574static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable)
575{
576 int i;
577
578 rme9652->passthru = 0;
579
580 if (channel < 0) {
581
582
583
584 if (enable) {
585 for (i = 0; i < RME9652_NCHANNELS; i++) {
586 rme9652->thru_bits |= (1 << i);
587 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
588 }
589 } else {
590 for (i = 0; i < RME9652_NCHANNELS; i++) {
591 rme9652->thru_bits &= ~(1 << i);
592 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
593 }
594 }
595
596 } else {
597 int mapped_channel;
598
599 snd_assert(channel == RME9652_NCHANNELS, return);
600
601 mapped_channel = rme9652->channel_map[channel];
602
603 if (enable) {
604 rme9652->thru_bits |= (1 << mapped_channel);
605 } else {
606 rme9652->thru_bits &= ~(1 << mapped_channel);
607 }
608
609 rme9652_write(rme9652,
610 RME9652_thru_base + mapped_channel * 4,
611 enable ? 1 : 0);
612 }
613}
614
615static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff)
616{
617 if (onoff) {
618 rme9652_set_thru(rme9652, -1, 1);
619
620
621
622
623
624 rme9652->control_register =
625 RME9652_inp_0 |
626 rme9652_encode_latency(7) |
627 RME9652_start_bit;
628
629 rme9652_reset_hw_pointer(rme9652);
630
631 rme9652_write(rme9652, RME9652_control_register,
632 rme9652->control_register);
633 rme9652->passthru = 1;
634 } else {
635 rme9652_set_thru(rme9652, -1, 0);
636 rme9652_stop(rme9652);
637 rme9652->passthru = 0;
638 }
639
640 return 0;
641}
642
643static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff)
644{
645 if (onoff)
646 rme9652->control_register |= mask;
647 else
648 rme9652->control_register &= ~mask;
649
650 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
651}
652
653static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val)
654{
655 long mask;
656 long i;
657
658 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
659 if (val & mask)
660 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
661 else
662 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
663
664 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
665 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
666 }
667}
668
669static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652)
670{
671 long mask;
672 long val;
673 long i;
674
675 val = 0;
676
677 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
678 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
679 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
680 val |= mask;
681 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
682 }
683
684 return val;
685}
686
687static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data)
688{
689 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
690 rme9652_spdif_write_byte (rme9652, 0x20);
691 rme9652_spdif_write_byte (rme9652, address);
692 rme9652_spdif_write_byte (rme9652, data);
693 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
694}
695
696
697static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address)
698{
699 int ret;
700
701 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
702 rme9652_spdif_write_byte (rme9652, 0x20);
703 rme9652_spdif_write_byte (rme9652, address);
704 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
705 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
706
707 rme9652_spdif_write_byte (rme9652, 0x21);
708 ret = rme9652_spdif_read_byte (rme9652);
709 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
710
711 return ret;
712}
713
714static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652)
715{
716
717
718 rme9652->control_register |= RME9652_SPDIF_RESET;
719
720 rme9652_write_spdif_codec (rme9652, 4, 0x40);
721 rme9652_write_spdif_codec (rme9652, 17, 0x13);
722 rme9652_write_spdif_codec (rme9652, 6, 0x02);
723}
724
725static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s)
726{
727 unsigned int rate_bits;
728
729 if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
730 return -1;
731 }
732
733 if (s->hw_rev == 15) {
734
735 int x, y, ret;
736
737 x = rme9652_spdif_read_codec (s, 30);
738
739 if (x != 0)
740 y = 48000 * 64 / x;
741 else
742 y = 0;
743
744 if (y > 30400 && y < 33600) ret = 32000;
745 else if (y > 41900 && y < 46000) ret = 44100;
746 else if (y > 46000 && y < 50400) ret = 48000;
747 else if (y > 60800 && y < 67200) ret = 64000;
748 else if (y > 83700 && y < 92000) ret = 88200;
749 else if (y > 92000 && y < 100000) ret = 96000;
750 else ret = 0;
751 return ret;
752 }
753
754 rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
755
756 switch (rme9652_decode_spdif_rate(rate_bits)) {
757 case 0x7:
758 return 32000;
759 break;
760
761 case 0x6:
762 return 44100;
763 break;
764
765 case 0x5:
766 return 48000;
767 break;
768
769 case 0x4:
770 return 88200;
771 break;
772
773 case 0x3:
774 return 96000;
775 break;
776
777 case 0x0:
778 return 64000;
779 break;
780
781 default:
782 snd_printk(KERN_ERR "%s: unknown S/PDIF input rate (bits = 0x%x)\n",
783 s->card_name, rate_bits);
784 return 0;
785 break;
786 }
787}
788
789
790
791
792
793static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes)
794{
795 u32 val = 0;
796 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
797 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
798 if (val & RME9652_PRO)
799 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
800 else
801 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
802 return val;
803}
804
805static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
806{
807 aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
808 ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
809 if (val & RME9652_PRO)
810 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
811 else
812 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
813}
814
815static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
816{
817 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
818 uinfo->count = 1;
819 return 0;
820}
821
822static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
823{
824 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
825
826 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
827 return 0;
828}
829
830static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
831{
832 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
833 int change;
834 u32 val;
835
836 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
837 spin_lock_irq(&rme9652->lock);
838 change = val != rme9652->creg_spdif;
839 rme9652->creg_spdif = val;
840 spin_unlock_irq(&rme9652->lock);
841 return change;
842}
843
844static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
845{
846 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
847 uinfo->count = 1;
848 return 0;
849}
850
851static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
852{
853 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
854
855 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
856 return 0;
857}
858
859static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
860{
861 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
862 int change;
863 u32 val;
864
865 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
866 spin_lock_irq(&rme9652->lock);
867 change = val != rme9652->creg_spdif_stream;
868 rme9652->creg_spdif_stream = val;
869 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
870 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
871 spin_unlock_irq(&rme9652->lock);
872 return change;
873}
874
875static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
876{
877 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
878 uinfo->count = 1;
879 return 0;
880}
881
882static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
883{
884 ucontrol->value.iec958.status[0] = kcontrol->private_value;
885 return 0;
886}
887
888#define RME9652_ADAT1_IN(xname, xindex) \
889{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
890 .info = snd_rme9652_info_adat1_in, \
891 .get = snd_rme9652_get_adat1_in, \
892 .put = snd_rme9652_put_adat1_in }
893
894static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652)
895{
896 if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
897 return 1;
898 return 0;
899}
900
901static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal)
902{
903 int restart = 0;
904
905 if (internal) {
906 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
907 } else {
908 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
909 }
910
911
912
913 if ((restart = rme9652->running)) {
914 rme9652_stop(rme9652);
915 }
916
917 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
918
919 if (restart) {
920 rme9652_start(rme9652);
921 }
922
923 return 0;
924}
925
926static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
927{
928 static char *texts[2] = {"ADAT1", "Internal"};
929
930 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
931 uinfo->count = 1;
932 uinfo->value.enumerated.items = 2;
933 if (uinfo->value.enumerated.item > 1)
934 uinfo->value.enumerated.item = 1;
935 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
936 return 0;
937}
938
939static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
940{
941 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
942
943 spin_lock_irq(&rme9652->lock);
944 ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
945 spin_unlock_irq(&rme9652->lock);
946 return 0;
947}
948
949static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
950{
951 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
952 int change;
953 unsigned int val;
954
955 if (!snd_rme9652_use_is_exclusive(rme9652))
956 return -EBUSY;
957 val = ucontrol->value.enumerated.item[0] % 2;
958 spin_lock_irq(&rme9652->lock);
959 change = val != rme9652_adat1_in(rme9652);
960 if (change)
961 rme9652_set_adat1_input(rme9652, val);
962 spin_unlock_irq(&rme9652->lock);
963 return change;
964}
965
966#define RME9652_SPDIF_IN(xname, xindex) \
967{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
968 .info = snd_rme9652_info_spdif_in, \
969 .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
970
971static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652)
972{
973 return rme9652_decode_spdif_in(rme9652->control_register &
974 RME9652_inp);
975}
976
977static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in)
978{
979 int restart = 0;
980
981 rme9652->control_register &= ~RME9652_inp;
982 rme9652->control_register |= rme9652_encode_spdif_in(in);
983
984 if ((restart = rme9652->running)) {
985 rme9652_stop(rme9652);
986 }
987
988 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
989
990 if (restart) {
991 rme9652_start(rme9652);
992 }
993
994 return 0;
995}
996
997static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
998{
999 static char *texts[3] = {"ADAT1", "Coaxial", "Internal"};
1000
1001 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1002 uinfo->count = 1;
1003 uinfo->value.enumerated.items = 3;
1004 if (uinfo->value.enumerated.item > 2)
1005 uinfo->value.enumerated.item = 2;
1006 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1007 return 0;
1008}
1009
1010static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1011{
1012 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1013
1014 spin_lock_irq(&rme9652->lock);
1015 ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
1016 spin_unlock_irq(&rme9652->lock);
1017 return 0;
1018}
1019
1020static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1021{
1022 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1023 int change;
1024 unsigned int val;
1025
1026 if (!snd_rme9652_use_is_exclusive(rme9652))
1027 return -EBUSY;
1028 val = ucontrol->value.enumerated.item[0] % 3;
1029 spin_lock_irq(&rme9652->lock);
1030 change = val != rme9652_spdif_in(rme9652);
1031 if (change)
1032 rme9652_set_spdif_input(rme9652, val);
1033 spin_unlock_irq(&rme9652->lock);
1034 return change;
1035}
1036
1037#define RME9652_SPDIF_OUT(xname, xindex) \
1038{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1039 .info = snd_rme9652_info_spdif_out, \
1040 .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
1041
1042static int rme9652_spdif_out(struct snd_rme9652 *rme9652)
1043{
1044 return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1045}
1046
1047static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out)
1048{
1049 int restart = 0;
1050
1051 if (out) {
1052 rme9652->control_register |= RME9652_opt_out;
1053 } else {
1054 rme9652->control_register &= ~RME9652_opt_out;
1055 }
1056
1057 if ((restart = rme9652->running)) {
1058 rme9652_stop(rme9652);
1059 }
1060
1061 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1062
1063 if (restart) {
1064 rme9652_start(rme9652);
1065 }
1066
1067 return 0;
1068}
1069
1070#define snd_rme9652_info_spdif_out snd_ctl_boolean_mono_info
1071
1072static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1073{
1074 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1075
1076 spin_lock_irq(&rme9652->lock);
1077 ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1078 spin_unlock_irq(&rme9652->lock);
1079 return 0;
1080}
1081
1082static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1083{
1084 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1085 int change;
1086 unsigned int val;
1087
1088 if (!snd_rme9652_use_is_exclusive(rme9652))
1089 return -EBUSY;
1090 val = ucontrol->value.integer.value[0] & 1;
1091 spin_lock_irq(&rme9652->lock);
1092 change = (int)val != rme9652_spdif_out(rme9652);
1093 rme9652_set_spdif_output(rme9652, val);
1094 spin_unlock_irq(&rme9652->lock);
1095 return change;
1096}
1097
1098#define RME9652_SYNC_MODE(xname, xindex) \
1099{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1100 .info = snd_rme9652_info_sync_mode, \
1101 .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1102
1103static int rme9652_sync_mode(struct snd_rme9652 *rme9652)
1104{
1105 if (rme9652->control_register & RME9652_wsel) {
1106 return 2;
1107 } else if (rme9652->control_register & RME9652_Master) {
1108 return 1;
1109 } else {
1110 return 0;
1111 }
1112}
1113
1114static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode)
1115{
1116 int restart = 0;
1117
1118 switch (mode) {
1119 case 0:
1120 rme9652->control_register &=
1121 ~(RME9652_Master | RME9652_wsel);
1122 break;
1123 case 1:
1124 rme9652->control_register =
1125 (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1126 break;
1127 case 2:
1128 rme9652->control_register |=
1129 (RME9652_Master | RME9652_wsel);
1130 break;
1131 }
1132
1133 if ((restart = rme9652->running)) {
1134 rme9652_stop(rme9652);
1135 }
1136
1137 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1138
1139 if (restart) {
1140 rme9652_start(rme9652);
1141 }
1142
1143 return 0;
1144}
1145
1146static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1147{
1148 static char *texts[3] = {"AutoSync", "Master", "Word Clock"};
1149
1150 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1151 uinfo->count = 1;
1152 uinfo->value.enumerated.items = 3;
1153 if (uinfo->value.enumerated.item > 2)
1154 uinfo->value.enumerated.item = 2;
1155 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1156 return 0;
1157}
1158
1159static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1160{
1161 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1162
1163 spin_lock_irq(&rme9652->lock);
1164 ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1165 spin_unlock_irq(&rme9652->lock);
1166 return 0;
1167}
1168
1169static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1170{
1171 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1172 int change;
1173 unsigned int val;
1174
1175 val = ucontrol->value.enumerated.item[0] % 3;
1176 spin_lock_irq(&rme9652->lock);
1177 change = (int)val != rme9652_sync_mode(rme9652);
1178 rme9652_set_sync_mode(rme9652, val);
1179 spin_unlock_irq(&rme9652->lock);
1180 return change;
1181}
1182
1183#define RME9652_SYNC_PREF(xname, xindex) \
1184{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1185 .info = snd_rme9652_info_sync_pref, \
1186 .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1187
1188static int rme9652_sync_pref(struct snd_rme9652 *rme9652)
1189{
1190 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1191 case RME9652_SyncPref_ADAT1:
1192 return RME9652_SYNC_FROM_ADAT1;
1193 case RME9652_SyncPref_ADAT2:
1194 return RME9652_SYNC_FROM_ADAT2;
1195 case RME9652_SyncPref_ADAT3:
1196 return RME9652_SYNC_FROM_ADAT3;
1197 case RME9652_SyncPref_SPDIF:
1198 return RME9652_SYNC_FROM_SPDIF;
1199 }
1200
1201 return 0;
1202}
1203
1204static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref)
1205{
1206 int restart;
1207
1208 rme9652->control_register &= ~RME9652_SyncPref_Mask;
1209 switch (pref) {
1210 case RME9652_SYNC_FROM_ADAT1:
1211 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1212 break;
1213 case RME9652_SYNC_FROM_ADAT2:
1214 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1215 break;
1216 case RME9652_SYNC_FROM_ADAT3:
1217 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1218 break;
1219 case RME9652_SYNC_FROM_SPDIF:
1220 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1221 break;
1222 }
1223
1224 if ((restart = rme9652->running)) {
1225 rme9652_stop(rme9652);
1226 }
1227
1228 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1229
1230 if (restart) {
1231 rme9652_start(rme9652);
1232 }
1233
1234 return 0;
1235}
1236
1237static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1238{
1239 static char *texts[4] = {"IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"};
1240 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1241
1242 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1243 uinfo->count = 1;
1244 uinfo->value.enumerated.items = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1245 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1246 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1247 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1248 return 0;
1249}
1250
1251static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1252{
1253 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1254
1255 spin_lock_irq(&rme9652->lock);
1256 ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1257 spin_unlock_irq(&rme9652->lock);
1258 return 0;
1259}
1260
1261static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1262{
1263 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1264 int change, max;
1265 unsigned int val;
1266
1267 if (!snd_rme9652_use_is_exclusive(rme9652))
1268 return -EBUSY;
1269 max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1270 val = ucontrol->value.enumerated.item[0] % max;
1271 spin_lock_irq(&rme9652->lock);
1272 change = (int)val != rme9652_sync_pref(rme9652);
1273 rme9652_set_sync_pref(rme9652, val);
1274 spin_unlock_irq(&rme9652->lock);
1275 return change;
1276}
1277
1278static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1279{
1280 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1281 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1282 uinfo->count = rme9652->ss_channels;
1283 uinfo->value.integer.min = 0;
1284 uinfo->value.integer.max = 1;
1285 return 0;
1286}
1287
1288static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1289{
1290 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1291 unsigned int k;
1292 u32 thru_bits = rme9652->thru_bits;
1293
1294 for (k = 0; k < rme9652->ss_channels; ++k) {
1295 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1296 }
1297 return 0;
1298}
1299
1300static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1301{
1302 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1303 int change;
1304 unsigned int chn;
1305 u32 thru_bits = 0;
1306
1307 if (!snd_rme9652_use_is_exclusive(rme9652))
1308 return -EBUSY;
1309
1310 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1311 if (ucontrol->value.integer.value[chn])
1312 thru_bits |= 1 << chn;
1313 }
1314
1315 spin_lock_irq(&rme9652->lock);
1316 change = thru_bits ^ rme9652->thru_bits;
1317 if (change) {
1318 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1319 if (!(change & (1 << chn)))
1320 continue;
1321 rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1322 }
1323 }
1324 spin_unlock_irq(&rme9652->lock);
1325 return !!change;
1326}
1327
1328#define RME9652_PASSTHRU(xname, xindex) \
1329{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1330 .info = snd_rme9652_info_passthru, \
1331 .put = snd_rme9652_put_passthru, \
1332 .get = snd_rme9652_get_passthru }
1333
1334#define snd_rme9652_info_passthru snd_ctl_boolean_mono_info
1335
1336static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1337{
1338 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1339
1340 spin_lock_irq(&rme9652->lock);
1341 ucontrol->value.integer.value[0] = rme9652->passthru;
1342 spin_unlock_irq(&rme9652->lock);
1343 return 0;
1344}
1345
1346static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1347{
1348 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1349 int change;
1350 unsigned int val;
1351 int err = 0;
1352
1353 if (!snd_rme9652_use_is_exclusive(rme9652))
1354 return -EBUSY;
1355
1356 val = ucontrol->value.integer.value[0] & 1;
1357 spin_lock_irq(&rme9652->lock);
1358 change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1359 if (change)
1360 err = rme9652_set_passthru(rme9652, val);
1361 spin_unlock_irq(&rme9652->lock);
1362 return err ? err : change;
1363}
1364
1365
1366
1367#define RME9652_SPDIF_RATE(xname, xindex) \
1368{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1369 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1370 .info = snd_rme9652_info_spdif_rate, \
1371 .get = snd_rme9652_get_spdif_rate }
1372
1373static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1374{
1375 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1376 uinfo->count = 1;
1377 uinfo->value.integer.min = 0;
1378 uinfo->value.integer.max = 96000;
1379 return 0;
1380}
1381
1382static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1383{
1384 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1385
1386 spin_lock_irq(&rme9652->lock);
1387 ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1388 spin_unlock_irq(&rme9652->lock);
1389 return 0;
1390}
1391
1392#define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1393{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1394 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1395 .info = snd_rme9652_info_adat_sync, \
1396 .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1397
1398static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1399{
1400 static char *texts[4] = {"No Lock", "Lock", "No Lock Sync", "Lock Sync"};
1401
1402 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1403 uinfo->count = 1;
1404 uinfo->value.enumerated.items = 4;
1405 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1406 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1407 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1408 return 0;
1409}
1410
1411static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1412{
1413 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1414 unsigned int mask1, mask2, val;
1415
1416 switch (kcontrol->private_value) {
1417 case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1418 case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1419 case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1420 default: return -EINVAL;
1421 }
1422 val = rme9652_read(rme9652, RME9652_status_register);
1423 ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1424 ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1425 return 0;
1426}
1427
1428#define RME9652_TC_VALID(xname, xindex) \
1429{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1430 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1431 .info = snd_rme9652_info_tc_valid, \
1432 .get = snd_rme9652_get_tc_valid }
1433
1434#define snd_rme9652_info_tc_valid snd_ctl_boolean_mono_info
1435
1436static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1437{
1438 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1439
1440 ucontrol->value.integer.value[0] =
1441 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1442 return 0;
1443}
1444
1445#ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1446
1447
1448
1449static int snd_rme9652_get_tc_value(void *private_data,
1450 snd_kswitch_t *kswitch,
1451 snd_switch_t *uswitch)
1452{
1453 struct snd_rme9652 *s = (struct snd_rme9652 *) private_data;
1454 u32 value;
1455 int i;
1456
1457 uswitch->type = SNDRV_SW_TYPE_DWORD;
1458
1459 if ((rme9652_read(s, RME9652_status_register) &
1460 RME9652_tc_valid) == 0) {
1461 uswitch->value.data32[0] = 0;
1462 return 0;
1463 }
1464
1465
1466
1467 rme9652_write(s, RME9652_time_code, 0);
1468
1469
1470
1471 for (i = 0; i < 50; i++) {
1472 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1473 break;
1474 }
1475
1476 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1477 return -EIO;
1478 }
1479
1480 value = 0;
1481
1482 for (i = 0; i < 32; i++) {
1483 value >>= 1;
1484
1485 if (rme9652_read(s, i * 4) & RME9652_tc_out)
1486 value |= 0x80000000;
1487 }
1488
1489 if (value > 2 * 60 * 48000) {
1490 value -= 2 * 60 * 48000;
1491 } else {
1492 value = 0;
1493 }
1494
1495 uswitch->value.data32[0] = value;
1496
1497 return 0;
1498}
1499
1500#endif
1501
1502static struct snd_kcontrol_new snd_rme9652_controls[] = {
1503{
1504 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1505 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1506 .info = snd_rme9652_control_spdif_info,
1507 .get = snd_rme9652_control_spdif_get,
1508 .put = snd_rme9652_control_spdif_put,
1509},
1510{
1511 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1512 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1513 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1514 .info = snd_rme9652_control_spdif_stream_info,
1515 .get = snd_rme9652_control_spdif_stream_get,
1516 .put = snd_rme9652_control_spdif_stream_put,
1517},
1518{
1519 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1520 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1521 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1522 .info = snd_rme9652_control_spdif_mask_info,
1523 .get = snd_rme9652_control_spdif_mask_get,
1524 .private_value = IEC958_AES0_NONAUDIO |
1525 IEC958_AES0_PROFESSIONAL |
1526 IEC958_AES0_CON_EMPHASIS,
1527},
1528{
1529 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1530 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1531 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1532 .info = snd_rme9652_control_spdif_mask_info,
1533 .get = snd_rme9652_control_spdif_mask_get,
1534 .private_value = IEC958_AES0_NONAUDIO |
1535 IEC958_AES0_PROFESSIONAL |
1536 IEC958_AES0_PRO_EMPHASIS,
1537},
1538RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1539RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1540RME9652_SYNC_MODE("Sync Mode", 0),
1541RME9652_SYNC_PREF("Preferred Sync Source", 0),
1542{
1543 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1544 .name = "Channels Thru",
1545 .index = 0,
1546 .info = snd_rme9652_info_thru,
1547 .get = snd_rme9652_get_thru,
1548 .put = snd_rme9652_put_thru,
1549},
1550RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1551RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1552RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1553RME9652_TC_VALID("Timecode Valid", 0),
1554RME9652_PASSTHRU("Passthru", 0)
1555};
1556
1557static struct snd_kcontrol_new snd_rme9652_adat3_check =
1558RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1559
1560static struct snd_kcontrol_new snd_rme9652_adat1_input =
1561RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1562
1563static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652)
1564{
1565 unsigned int idx;
1566 int err;
1567 struct snd_kcontrol *kctl;
1568
1569 for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) {
1570 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1571 return err;
1572 if (idx == 1)
1573 rme9652->spdif_ctl = kctl;
1574 }
1575
1576 if (rme9652->ss_channels == RME9652_NCHANNELS)
1577 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1578 return err;
1579
1580 if (rme9652->hw_rev >= 15)
1581 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1582 return err;
1583
1584 return 0;
1585}
1586
1587
1588
1589
1590
1591static void
1592snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1593{
1594 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data;
1595 u32 thru_bits = rme9652->thru_bits;
1596 int show_auto_sync_source = 0;
1597 int i;
1598 unsigned int status;
1599 int x;
1600
1601 status = rme9652_read(rme9652, RME9652_status_register);
1602
1603 snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1604 snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1605 rme9652->capture_buffer, rme9652->playback_buffer);
1606 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1607 rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase);
1608 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1609
1610 snd_iprintf(buffer, "\n");
1611
1612 x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1613 RME9652_latency));
1614
1615 snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1616 x, (unsigned long) rme9652->period_bytes);
1617 snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1618 rme9652_hw_pointer(rme9652));
1619 snd_iprintf(buffer, "Passthru: %s\n",
1620 rme9652->passthru ? "yes" : "no");
1621
1622 if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1623 snd_iprintf(buffer, "Clock mode: autosync\n");
1624 show_auto_sync_source = 1;
1625 } else if (rme9652->control_register & RME9652_wsel) {
1626 if (status & RME9652_wsel_rd) {
1627 snd_iprintf(buffer, "Clock mode: word clock\n");
1628 } else {
1629 snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1630 }
1631 } else {
1632 snd_iprintf(buffer, "Clock mode: master\n");
1633 }
1634
1635 if (show_auto_sync_source) {
1636 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1637 case RME9652_SyncPref_ADAT1:
1638 snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1639 break;
1640 case RME9652_SyncPref_ADAT2:
1641 snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1642 break;
1643 case RME9652_SyncPref_ADAT3:
1644 snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1645 break;
1646 case RME9652_SyncPref_SPDIF:
1647 snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1648 break;
1649 default:
1650 snd_iprintf(buffer, "Pref. sync source: ???\n");
1651 }
1652 }
1653
1654 if (rme9652->hw_rev >= 15)
1655 snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1656 (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1657 "Internal" : "ADAT1 optical");
1658
1659 snd_iprintf(buffer, "\n");
1660
1661 switch (rme9652_decode_spdif_in(rme9652->control_register &
1662 RME9652_inp)) {
1663 case RME9652_SPDIFIN_OPTICAL:
1664 snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1665 break;
1666 case RME9652_SPDIFIN_COAXIAL:
1667 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1668 break;
1669 case RME9652_SPDIFIN_INTERN:
1670 snd_iprintf(buffer, "IEC958 input: Internal\n");
1671 break;
1672 default:
1673 snd_iprintf(buffer, "IEC958 input: ???\n");
1674 break;
1675 }
1676
1677 if (rme9652->control_register & RME9652_opt_out) {
1678 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1679 } else {
1680 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1681 }
1682
1683 if (rme9652->control_register & RME9652_PRO) {
1684 snd_iprintf(buffer, "IEC958 quality: Professional\n");
1685 } else {
1686 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1687 }
1688
1689 if (rme9652->control_register & RME9652_EMP) {
1690 snd_iprintf(buffer, "IEC958 emphasis: on\n");
1691 } else {
1692 snd_iprintf(buffer, "IEC958 emphasis: off\n");
1693 }
1694
1695 if (rme9652->control_register & RME9652_Dolby) {
1696 snd_iprintf(buffer, "IEC958 Dolby: on\n");
1697 } else {
1698 snd_iprintf(buffer, "IEC958 Dolby: off\n");
1699 }
1700
1701 i = rme9652_spdif_sample_rate(rme9652);
1702
1703 if (i < 0) {
1704 snd_iprintf(buffer,
1705 "IEC958 sample rate: error flag set\n");
1706 } else if (i == 0) {
1707 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1708 } else {
1709 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1710 }
1711
1712 snd_iprintf(buffer, "\n");
1713
1714 snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1715 rme9652_adat_sample_rate(rme9652));
1716
1717
1718
1719 x = status & RME9652_sync_0;
1720 if (status & RME9652_lock_0) {
1721 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1722 } else {
1723 snd_iprintf(buffer, "ADAT1: No Lock\n");
1724 }
1725
1726 x = status & RME9652_sync_1;
1727 if (status & RME9652_lock_1) {
1728 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1729 } else {
1730 snd_iprintf(buffer, "ADAT2: No Lock\n");
1731 }
1732
1733 x = status & RME9652_sync_2;
1734 if (status & RME9652_lock_2) {
1735 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1736 } else {
1737 snd_iprintf(buffer, "ADAT3: No Lock\n");
1738 }
1739
1740 snd_iprintf(buffer, "\n");
1741
1742 snd_iprintf(buffer, "Timecode signal: %s\n",
1743 (status & RME9652_tc_valid) ? "yes" : "no");
1744
1745
1746
1747 snd_iprintf(buffer, "Punch Status:\n\n");
1748
1749 for (i = 0; i < rme9652->ss_channels; i++) {
1750 if (thru_bits & (1 << i)) {
1751 snd_iprintf(buffer, "%2d: on ", i + 1);
1752 } else {
1753 snd_iprintf(buffer, "%2d: off ", i + 1);
1754 }
1755
1756 if (((i + 1) % 8) == 0) {
1757 snd_iprintf(buffer, "\n");
1758 }
1759 }
1760
1761 snd_iprintf(buffer, "\n");
1762}
1763
1764static void __devinit snd_rme9652_proc_init(struct snd_rme9652 *rme9652)
1765{
1766 struct snd_info_entry *entry;
1767
1768 if (! snd_card_proc_new(rme9652->card, "rme9652", &entry))
1769 snd_info_set_text_ops(entry, rme9652, snd_rme9652_proc_read);
1770}
1771
1772static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652)
1773{
1774 snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci);
1775 snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci);
1776}
1777
1778static int snd_rme9652_free(struct snd_rme9652 *rme9652)
1779{
1780 if (rme9652->irq >= 0)
1781 rme9652_stop(rme9652);
1782 snd_rme9652_free_buffers(rme9652);
1783
1784 if (rme9652->irq >= 0)
1785 free_irq(rme9652->irq, (void *)rme9652);
1786 if (rme9652->iobase)
1787 iounmap(rme9652->iobase);
1788 if (rme9652->port)
1789 pci_release_regions(rme9652->pci);
1790
1791 pci_disable_device(rme9652->pci);
1792 return 0;
1793}
1794
1795static int __devinit snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652)
1796{
1797 unsigned long pb_bus, cb_bus;
1798
1799 if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 ||
1800 snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) {
1801 if (rme9652->capture_dma_buf.area)
1802 snd_dma_free_pages(&rme9652->capture_dma_buf);
1803 printk(KERN_ERR "%s: no buffers available\n", rme9652->card_name);
1804 return -ENOMEM;
1805 }
1806
1807
1808
1809 cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul);
1810 pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul);
1811
1812
1813
1814 rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1815 rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1816
1817 rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr);
1818 rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr);
1819
1820 return 0;
1821}
1822
1823static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652)
1824{
1825 unsigned int k;
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843 rme9652->control_register =
1844 RME9652_inp_0 | rme9652_encode_latency(7);
1845
1846 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1847
1848 rme9652_reset_hw_pointer(rme9652);
1849 rme9652_compute_period_size(rme9652);
1850
1851
1852
1853 for (k = 0; k < RME9652_NCHANNELS; ++k)
1854 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1855
1856 rme9652->thru_bits = 0;
1857 rme9652->passthru = 0;
1858
1859
1860
1861 rme9652_set_rate(rme9652, 48000);
1862}
1863
1864static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id)
1865{
1866 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id;
1867
1868 if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1869 return IRQ_NONE;
1870 }
1871
1872 rme9652_write(rme9652, RME9652_irq_clear, 0);
1873
1874 if (rme9652->capture_substream) {
1875 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1876 }
1877
1878 if (rme9652->playback_substream) {
1879 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1880 }
1881 return IRQ_HANDLED;
1882}
1883
1884static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream)
1885{
1886 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1887 return rme9652_hw_pointer(rme9652);
1888}
1889
1890static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652,
1891 int stream,
1892 int channel)
1893
1894{
1895 int mapped_channel;
1896
1897 snd_assert(channel >= 0 || channel < RME9652_NCHANNELS, return NULL);
1898
1899 if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
1900 return NULL;
1901 }
1902
1903 if (stream == SNDRV_PCM_STREAM_CAPTURE) {
1904 return rme9652->capture_buffer +
1905 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1906 } else {
1907 return rme9652->playback_buffer +
1908 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1909 }
1910}
1911
1912static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream, int channel,
1913 snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count)
1914{
1915 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1916 char *channel_buf;
1917
1918 snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
1919
1920 channel_buf = rme9652_channel_buffer_location (rme9652,
1921 substream->pstr->stream,
1922 channel);
1923 snd_assert(channel_buf != NULL, return -EIO);
1924 if (copy_from_user(channel_buf + pos * 4, src, count * 4))
1925 return -EFAULT;
1926 return count;
1927}
1928
1929static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream, int channel,
1930 snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count)
1931{
1932 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1933 char *channel_buf;
1934
1935 snd_assert(pos + count <= RME9652_CHANNEL_BUFFER_BYTES / 4, return -EINVAL);
1936
1937 channel_buf = rme9652_channel_buffer_location (rme9652,
1938 substream->pstr->stream,
1939 channel);
1940 snd_assert(channel_buf != NULL, return -EIO);
1941 if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
1942 return -EFAULT;
1943 return count;
1944}
1945
1946static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream, int channel,
1947 snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
1948{
1949 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1950 char *channel_buf;
1951
1952 channel_buf = rme9652_channel_buffer_location (rme9652,
1953 substream->pstr->stream,
1954 channel);
1955 snd_assert(channel_buf != NULL, return -EIO);
1956 memset(channel_buf + pos * 4, 0, count * 4);
1957 return count;
1958}
1959
1960static int snd_rme9652_reset(struct snd_pcm_substream *substream)
1961{
1962 struct snd_pcm_runtime *runtime = substream->runtime;
1963 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1964 struct snd_pcm_substream *other;
1965 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1966 other = rme9652->capture_substream;
1967 else
1968 other = rme9652->playback_substream;
1969 if (rme9652->running)
1970 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
1971 else
1972 runtime->status->hw_ptr = 0;
1973 if (other) {
1974 struct snd_pcm_substream *s;
1975 struct snd_pcm_runtime *oruntime = other->runtime;
1976 snd_pcm_group_for_each_entry(s, substream) {
1977 if (s == other) {
1978 oruntime->status->hw_ptr = runtime->status->hw_ptr;
1979 break;
1980 }
1981 }
1982 }
1983 return 0;
1984}
1985
1986static int snd_rme9652_hw_params(struct snd_pcm_substream *substream,
1987 struct snd_pcm_hw_params *params)
1988{
1989 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1990 int err;
1991 pid_t this_pid;
1992 pid_t other_pid;
1993
1994 spin_lock_irq(&rme9652->lock);
1995
1996 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1997 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
1998 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
1999 this_pid = rme9652->playback_pid;
2000 other_pid = rme9652->capture_pid;
2001 } else {
2002 this_pid = rme9652->capture_pid;
2003 other_pid = rme9652->playback_pid;
2004 }
2005
2006 if ((other_pid > 0) && (this_pid != other_pid)) {
2007
2008
2009
2010
2011
2012
2013 if ((int)params_rate(params) !=
2014 rme9652_adat_sample_rate(rme9652)) {
2015 spin_unlock_irq(&rme9652->lock);
2016 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2017 return -EBUSY;
2018 }
2019
2020 if (params_period_size(params) != rme9652->period_bytes / 4) {
2021 spin_unlock_irq(&rme9652->lock);
2022 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2023 return -EBUSY;
2024 }
2025
2026
2027
2028 spin_unlock_irq(&rme9652->lock);
2029 return 0;
2030
2031 } else {
2032 spin_unlock_irq(&rme9652->lock);
2033 }
2034
2035
2036
2037
2038 if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2039 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2040 return err;
2041 }
2042
2043 if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2044 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2045 return err;
2046 }
2047
2048 return 0;
2049}
2050
2051static int snd_rme9652_channel_info(struct snd_pcm_substream *substream,
2052 struct snd_pcm_channel_info *info)
2053{
2054 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2055 int chn;
2056
2057 snd_assert(info->channel < RME9652_NCHANNELS, return -EINVAL);
2058
2059 if ((chn = rme9652->channel_map[info->channel]) < 0) {
2060 return -EINVAL;
2061 }
2062
2063 info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2064 info->first = 0;
2065 info->step = 32;
2066 return 0;
2067}
2068
2069static int snd_rme9652_ioctl(struct snd_pcm_substream *substream,
2070 unsigned int cmd, void *arg)
2071{
2072 switch (cmd) {
2073 case SNDRV_PCM_IOCTL1_RESET:
2074 {
2075 return snd_rme9652_reset(substream);
2076 }
2077 case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2078 {
2079 struct snd_pcm_channel_info *info = arg;
2080 return snd_rme9652_channel_info(substream, info);
2081 }
2082 default:
2083 break;
2084 }
2085
2086 return snd_pcm_lib_ioctl(substream, cmd, arg);
2087}
2088
2089static void rme9652_silence_playback(struct snd_rme9652 *rme9652)
2090{
2091 memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2092}
2093
2094static int snd_rme9652_trigger(struct snd_pcm_substream *substream,
2095 int cmd)
2096{
2097 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2098 struct snd_pcm_substream *other;
2099 int running;
2100 spin_lock(&rme9652->lock);
2101 running = rme9652->running;
2102 switch (cmd) {
2103 case SNDRV_PCM_TRIGGER_START:
2104 running |= 1 << substream->stream;
2105 break;
2106 case SNDRV_PCM_TRIGGER_STOP:
2107 running &= ~(1 << substream->stream);
2108 break;
2109 default:
2110 snd_BUG();
2111 spin_unlock(&rme9652->lock);
2112 return -EINVAL;
2113 }
2114 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2115 other = rme9652->capture_substream;
2116 else
2117 other = rme9652->playback_substream;
2118
2119 if (other) {
2120 struct snd_pcm_substream *s;
2121 snd_pcm_group_for_each_entry(s, substream) {
2122 if (s == other) {
2123 snd_pcm_trigger_done(s, substream);
2124 if (cmd == SNDRV_PCM_TRIGGER_START)
2125 running |= 1 << s->stream;
2126 else
2127 running &= ~(1 << s->stream);
2128 goto _ok;
2129 }
2130 }
2131 if (cmd == SNDRV_PCM_TRIGGER_START) {
2132 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2133 substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2134 rme9652_silence_playback(rme9652);
2135 } else {
2136 if (running &&
2137 substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2138 rme9652_silence_playback(rme9652);
2139 }
2140 } else {
2141 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2142 rme9652_silence_playback(rme9652);
2143 }
2144 _ok:
2145 snd_pcm_trigger_done(substream, substream);
2146 if (!rme9652->running && running)
2147 rme9652_start(rme9652);
2148 else if (rme9652->running && !running)
2149 rme9652_stop(rme9652);
2150 rme9652->running = running;
2151 spin_unlock(&rme9652->lock);
2152
2153 return 0;
2154}
2155
2156static int snd_rme9652_prepare(struct snd_pcm_substream *substream)
2157{
2158 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2159 unsigned long flags;
2160 int result = 0;
2161
2162 spin_lock_irqsave(&rme9652->lock, flags);
2163 if (!rme9652->running)
2164 rme9652_reset_hw_pointer(rme9652);
2165 spin_unlock_irqrestore(&rme9652->lock, flags);
2166 return result;
2167}
2168
2169static struct snd_pcm_hardware snd_rme9652_playback_subinfo =
2170{
2171 .info = (SNDRV_PCM_INFO_MMAP |
2172 SNDRV_PCM_INFO_MMAP_VALID |
2173 SNDRV_PCM_INFO_NONINTERLEAVED |
2174 SNDRV_PCM_INFO_SYNC_START |
2175 SNDRV_PCM_INFO_DOUBLE),
2176 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2177 .rates = (SNDRV_PCM_RATE_44100 |
2178 SNDRV_PCM_RATE_48000 |
2179 SNDRV_PCM_RATE_88200 |
2180 SNDRV_PCM_RATE_96000),
2181 .rate_min = 44100,
2182 .rate_max = 96000,
2183 .channels_min = 10,
2184 .channels_max = 26,
2185 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26,
2186 .period_bytes_min = (64 * 4) * 10,
2187 .period_bytes_max = (8192 * 4) * 26,
2188 .periods_min = 2,
2189 .periods_max = 2,
2190 .fifo_size = 0,
2191};
2192
2193static struct snd_pcm_hardware snd_rme9652_capture_subinfo =
2194{
2195 .info = (SNDRV_PCM_INFO_MMAP |
2196 SNDRV_PCM_INFO_MMAP_VALID |
2197 SNDRV_PCM_INFO_NONINTERLEAVED |
2198 SNDRV_PCM_INFO_SYNC_START),
2199 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2200 .rates = (SNDRV_PCM_RATE_44100 |
2201 SNDRV_PCM_RATE_48000 |
2202 SNDRV_PCM_RATE_88200 |
2203 SNDRV_PCM_RATE_96000),
2204 .rate_min = 44100,
2205 .rate_max = 96000,
2206 .channels_min = 10,
2207 .channels_max = 26,
2208 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26,
2209 .period_bytes_min = (64 * 4) * 10,
2210 .period_bytes_max = (8192 * 4) * 26,
2211 .periods_min = 2,
2212 .periods_max = 2,
2213 .fifo_size = 0,
2214};
2215
2216static unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2217
2218static struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = {
2219 .count = ARRAY_SIZE(period_sizes),
2220 .list = period_sizes,
2221 .mask = 0
2222};
2223
2224static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params,
2225 struct snd_pcm_hw_rule *rule)
2226{
2227 struct snd_rme9652 *rme9652 = rule->private;
2228 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2229 unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2230 return snd_interval_list(c, 2, list, 0);
2231}
2232
2233static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params,
2234 struct snd_pcm_hw_rule *rule)
2235{
2236 struct snd_rme9652 *rme9652 = rule->private;
2237 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2238 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2239 if (r->min > 48000) {
2240 struct snd_interval t = {
2241 .min = rme9652->ds_channels,
2242 .max = rme9652->ds_channels,
2243 .integer = 1,
2244 };
2245 return snd_interval_refine(c, &t);
2246 } else if (r->max < 88200) {
2247 struct snd_interval t = {
2248 .min = rme9652->ss_channels,
2249 .max = rme9652->ss_channels,
2250 .integer = 1,
2251 };
2252 return snd_interval_refine(c, &t);
2253 }
2254 return 0;
2255}
2256
2257static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params,
2258 struct snd_pcm_hw_rule *rule)
2259{
2260 struct snd_rme9652 *rme9652 = rule->private;
2261 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2262 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2263 if (c->min >= rme9652->ss_channels) {
2264 struct snd_interval t = {
2265 .min = 44100,
2266 .max = 48000,
2267 .integer = 1,
2268 };
2269 return snd_interval_refine(r, &t);
2270 } else if (c->max <= rme9652->ds_channels) {
2271 struct snd_interval t = {
2272 .min = 88200,
2273 .max = 96000,
2274 .integer = 1,
2275 };
2276 return snd_interval_refine(r, &t);
2277 }
2278 return 0;
2279}
2280
2281static int snd_rme9652_playback_open(struct snd_pcm_substream *substream)
2282{
2283 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2284 struct snd_pcm_runtime *runtime = substream->runtime;
2285
2286 spin_lock_irq(&rme9652->lock);
2287
2288 snd_pcm_set_sync(substream);
2289
2290 runtime->hw = snd_rme9652_playback_subinfo;
2291 runtime->dma_area = rme9652->playback_buffer;
2292 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2293
2294 if (rme9652->capture_substream == NULL) {
2295 rme9652_stop(rme9652);
2296 rme9652_set_thru(rme9652, -1, 0);
2297 }
2298
2299 rme9652->playback_pid = current->pid;
2300 rme9652->playback_substream = substream;
2301
2302 spin_unlock_irq(&rme9652->lock);
2303
2304 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2305 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2306 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2307 snd_rme9652_hw_rule_channels, rme9652,
2308 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2309 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2310 snd_rme9652_hw_rule_channels_rate, rme9652,
2311 SNDRV_PCM_HW_PARAM_RATE, -1);
2312 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2313 snd_rme9652_hw_rule_rate_channels, rme9652,
2314 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2315
2316 rme9652->creg_spdif_stream = rme9652->creg_spdif;
2317 rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2318 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2319 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2320 return 0;
2321}
2322
2323static int snd_rme9652_playback_release(struct snd_pcm_substream *substream)
2324{
2325 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2326
2327 spin_lock_irq(&rme9652->lock);
2328
2329 rme9652->playback_pid = -1;
2330 rme9652->playback_substream = NULL;
2331
2332 spin_unlock_irq(&rme9652->lock);
2333
2334 rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2335 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2336 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2337 return 0;
2338}
2339
2340
2341static int snd_rme9652_capture_open(struct snd_pcm_substream *substream)
2342{
2343 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2344 struct snd_pcm_runtime *runtime = substream->runtime;
2345
2346 spin_lock_irq(&rme9652->lock);
2347
2348 snd_pcm_set_sync(substream);
2349
2350 runtime->hw = snd_rme9652_capture_subinfo;
2351 runtime->dma_area = rme9652->capture_buffer;
2352 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2353
2354 if (rme9652->playback_substream == NULL) {
2355 rme9652_stop(rme9652);
2356 rme9652_set_thru(rme9652, -1, 0);
2357 }
2358
2359 rme9652->capture_pid = current->pid;
2360 rme9652->capture_substream = substream;
2361
2362 spin_unlock_irq(&rme9652->lock);
2363
2364 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2365 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2366 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2367 snd_rme9652_hw_rule_channels, rme9652,
2368 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2369 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2370 snd_rme9652_hw_rule_channels_rate, rme9652,
2371 SNDRV_PCM_HW_PARAM_RATE, -1);
2372 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2373 snd_rme9652_hw_rule_rate_channels, rme9652,
2374 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2375 return 0;
2376}
2377
2378static int snd_rme9652_capture_release(struct snd_pcm_substream *substream)
2379{
2380 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2381
2382 spin_lock_irq(&rme9652->lock);
2383
2384 rme9652->capture_pid = -1;
2385 rme9652->capture_substream = NULL;
2386
2387 spin_unlock_irq(&rme9652->lock);
2388 return 0;
2389}
2390
2391static struct snd_pcm_ops snd_rme9652_playback_ops = {
2392 .open = snd_rme9652_playback_open,
2393 .close = snd_rme9652_playback_release,
2394 .ioctl = snd_rme9652_ioctl,
2395 .hw_params = snd_rme9652_hw_params,
2396 .prepare = snd_rme9652_prepare,
2397 .trigger = snd_rme9652_trigger,
2398 .pointer = snd_rme9652_hw_pointer,
2399 .copy = snd_rme9652_playback_copy,
2400 .silence = snd_rme9652_hw_silence,
2401};
2402
2403static struct snd_pcm_ops snd_rme9652_capture_ops = {
2404 .open = snd_rme9652_capture_open,
2405 .close = snd_rme9652_capture_release,
2406 .ioctl = snd_rme9652_ioctl,
2407 .hw_params = snd_rme9652_hw_params,
2408 .prepare = snd_rme9652_prepare,
2409 .trigger = snd_rme9652_trigger,
2410 .pointer = snd_rme9652_hw_pointer,
2411 .copy = snd_rme9652_capture_copy,
2412};
2413
2414static int __devinit snd_rme9652_create_pcm(struct snd_card *card,
2415 struct snd_rme9652 *rme9652)
2416{
2417 struct snd_pcm *pcm;
2418 int err;
2419
2420 if ((err = snd_pcm_new(card,
2421 rme9652->card_name,
2422 0, 1, 1, &pcm)) < 0) {
2423 return err;
2424 }
2425
2426 rme9652->pcm = pcm;
2427 pcm->private_data = rme9652;
2428 strcpy(pcm->name, rme9652->card_name);
2429
2430 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2431 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2432
2433 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2434
2435 return 0;
2436}
2437
2438static int __devinit snd_rme9652_create(struct snd_card *card,
2439 struct snd_rme9652 *rme9652,
2440 int precise_ptr)
2441{
2442 struct pci_dev *pci = rme9652->pci;
2443 int err;
2444 int status;
2445 unsigned short rev;
2446
2447 rme9652->irq = -1;
2448 rme9652->card = card;
2449
2450 pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2451
2452 switch (rev & 0xff) {
2453 case 3:
2454 case 4:
2455 case 8:
2456 case 9:
2457 break;
2458
2459 default:
2460
2461 return -ENODEV;
2462 }
2463
2464 if ((err = pci_enable_device(pci)) < 0)
2465 return err;
2466
2467 spin_lock_init(&rme9652->lock);
2468
2469 if ((err = pci_request_regions(pci, "rme9652")) < 0)
2470 return err;
2471 rme9652->port = pci_resource_start(pci, 0);
2472 rme9652->iobase = ioremap_nocache(rme9652->port, RME9652_IO_EXTENT);
2473 if (rme9652->iobase == NULL) {
2474 snd_printk(KERN_ERR "unable to remap region 0x%lx-0x%lx\n", rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2475 return -EBUSY;
2476 }
2477
2478 if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED,
2479 "rme9652", rme9652)) {
2480 snd_printk(KERN_ERR "unable to request IRQ %d\n", pci->irq);
2481 return -EBUSY;
2482 }
2483 rme9652->irq = pci->irq;
2484 rme9652->precise_ptr = precise_ptr;
2485
2486
2487
2488
2489
2490
2491 status = rme9652_read(rme9652, RME9652_status_register);
2492 if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2493 rme9652->hw_rev = 15;
2494 } else {
2495 rme9652->hw_rev = 11;
2496 }
2497
2498
2499
2500
2501
2502
2503
2504
2505 switch (rev) {
2506 case 8:
2507 strcpy(card->driver, "RME9636");
2508 if (rme9652->hw_rev == 15) {
2509 rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2510 } else {
2511 rme9652->card_name = "RME Digi9636";
2512 }
2513 rme9652->ss_channels = RME9636_NCHANNELS;
2514 break;
2515 case 9:
2516 strcpy(card->driver, "RME9636");
2517 rme9652->card_name = "RME Digi9636 (Rev G)";
2518 rme9652->ss_channels = RME9636_NCHANNELS;
2519 break;
2520 case 4:
2521 strcpy(card->driver, "RME9652");
2522 rme9652->card_name = "RME Digi9652 (Rev G)";
2523 rme9652->ss_channels = RME9652_NCHANNELS;
2524 break;
2525 case 3:
2526 strcpy(card->driver, "RME9652");
2527 if (rme9652->hw_rev == 15) {
2528 rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2529 } else {
2530 rme9652->card_name = "RME Digi9652";
2531 }
2532 rme9652->ss_channels = RME9652_NCHANNELS;
2533 break;
2534 }
2535
2536 rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2537
2538 pci_set_master(rme9652->pci);
2539
2540 if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2541 return err;
2542 }
2543
2544 if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2545 return err;
2546 }
2547
2548 if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2549 return err;
2550 }
2551
2552 snd_rme9652_proc_init(rme9652);
2553
2554 rme9652->last_spdif_sample_rate = -1;
2555 rme9652->last_adat_sample_rate = -1;
2556 rme9652->playback_pid = -1;
2557 rme9652->capture_pid = -1;
2558 rme9652->capture_substream = NULL;
2559 rme9652->playback_substream = NULL;
2560
2561 snd_rme9652_set_defaults(rme9652);
2562
2563 if (rme9652->hw_rev == 15) {
2564 rme9652_initialize_spdif_receiver (rme9652);
2565 }
2566
2567 return 0;
2568}
2569
2570static void snd_rme9652_card_free(struct snd_card *card)
2571{
2572 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data;
2573
2574 if (rme9652)
2575 snd_rme9652_free(rme9652);
2576}
2577
2578static int __devinit snd_rme9652_probe(struct pci_dev *pci,
2579 const struct pci_device_id *pci_id)
2580{
2581 static int dev;
2582 struct snd_rme9652 *rme9652;
2583 struct snd_card *card;
2584 int err;
2585
2586 if (dev >= SNDRV_CARDS)
2587 return -ENODEV;
2588 if (!enable[dev]) {
2589 dev++;
2590 return -ENOENT;
2591 }
2592
2593 card = snd_card_new(index[dev], id[dev], THIS_MODULE,
2594 sizeof(struct snd_rme9652));
2595
2596 if (!card)
2597 return -ENOMEM;
2598
2599 rme9652 = (struct snd_rme9652 *) card->private_data;
2600 card->private_free = snd_rme9652_card_free;
2601 rme9652->dev = dev;
2602 rme9652->pci = pci;
2603 snd_card_set_dev(card, &pci->dev);
2604
2605 if ((err = snd_rme9652_create(card, rme9652, precise_ptr[dev])) < 0) {
2606 snd_card_free(card);
2607 return err;
2608 }
2609
2610 strcpy(card->shortname, rme9652->card_name);
2611
2612 sprintf(card->longname, "%s at 0x%lx, irq %d",
2613 card->shortname, rme9652->port, rme9652->irq);
2614
2615
2616 if ((err = snd_card_register(card)) < 0) {
2617 snd_card_free(card);
2618 return err;
2619 }
2620 pci_set_drvdata(pci, card);
2621 dev++;
2622 return 0;
2623}
2624
2625static void __devexit snd_rme9652_remove(struct pci_dev *pci)
2626{
2627 snd_card_free(pci_get_drvdata(pci));
2628 pci_set_drvdata(pci, NULL);
2629}
2630
2631static struct pci_driver driver = {
2632 .name = "RME Digi9652 (Hammerfall)",
2633 .id_table = snd_rme9652_ids,
2634 .probe = snd_rme9652_probe,
2635 .remove = __devexit_p(snd_rme9652_remove),
2636};
2637
2638static int __init alsa_card_hammerfall_init(void)
2639{
2640 return pci_register_driver(&driver);
2641}
2642
2643static void __exit alsa_card_hammerfall_exit(void)
2644{
2645 pci_unregister_driver(&driver);
2646}
2647
2648module_init(alsa_card_hammerfall_init)
2649module_exit(alsa_card_hammerfall_exit)
2650