1/* 2 * arch/arm/mach-at91/include/mach/hardware.h 3 * 4 * Copyright (C) 2003 SAN People 5 * Copyright (C) 2003 ATMEL 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 */ 13 14#ifndef __ASM_ARCH_HARDWARE_H 15#define __ASM_ARCH_HARDWARE_H 16 17#include <asm/sizes.h> 18 19#if defined(CONFIG_ARCH_AT91RM9200) 20#include <mach/at91rm9200.h> 21#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20) 22#include <mach/at91sam9260.h> 23#elif defined(CONFIG_ARCH_AT91SAM9261) || defined(CONFIG_ARCH_AT91SAM9G10) 24#include <mach/at91sam9261.h> 25#elif defined(CONFIG_ARCH_AT91SAM9263) 26#include <mach/at91sam9263.h> 27#elif defined(CONFIG_ARCH_AT91SAM9RL) 28#include <mach/at91sam9rl.h> 29#elif defined(CONFIG_ARCH_AT91SAM9G45) 30#include <mach/at91sam9g45.h> 31#elif defined(CONFIG_ARCH_AT91CAP9) 32#include <mach/at91cap9.h> 33#elif defined(CONFIG_ARCH_AT91X40) 34#include <mach/at91x40.h> 35#else 36#error "Unsupported AT91 processor" 37#endif 38 39 40#ifdef CONFIG_MMU 41/* 42 * Remap the peripherals from address 0xFFF78000 .. 0xFFFFFFFF 43 * to 0xFEF78000 .. 0xFF000000. (544Kb) 44 */ 45#define AT91_IO_PHYS_BASE 0xFFF78000 46#define AT91_IO_VIRT_BASE (0xFF000000 - AT91_IO_SIZE) 47#else 48/* 49 * Identity mapping for the non MMU case. 50 */ 51#define AT91_IO_PHYS_BASE AT91_BASE_SYS 52#define AT91_IO_VIRT_BASE AT91_IO_PHYS_BASE 53#endif 54 55#define AT91_IO_SIZE (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1) 56 57 /* Convert a physical IO address to virtual IO address */ 58#define AT91_IO_P2V(x) ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE) 59 60/* 61 * Virtual to Physical Address mapping for IO devices. 62 */ 63#define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS) 64#define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91RM9200_BASE_EMAC) 65 66 /* Internal SRAM is mapped below the IO devices */ 67#define AT91_SRAM_MAX SZ_1M 68#define AT91_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_MAX) 69 70/* Serial ports */ 71#define ATMEL_MAX_UART 7 /* 6 USART3's and one DBGU port (SAM9260) */ 72 73/* External Memory Map */ 74#define AT91_CHIPSELECT_0 0x10000000 75#define AT91_CHIPSELECT_1 0x20000000 76#define AT91_CHIPSELECT_2 0x30000000 77#define AT91_CHIPSELECT_3 0x40000000 78#define AT91_CHIPSELECT_4 0x50000000 79#define AT91_CHIPSELECT_5 0x60000000 80#define AT91_CHIPSELECT_6 0x70000000 81#define AT91_CHIPSELECT_7 0x80000000 82 83/* SDRAM */ 84#ifdef CONFIG_DRAM_BASE 85#define AT91_SDRAM_BASE CONFIG_DRAM_BASE 86#else 87#define AT91_SDRAM_BASE AT91_CHIPSELECT_1 88#endif 89 90/* Clocks */ 91#define AT91_SLOW_CLOCK 32768 /* slow clock */ 92 93 94#endif 95