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11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/dma-mapping.h>
15#include <linux/platform_device.h>
16#include <linux/gpio.h>
17#include <linux/leds.h>
18#include <linux/memory.h>
19
20#include <linux/i2c.h>
21#include <linux/i2c/pcf857x.h>
22#include <linux/i2c/at24.h>
23#include <linux/etherdevice.h>
24#include <linux/mtd/mtd.h>
25#include <linux/mtd/nand.h>
26#include <linux/mtd/partitions.h>
27#include <linux/mtd/physmap.h>
28#include <linux/io.h>
29#include <linux/phy.h>
30#include <linux/clk.h>
31#include <linux/videodev2.h>
32
33#include <media/tvp514x.h>
34
35#include <asm/setup.h>
36#include <asm/mach-types.h>
37
38#include <asm/mach/arch.h>
39#include <asm/mach/map.h>
40#include <asm/mach/flash.h>
41
42#include <mach/dm644x.h>
43#include <mach/common.h>
44#include <mach/i2c.h>
45#include <mach/serial.h>
46#include <mach/mux.h>
47#include <mach/psc.h>
48#include <mach/nand.h>
49#include <mach/mmc.h>
50#include <mach/emac.h>
51
52#define DM644X_EVM_PHY_MASK (0x2)
53#define DM644X_EVM_MDIO_FREQUENCY (2200000)
54
55#define DAVINCI_CFC_ATA_BASE 0x01C66000
56
57#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000
58#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
59#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
60#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE 0x06000000
61#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE 0x08000000
62
63#define LXT971_PHY_ID (0x001378e2)
64#define LXT971_PHY_MASK (0xfffffff0)
65
66static struct mtd_partition davinci_evm_norflash_partitions[] = {
67
68 {
69 .name = "bootloader",
70 .offset = 0,
71 .size = 5 * SZ_64K,
72 .mask_flags = MTD_WRITEABLE,
73 },
74
75 {
76 .name = "params",
77 .offset = MTDPART_OFS_APPEND,
78 .size = SZ_64K,
79 .mask_flags = 0,
80 },
81
82 {
83 .name = "kernel",
84 .offset = MTDPART_OFS_APPEND,
85 .size = SZ_2M,
86 .mask_flags = 0
87 },
88
89 {
90 .name = "filesystem",
91 .offset = MTDPART_OFS_APPEND,
92 .size = MTDPART_SIZ_FULL,
93 .mask_flags = 0
94 }
95};
96
97static struct physmap_flash_data davinci_evm_norflash_data = {
98 .width = 2,
99 .parts = davinci_evm_norflash_partitions,
100 .nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions),
101};
102
103
104
105static struct resource davinci_evm_norflash_resource = {
106 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
107 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
108 .flags = IORESOURCE_MEM,
109};
110
111static struct platform_device davinci_evm_norflash_device = {
112 .name = "physmap-flash",
113 .id = 0,
114 .dev = {
115 .platform_data = &davinci_evm_norflash_data,
116 },
117 .num_resources = 1,
118 .resource = &davinci_evm_norflash_resource,
119};
120
121
122
123
124
125struct mtd_partition davinci_evm_nandflash_partition[] = {
126
127
128
129
130
131
132
133 {
134 .name = "bootloader",
135 .offset = 0,
136 .size = SZ_256K + SZ_128K,
137 .mask_flags = MTD_WRITEABLE,
138 },
139
140 {
141 .name = "kernel",
142 .offset = MTDPART_OFS_APPEND,
143 .size = SZ_4M,
144 .mask_flags = 0,
145 },
146
147 {
148 .name = "filesystem",
149 .offset = MTDPART_OFS_APPEND,
150 .size = MTDPART_SIZ_FULL,
151 .mask_flags = 0,
152 }
153
154
155
156
157};
158
159static struct davinci_nand_pdata davinci_evm_nandflash_data = {
160 .parts = davinci_evm_nandflash_partition,
161 .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
162 .ecc_mode = NAND_ECC_HW,
163 .options = NAND_USE_FLASH_BBT,
164};
165
166static struct resource davinci_evm_nandflash_resource[] = {
167 {
168 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
169 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
170 .flags = IORESOURCE_MEM,
171 }, {
172 .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
173 .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
174 .flags = IORESOURCE_MEM,
175 },
176};
177
178static struct platform_device davinci_evm_nandflash_device = {
179 .name = "davinci_nand",
180 .id = 0,
181 .dev = {
182 .platform_data = &davinci_evm_nandflash_data,
183 },
184 .num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
185 .resource = davinci_evm_nandflash_resource,
186};
187
188static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
189
190static struct platform_device davinci_fb_device = {
191 .name = "davincifb",
192 .id = -1,
193 .dev = {
194 .dma_mask = &davinci_fb_dma_mask,
195 .coherent_dma_mask = DMA_BIT_MASK(32),
196 },
197 .num_resources = 0,
198};
199
200static struct tvp514x_platform_data tvp5146_pdata = {
201 .clk_polarity = 0,
202 .hs_polarity = 1,
203 .vs_polarity = 1
204};
205
206#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
207
208static struct v4l2_input tvp5146_inputs[] = {
209 {
210 .index = 0,
211 .name = "Composite",
212 .type = V4L2_INPUT_TYPE_CAMERA,
213 .std = TVP514X_STD_ALL,
214 },
215 {
216 .index = 1,
217 .name = "S-Video",
218 .type = V4L2_INPUT_TYPE_CAMERA,
219 .std = TVP514X_STD_ALL,
220 },
221};
222
223
224
225
226
227
228static struct vpfe_route tvp5146_routes[] = {
229 {
230 .input = INPUT_CVBS_VI2B,
231 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
232 },
233 {
234 .input = INPUT_SVIDEO_VI2C_VI1C,
235 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
236 },
237};
238
239static struct vpfe_subdev_info vpfe_sub_devs[] = {
240 {
241 .name = "tvp5146",
242 .grp_id = 0,
243 .num_inputs = ARRAY_SIZE(tvp5146_inputs),
244 .inputs = tvp5146_inputs,
245 .routes = tvp5146_routes,
246 .can_route = 1,
247 .ccdc_if_params = {
248 .if_type = VPFE_BT656,
249 .hdpol = VPFE_PINPOL_POSITIVE,
250 .vdpol = VPFE_PINPOL_POSITIVE,
251 },
252 .board_info = {
253 I2C_BOARD_INFO("tvp5146", 0x5d),
254 .platform_data = &tvp5146_pdata,
255 },
256 },
257};
258
259static struct vpfe_config vpfe_cfg = {
260 .num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
261 .sub_devs = vpfe_sub_devs,
262 .card_name = "DM6446 EVM",
263 .ccdc = "DM6446 CCDC",
264};
265
266static struct platform_device rtc_dev = {
267 .name = "rtc_davinci_evm",
268 .id = -1,
269};
270
271static struct resource ide_resources[] = {
272 {
273 .start = DAVINCI_CFC_ATA_BASE,
274 .end = DAVINCI_CFC_ATA_BASE + 0x7ff,
275 .flags = IORESOURCE_MEM,
276 },
277 {
278 .start = IRQ_IDE,
279 .end = IRQ_IDE,
280 .flags = IORESOURCE_IRQ,
281 },
282};
283
284static u64 ide_dma_mask = DMA_BIT_MASK(32);
285
286static struct platform_device ide_dev = {
287 .name = "palm_bk3710",
288 .id = -1,
289 .resource = ide_resources,
290 .num_resources = ARRAY_SIZE(ide_resources),
291 .dev = {
292 .dma_mask = &ide_dma_mask,
293 .coherent_dma_mask = DMA_BIT_MASK(32),
294 },
295};
296
297static struct snd_platform_data dm644x_evm_snd_data;
298
299
300
301
302
303
304
305#define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
306
307
308
309
310static struct gpio_led evm_leds[] = {
311 { .name = "DS8", .active_low = 1,
312 .default_trigger = "heartbeat", },
313 { .name = "DS7", .active_low = 1, },
314 { .name = "DS6", .active_low = 1, },
315 { .name = "DS5", .active_low = 1, },
316 { .name = "DS4", .active_low = 1, },
317 { .name = "DS3", .active_low = 1, },
318 { .name = "DS2", .active_low = 1,
319 .default_trigger = "mmc0", },
320 { .name = "DS1", .active_low = 1,
321 .default_trigger = "ide-disk", },
322};
323
324static const struct gpio_led_platform_data evm_led_data = {
325 .num_leds = ARRAY_SIZE(evm_leds),
326 .leds = evm_leds,
327};
328
329static struct platform_device *evm_led_dev;
330
331static int
332evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
333{
334 struct gpio_led *leds = evm_leds;
335 int status;
336
337 while (ngpio--) {
338 leds->gpio = gpio++;
339 leds++;
340 }
341
342
343
344
345 evm_led_dev = platform_device_alloc("leds-gpio", 0);
346 platform_device_add_data(evm_led_dev,
347 &evm_led_data, sizeof evm_led_data);
348
349 evm_led_dev->dev.parent = &client->dev;
350 status = platform_device_add(evm_led_dev);
351 if (status < 0) {
352 platform_device_put(evm_led_dev);
353 evm_led_dev = NULL;
354 }
355 return status;
356}
357
358static int
359evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
360{
361 if (evm_led_dev) {
362 platform_device_unregister(evm_led_dev);
363 evm_led_dev = NULL;
364 }
365 return 0;
366}
367
368static struct pcf857x_platform_data pcf_data_u2 = {
369 .gpio_base = PCF_Uxx_BASE(0),
370 .setup = evm_led_setup,
371 .teardown = evm_led_teardown,
372};
373
374
375
376
377static int sw_gpio;
378
379static ssize_t
380sw_show(struct device *d, struct device_attribute *a, char *buf)
381{
382 char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
383
384 strcpy(buf, s);
385 return strlen(s);
386}
387
388static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
389
390static int
391evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
392{
393 int status;
394
395
396 sw_gpio = gpio + 7;
397 status = gpio_request(sw_gpio, "user_sw");
398 if (status == 0)
399 status = gpio_direction_input(sw_gpio);
400 if (status == 0)
401 status = device_create_file(&client->dev, &dev_attr_user_sw);
402 else
403 gpio_free(sw_gpio);
404 if (status != 0)
405 sw_gpio = -EINVAL;
406
407
408 gpio_request(gpio + 3, "pll_fs2");
409 gpio_direction_output(gpio + 3, 0);
410
411 gpio_request(gpio + 2, "pll_fs1");
412 gpio_direction_output(gpio + 2, 0);
413
414 gpio_request(gpio + 1, "pll_sr");
415 gpio_direction_output(gpio + 1, 0);
416
417 return 0;
418}
419
420static int
421evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
422{
423 gpio_free(gpio + 1);
424 gpio_free(gpio + 2);
425 gpio_free(gpio + 3);
426
427 if (sw_gpio > 0) {
428 device_remove_file(&client->dev, &dev_attr_user_sw);
429 gpio_free(sw_gpio);
430 }
431 return 0;
432}
433
434static struct pcf857x_platform_data pcf_data_u18 = {
435 .gpio_base = PCF_Uxx_BASE(1),
436 .n_latch = (1 << 3) | (1 << 2) | (1 << 1),
437 .setup = evm_u18_setup,
438 .teardown = evm_u18_teardown,
439};
440
441
442
443
444static int
445evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
446{
447
448 gpio_request(gpio + 0, "nDRV_VBUS");
449 gpio_direction_output(gpio + 0, 1);
450
451
452 gpio_request(gpio + 1, "VDDIMX_EN");
453 gpio_direction_output(gpio + 1, 1);
454
455
456 gpio_request(gpio + 2, "VLYNQ_EN");
457 gpio_direction_output(gpio + 2, 1);
458
459
460 gpio_request(gpio + 3, "nCF_RESET");
461 gpio_direction_output(gpio + 3, 0);
462
463
464
465
466 gpio_request(gpio + 5, "WLAN_RESET");
467 gpio_direction_output(gpio + 5, 1);
468
469
470 gpio_request(gpio + 6, "nATA_SEL");
471 gpio_direction_output(gpio + 6, 0);
472
473
474 gpio_request(gpio + 7, "nCF_SEL");
475 gpio_direction_output(gpio + 7, 1);
476
477
478
479
480 setup_usb(500, 8);
481
482 return 0;
483}
484
485static int
486evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
487{
488 gpio_free(gpio + 7);
489 gpio_free(gpio + 6);
490 gpio_free(gpio + 5);
491 gpio_free(gpio + 3);
492 gpio_free(gpio + 2);
493 gpio_free(gpio + 1);
494 gpio_free(gpio + 0);
495 return 0;
496}
497
498static struct pcf857x_platform_data pcf_data_u35 = {
499 .gpio_base = PCF_Uxx_BASE(2),
500 .setup = evm_u35_setup,
501 .teardown = evm_u35_teardown,
502};
503
504
505
506
507
508
509
510
511
512static struct at24_platform_data eeprom_info = {
513 .byte_len = (256*1024) / 8,
514 .page_size = 64,
515 .flags = AT24_FLAG_ADDR16,
516 .setup = davinci_get_mac_addr,
517 .context = (void *)0x7f00,
518};
519
520
521
522
523
524
525static struct i2c_client *dm6446evm_msp;
526
527static int dm6446evm_msp_probe(struct i2c_client *client,
528 const struct i2c_device_id *id)
529{
530 dm6446evm_msp = client;
531 return 0;
532}
533
534static int dm6446evm_msp_remove(struct i2c_client *client)
535{
536 dm6446evm_msp = NULL;
537 return 0;
538}
539
540static const struct i2c_device_id dm6446evm_msp_ids[] = {
541 { "dm6446evm_msp", 0, },
542 { },
543};
544
545static struct i2c_driver dm6446evm_msp_driver = {
546 .driver.name = "dm6446evm_msp",
547 .id_table = dm6446evm_msp_ids,
548 .probe = dm6446evm_msp_probe,
549 .remove = dm6446evm_msp_remove,
550};
551
552static int dm6444evm_msp430_get_pins(void)
553{
554 static const char txbuf[2] = { 2, 4, };
555 char buf[4];
556 struct i2c_msg msg[2] = {
557 {
558 .addr = dm6446evm_msp->addr,
559 .flags = 0,
560 .len = 2,
561 .buf = (void __force *)txbuf,
562 },
563 {
564 .addr = dm6446evm_msp->addr,
565 .flags = I2C_M_RD,
566 .len = 4,
567 .buf = buf,
568 },
569 };
570 int status;
571
572 if (!dm6446evm_msp)
573 return -ENXIO;
574
575
576
577
578
579 status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
580 if (status < 0)
581 return status;
582
583 dev_dbg(&dm6446evm_msp->dev,
584 "PINS: %02x %02x %02x %02x\n",
585 buf[0], buf[1], buf[2], buf[3]);
586
587 return (buf[3] << 8) | buf[2];
588}
589
590static int dm6444evm_mmc_get_cd(int module)
591{
592 int status = dm6444evm_msp430_get_pins();
593
594 return (status < 0) ? status : !(status & BIT(1));
595}
596
597static int dm6444evm_mmc_get_ro(int module)
598{
599 int status = dm6444evm_msp430_get_pins();
600
601 return (status < 0) ? status : status & BIT(6 + 8);
602}
603
604static struct davinci_mmc_config dm6446evm_mmc_config = {
605 .get_cd = dm6444evm_mmc_get_cd,
606 .get_ro = dm6444evm_mmc_get_ro,
607 .wires = 4,
608 .version = MMC_CTLR_VERSION_1
609};
610
611static struct i2c_board_info __initdata i2c_info[] = {
612 {
613 I2C_BOARD_INFO("dm6446evm_msp", 0x23),
614 },
615 {
616 I2C_BOARD_INFO("pcf8574", 0x38),
617 .platform_data = &pcf_data_u2,
618 },
619 {
620 I2C_BOARD_INFO("pcf8574", 0x39),
621 .platform_data = &pcf_data_u18,
622 },
623 {
624 I2C_BOARD_INFO("pcf8574", 0x3a),
625 .platform_data = &pcf_data_u35,
626 },
627 {
628 I2C_BOARD_INFO("24c256", 0x50),
629 .platform_data = &eeprom_info,
630 },
631 {
632 I2C_BOARD_INFO("tlv320aic33", 0x1b),
633 },
634};
635
636
637
638
639static struct davinci_i2c_platform_data i2c_pdata = {
640 .bus_freq = 20 ,
641 .bus_delay = 100 ,
642};
643
644static void __init evm_init_i2c(void)
645{
646 davinci_init_i2c(&i2c_pdata);
647 i2c_add_driver(&dm6446evm_msp_driver);
648 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
649}
650
651static struct platform_device *davinci_evm_devices[] __initdata = {
652 &davinci_fb_device,
653 &rtc_dev,
654};
655
656static struct davinci_uart_config uart_config __initdata = {
657 .enabled_uarts = (1 << 0),
658};
659
660static void __init
661davinci_evm_map_io(void)
662{
663
664 dm644x_set_vpfe_config(&vpfe_cfg);
665 dm644x_init();
666}
667
668static int davinci_phy_fixup(struct phy_device *phydev)
669{
670 unsigned int control;
671
672
673
674
675
676 control = phy_read(phydev, 26);
677 phy_write(phydev, 26, (control | 0x800));
678 return 0;
679}
680
681#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
682 defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
683#define HAS_ATA 1
684#else
685#define HAS_ATA 0
686#endif
687
688#if defined(CONFIG_MTD_PHYSMAP) || \
689 defined(CONFIG_MTD_PHYSMAP_MODULE)
690#define HAS_NOR 1
691#else
692#define HAS_NOR 0
693#endif
694
695#if defined(CONFIG_MTD_NAND_DAVINCI) || \
696 defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
697#define HAS_NAND 1
698#else
699#define HAS_NAND 0
700#endif
701
702static __init void davinci_evm_init(void)
703{
704 struct clk *aemif_clk;
705 struct davinci_soc_info *soc_info = &davinci_soc_info;
706
707 aemif_clk = clk_get(NULL, "aemif");
708 clk_enable(aemif_clk);
709
710 if (HAS_ATA) {
711 if (HAS_NAND || HAS_NOR)
712 pr_warning("WARNING: both IDE and Flash are "
713 "enabled, but they share AEMIF pins.\n"
714 "\tDisable IDE for NAND/NOR support.\n");
715 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
716 davinci_cfg_reg(DM644X_ATAEN);
717 davinci_cfg_reg(DM644X_HDIREN);
718 platform_device_register(&ide_dev);
719 } else if (HAS_NAND || HAS_NOR) {
720 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
721 davinci_cfg_reg(DM644X_ATAEN_DISABLE);
722
723
724 if (HAS_NAND) {
725 platform_device_register(&davinci_evm_nandflash_device);
726 evm_leds[7].default_trigger = "nand-disk";
727 if (HAS_NOR)
728 pr_warning("WARNING: both NAND and NOR flash "
729 "are enabled; disable one of them.\n");
730 } else if (HAS_NOR)
731 platform_device_register(&davinci_evm_norflash_device);
732 }
733
734 platform_add_devices(davinci_evm_devices,
735 ARRAY_SIZE(davinci_evm_devices));
736 evm_init_i2c();
737
738 davinci_setup_mmc(0, &dm6446evm_mmc_config);
739
740 davinci_serial_init(&uart_config);
741 dm644x_init_asp(&dm644x_evm_snd_data);
742
743 soc_info->emac_pdata->phy_mask = DM644X_EVM_PHY_MASK;
744 soc_info->emac_pdata->mdio_max_freq = DM644X_EVM_MDIO_FREQUENCY;
745
746
747 phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
748 davinci_phy_fixup);
749
750}
751
752static __init void davinci_evm_irq_init(void)
753{
754 davinci_irq_init();
755}
756
757MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
758
759 .phys_io = IO_PHYS,
760 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
761 .boot_params = (DAVINCI_DDR_BASE + 0x100),
762 .map_io = davinci_evm_map_io,
763 .init_irq = davinci_evm_irq_init,
764 .timer = &davinci_timer,
765 .init_machine = davinci_evm_init,
766MACHINE_END
767