1/* 2 * arch/arm/mach-ep93xx/include/mach/hardware.h 3 */ 4#ifndef __ASM_ARCH_HARDWARE_H 5#define __ASM_ARCH_HARDWARE_H 6 7#include <mach/ep93xx-regs.h> 8#include <mach/platform.h> 9 10#define pcibios_assign_all_busses() 0 11 12/* 13 * The EP93xx has two external crystal oscillators. To generate the 14 * required high-frequency clocks, the processor uses two phase-locked- 15 * loops (PLLs) to multiply the incoming external clock signal to much 16 * higher frequencies that are then divided down by programmable dividers 17 * to produce the needed clocks. The PLLs operate independently of one 18 * another. 19 */ 20#define EP93XX_EXT_CLK_RATE 14745600 21#define EP93XX_EXT_RTC_RATE 32768 22 23#define EP93XX_KEYTCHCLK_DIV4 (EP93XX_EXT_CLK_RATE / 4) 24#define EP93XX_KEYTCHCLK_DIV16 (EP93XX_EXT_CLK_RATE / 16) 25 26#endif 27