LXR linux/arch/arm/mach-footbridge/include/mach/system.h

   1/*
   2 *  arch/arm/mach-footbridge/include/mach/system.h
   3 *
   4 *  Copyright (C) 1996-1999 Russell King.
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License version 2 as
   8 * published by the Free Software Foundation.
   9 */
  10#include <linux/io.h>
  11#include <asm/hardware/dec21285.h>
  12#include <mach/hardware.h>
  13#include <asm/leds.h>
  14#include <asm/mach-types.h>
  15
  16static inline void arch_idle(void)
  17{
  18        cpu_do_idle();
  19}
  20
  21static inline void arch_reset(char mode, const char *cmd)
  22{
  23        if (mode == 's') {
  24                /*
  25                 * Jump into the ROM
  26                 */
  27                cpu_reset(0x41000000);
  28        } else {
  29                if (machine_is_netwinder()) {
  30                        /* open up the SuperIO chip
  31                         */
  32                        outb(0x87, 0x370);
  33                        outb(0x87, 0x370);
  34
  35                        /* aux function group 1 (logical device 7)
  36                         */
  37                        outb(0x07, 0x370);
  38                        outb(0x07, 0x371);
  39
  40                        /* set GP16 for WD-TIMER output
  41                         */
  42                        outb(0xe6, 0x370);
  43                        outb(0x00, 0x371);
  44
  45                        /* set a RED LED and toggle WD_TIMER for rebooting
  46                         */
  47                        outb(0xc4, 0x338);
  48                } else {
  49                        /* 
  50                         * Force the watchdog to do a CPU reset.
  51                         *
  52                         * After making sure that the watchdog is disabled
  53                         * (so we can change the timer registers) we first
  54                         * enable the timer to autoreload itself.  Next, the
  55                         * timer interval is set really short and any
  56                         * current interrupt request is cleared (so we can
  57                         * see an edge transition).  Finally, TIMER4 is
  58                         * enabled as the watchdog.
  59                         */
  60                        *CSR_SA110_CNTL &= ~(1 << 13);
  61                        *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE |
  62                                           TIMER_CNTL_AUTORELOAD |
  63                                           TIMER_CNTL_DIV16;
  64                        *CSR_TIMER4_LOAD = 0x2;
  65                        *CSR_TIMER4_CLR  = 0;
  66                        *CSR_SA110_CNTL |= (1 << 13);
  67                }
  68        }
  69}
  70