LXR linux/arch/arm/mach-ixp4xx/include/mach/cpu.h

   1/*
   2 * arch/arm/mach-ixp4xx/include/mach/cpu.h
   3 *
   4 * IXP4XX cpu type detection
   5 *
   6 * Copyright (C) 2007 MontaVista Software, Inc.
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License version 2 as
  10 * published by the Free Software Foundation.
  11 *
  12 */
  13
  14#ifndef __ASM_ARCH_CPU_H__
  15#define __ASM_ARCH_CPU_H__
  16
  17#include <asm/cputype.h>
  18
  19/* Processor id value in CP15 Register 0 */
  20#define IXP42X_PROCESSOR_ID_VALUE       0x690541c0 /* including unused 0x690541Ex */
  21#define IXP42X_PROCESSOR_ID_MASK        0xffffffc0
  22
  23#define IXP43X_PROCESSOR_ID_VALUE       0x69054040
  24#define IXP43X_PROCESSOR_ID_MASK        0xfffffff0
  25
  26#define IXP46X_PROCESSOR_ID_VALUE       0x69054200 /* including IXP455 */
  27#define IXP46X_PROCESSOR_ID_MASK        0xfffffff0
  28
  29#define cpu_is_ixp42x_rev_a0() ((read_cpuid_id() & (IXP42X_PROCESSOR_ID_MASK | 0xF)) == \
  30                                IXP42X_PROCESSOR_ID_VALUE)
  31#define cpu_is_ixp42x() ((read_cpuid_id() & IXP42X_PROCESSOR_ID_MASK) == \
  32                         IXP42X_PROCESSOR_ID_VALUE)
  33#define cpu_is_ixp43x() ((read_cpuid_id() & IXP43X_PROCESSOR_ID_MASK) == \
  34                         IXP43X_PROCESSOR_ID_VALUE)
  35#define cpu_is_ixp46x() ((read_cpuid_id() & IXP46X_PROCESSOR_ID_MASK) == \
  36                         IXP46X_PROCESSOR_ID_VALUE)
  37
  38static inline u32 ixp4xx_read_feature_bits(void)
  39{
  40        u32 val = ~*IXP4XX_EXP_CFG2;
  41
  42        if (cpu_is_ixp42x_rev_a0())
  43                return IXP42X_FEATURE_MASK & ~(IXP4XX_FEATURE_RCOMP |
  44                                               IXP4XX_FEATURE_AES);
  45        if (cpu_is_ixp42x())
  46                return val & IXP42X_FEATURE_MASK;
  47        if (cpu_is_ixp43x())
  48                return val & IXP43X_FEATURE_MASK;
  49        return val & IXP46X_FEATURE_MASK;
  50}
  51
  52static inline void ixp4xx_write_feature_bits(u32 value)
  53{
  54        *IXP4XX_EXP_CFG2 = ~value;
  55}
  56
  57#endif  /* _ASM_ARCH_CPU_H */
  58