LXR linux/arch/arm/mach-msm/include/mach/dma.h

   1/* linux/include/asm-arm/arch-msm/dma.h
   2 *
   3 * Copyright (C) 2007 Google, Inc.
   4 *
   5 * This software is licensed under the terms of the GNU General Public
   6 * License version 2, as published by the Free Software Foundation, and
   7 * may be copied, distributed, and modified under those terms.
   8 *
   9 * This program is distributed in the hope that it will be useful,
  10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 * GNU General Public License for more details.
  13 *
  14 */
  15
  16#ifndef __ASM_ARCH_MSM_DMA_H
  17
  18#include <linux/list.h>
  19#include <mach/msm_iomap.h>
  20
  21struct msm_dmov_errdata {
  22        uint32_t flush[6];
  23};
  24
  25struct msm_dmov_cmd {
  26        struct list_head list;
  27        unsigned int cmdptr;
  28        void (*complete_func)(struct msm_dmov_cmd *cmd,
  29                              unsigned int result,
  30                              struct msm_dmov_errdata *err);
  31};
  32
  33void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd);
  34void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful);
  35int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr);
  36
  37
  38
  39#define DMOV_SD0(off, ch) (MSM_DMOV_BASE + 0x0000 + (off) + ((ch) << 2))
  40#define DMOV_SD1(off, ch) (MSM_DMOV_BASE + 0x0400 + (off) + ((ch) << 2))
  41#define DMOV_SD2(off, ch) (MSM_DMOV_BASE + 0x0800 + (off) + ((ch) << 2))
  42#define DMOV_SD3(off, ch) (MSM_DMOV_BASE + 0x0C00 + (off) + ((ch) << 2))
  43
  44/* only security domain 3 is available to the ARM11
  45 * SD0 -> mARM trusted, SD1 -> mARM nontrusted, SD2 -> aDSP, SD3 -> aARM
  46 */
  47
  48#define DMOV_CMD_PTR(ch)      DMOV_SD3(0x000, ch)
  49#define DMOV_CMD_LIST         (0 << 29) /* does not work */
  50#define DMOV_CMD_PTR_LIST     (1 << 29) /* works */
  51#define DMOV_CMD_INPUT_CFG    (2 << 29) /* untested */
  52#define DMOV_CMD_OUTPUT_CFG   (3 << 29) /* untested */
  53#define DMOV_CMD_ADDR(addr)   ((addr) >> 3)
  54
  55#define DMOV_RSLT(ch)         DMOV_SD3(0x040, ch)
  56#define DMOV_RSLT_VALID       (1 << 31) /* 0 == host has empties result fifo */
  57#define DMOV_RSLT_ERROR       (1 << 3)
  58#define DMOV_RSLT_FLUSH       (1 << 2)
  59#define DMOV_RSLT_DONE        (1 << 1)  /* top pointer done */
  60#define DMOV_RSLT_USER        (1 << 0)  /* command with FR force result */
  61
  62#define DMOV_FLUSH0(ch)       DMOV_SD3(0x080, ch)
  63#define DMOV_FLUSH1(ch)       DMOV_SD3(0x0C0, ch)
  64#define DMOV_FLUSH2(ch)       DMOV_SD3(0x100, ch)
  65#define DMOV_FLUSH3(ch)       DMOV_SD3(0x140, ch)
  66#define DMOV_FLUSH4(ch)       DMOV_SD3(0x180, ch)
  67#define DMOV_FLUSH5(ch)       DMOV_SD3(0x1C0, ch)
  68
  69#define DMOV_STATUS(ch)       DMOV_SD3(0x200, ch)
  70#define DMOV_STATUS_RSLT_COUNT(n)    (((n) >> 29))
  71#define DMOV_STATUS_CMD_COUNT(n)     (((n) >> 27) & 3)
  72#define DMOV_STATUS_RSLT_VALID       (1 << 1)
  73#define DMOV_STATUS_CMD_PTR_RDY      (1 << 0)
  74
  75#define DMOV_ISR              DMOV_SD3(0x380, 0)
  76
  77#define DMOV_CONFIG(ch)       DMOV_SD3(0x300, ch)
  78#define DMOV_CONFIG_FORCE_TOP_PTR_RSLT (1 << 2)
  79#define DMOV_CONFIG_FORCE_FLUSH_RSLT   (1 << 1)
  80#define DMOV_CONFIG_IRQ_EN             (1 << 0)
  81
  82/* channel assignments */
  83
  84#define DMOV_NAND_CHAN        7
  85#define DMOV_NAND_CRCI_CMD    5
  86#define DMOV_NAND_CRCI_DATA   4
  87
  88#define DMOV_SDC1_CHAN        8
  89#define DMOV_SDC1_CRCI        6
  90
  91#define DMOV_SDC2_CHAN        8
  92#define DMOV_SDC2_CRCI        7
  93
  94#define DMOV_TSIF_CHAN        10
  95#define DMOV_TSIF_CRCI        10
  96
  97#define DMOV_USB_CHAN         11
  98
  99/* no client rate control ifc (eg, ram) */
 100#define DMOV_NONE_CRCI        0
 101
 102
 103/* If the CMD_PTR register has CMD_PTR_LIST selected, the data mover
 104 * is going to walk a list of 32bit pointers as described below.  Each
 105 * pointer points to a *array* of dmov_s, etc structs.  The last pointer
 106 * in the list is marked with CMD_PTR_LP.  The last struct in each array
 107 * is marked with CMD_LC (see below).
 108 */
 109#define CMD_PTR_ADDR(addr)  ((addr) >> 3)
 110#define CMD_PTR_LP          (1 << 31) /* last pointer */
 111#define CMD_PTR_PT          (3 << 29) /* ? */
 112
 113/* Single Item Mode */
 114typedef struct {
 115        unsigned cmd;
 116        unsigned src;
 117        unsigned dst;
 118        unsigned len;
 119} dmov_s;
 120
 121/* Scatter/Gather Mode */
 122typedef struct {
 123        unsigned cmd;
 124        unsigned src_dscr;
 125        unsigned dst_dscr;
 126        unsigned _reserved;
 127} dmov_sg;
 128
 129/* Box mode */
 130typedef struct {
 131        uint32_t cmd;
 132        uint32_t src_row_addr;
 133        uint32_t dst_row_addr;
 134        uint32_t src_dst_len;
 135        uint32_t num_rows;
 136        uint32_t row_offset;
 137} dmov_box;
 138
 139/* bits for the cmd field of the above structures */
 140
 141#define CMD_LC      (1 << 31)  /* last command */
 142#define CMD_FR      (1 << 22)  /* force result -- does not work? */
 143#define CMD_OCU     (1 << 21)  /* other channel unblock */
 144#define CMD_OCB     (1 << 20)  /* other channel block */
 145#define CMD_TCB     (1 << 19)  /* ? */
 146#define CMD_DAH     (1 << 18)  /* destination address hold -- does not work?*/
 147#define CMD_SAH     (1 << 17)  /* source address hold -- does not work? */
 148
 149#define CMD_MODE_SINGLE     (0 << 0) /* dmov_s structure used */
 150#define CMD_MODE_SG         (1 << 0) /* untested */
 151#define CMD_MODE_IND_SG     (2 << 0) /* untested */
 152#define CMD_MODE_BOX        (3 << 0) /* untested */
 153
 154#define CMD_DST_SWAP_BYTES  (1 << 14) /* exchange each byte n with byte n+1 */
 155#define CMD_DST_SWAP_SHORTS (1 << 15) /* exchange each short n with short n+1 */
 156#define CMD_DST_SWAP_WORDS  (1 << 16) /* exchange each word n with word n+1 */
 157
 158#define CMD_SRC_SWAP_BYTES  (1 << 11) /* exchange each byte n with byte n+1 */
 159#define CMD_SRC_SWAP_SHORTS (1 << 12) /* exchange each short n with short n+1 */
 160#define CMD_SRC_SWAP_WORDS  (1 << 13) /* exchange each word n with word n+1 */
 161
 162#define CMD_DST_CRCI(n)     (((n) & 15) << 7)
 163#define CMD_SRC_CRCI(n)     (((n) & 15) << 3)
 164
 165#endif
 166