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20#include <linux/module.h>
21#include <linux/platform_device.h>
22#include <linux/serial.h>
23#include <linux/gpio.h>
24#include <mach/hardware.h>
25#include <mach/irqs.h>
26#include <mach/imx-uart.h>
27
28static struct resource uart0[] = {
29 {
30 .start = MXC91231_UART1_BASE_ADDR,
31 .end = MXC91231_UART1_BASE_ADDR + 0x0B5,
32 .flags = IORESOURCE_MEM,
33 }, {
34 .start = MXC91231_INT_UART1_RX,
35 .end = MXC91231_INT_UART1_RX,
36 .flags = IORESOURCE_IRQ,
37 }, {
38 .start = MXC91231_INT_UART1_TX,
39 .end = MXC91231_INT_UART1_TX,
40 .flags = IORESOURCE_IRQ,
41 }, {
42 .start = MXC91231_INT_UART1_MINT,
43 .end = MXC91231_INT_UART1_MINT,
44 .flags = IORESOURCE_IRQ,
45 },
46};
47
48struct platform_device mxc_uart_device0 = {
49 .name = "imx-uart",
50 .id = 0,
51 .resource = uart0,
52 .num_resources = ARRAY_SIZE(uart0),
53};
54
55static struct resource uart1[] = {
56 {
57 .start = MXC91231_UART2_BASE_ADDR,
58 .end = MXC91231_UART2_BASE_ADDR + 0x0B5,
59 .flags = IORESOURCE_MEM,
60 }, {
61 .start = MXC91231_INT_UART2_RX,
62 .end = MXC91231_INT_UART2_RX,
63 .flags = IORESOURCE_IRQ,
64 }, {
65 .start = MXC91231_INT_UART2_TX,
66 .end = MXC91231_INT_UART2_TX,
67 .flags = IORESOURCE_IRQ,
68 }, {
69 .start = MXC91231_INT_UART2_MINT,
70 .end = MXC91231_INT_UART2_MINT,
71 .flags = IORESOURCE_IRQ,
72 },
73};
74
75struct platform_device mxc_uart_device1 = {
76 .name = "imx-uart",
77 .id = 1,
78 .resource = uart1,
79 .num_resources = ARRAY_SIZE(uart1),
80};
81
82static struct resource uart2[] = {
83 {
84 .start = MXC91231_UART3_BASE_ADDR,
85 .end = MXC91231_UART3_BASE_ADDR + 0x0B5,
86 .flags = IORESOURCE_MEM,
87 }, {
88 .start = MXC91231_INT_UART3_RX,
89 .end = MXC91231_INT_UART3_RX,
90 .flags = IORESOURCE_IRQ,
91 }, {
92 .start = MXC91231_INT_UART3_TX,
93 .end = MXC91231_INT_UART3_TX,
94 .flags = IORESOURCE_IRQ,
95 }, {
96 .start = MXC91231_INT_UART3_MINT,
97 .end = MXC91231_INT_UART3_MINT,
98 .flags = IORESOURCE_IRQ,
99
100 },
101};
102
103struct platform_device mxc_uart_device2 = {
104 .name = "imx-uart",
105 .id = 2,
106 .resource = uart2,
107 .num_resources = ARRAY_SIZE(uart2),
108};
109
110
111static struct mxc_gpio_port mxc_gpio_ports[] = {
112 [0] = {
113 .chip.label = "gpio-0",
114 .base = MXC91231_IO_ADDRESS(MXC91231_GPIO1_AP_BASE_ADDR),
115 .irq = MXC91231_INT_GPIO1,
116 .virtual_irq_start = MXC_GPIO_IRQ_START,
117 },
118 [1] = {
119 .chip.label = "gpio-1",
120 .base = MXC91231_IO_ADDRESS(MXC91231_GPIO2_AP_BASE_ADDR),
121 .irq = MXC91231_INT_GPIO2,
122 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
123 },
124 [2] = {
125 .chip.label = "gpio-2",
126 .base = MXC91231_IO_ADDRESS(MXC91231_GPIO3_AP_BASE_ADDR),
127 .irq = MXC91231_INT_GPIO3,
128 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
129 },
130 [3] = {
131 .chip.label = "gpio-3",
132 .base = MXC91231_IO_ADDRESS(MXC91231_GPIO4_SH_BASE_ADDR),
133 .irq = MXC91231_INT_GPIO4,
134 .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
135 },
136};
137
138int __init mxc_register_gpios(void)
139{
140 return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports));
141}
142
143static struct resource mxc_nand_resources[] = {
144 {
145 .start = MXC91231_NFC_BASE_ADDR,
146 .end = MXC91231_NFC_BASE_ADDR + 0xfff,
147 .flags = IORESOURCE_MEM
148 }, {
149 .start = MXC91231_INT_NANDFC,
150 .end = MXC91231_INT_NANDFC,
151 .flags = IORESOURCE_IRQ
152 },
153};
154
155struct platform_device mxc_nand_device = {
156 .name = "mxc_nand",
157 .id = 0,
158 .num_resources = ARRAY_SIZE(mxc_nand_resources),
159 .resource = mxc_nand_resources,
160};
161
162static struct resource mxc_sdhc0_resources[] = {
163 {
164 .start = MXC91231_MMC_SDHC1_BASE_ADDR,
165 .end = MXC91231_MMC_SDHC1_BASE_ADDR + SZ_16K - 1,
166 .flags = IORESOURCE_MEM,
167 }, {
168 .start = MXC91231_INT_MMC_SDHC1,
169 .end = MXC91231_INT_MMC_SDHC1,
170 .flags = IORESOURCE_IRQ,
171 },
172};
173
174static struct resource mxc_sdhc1_resources[] = {
175 {
176 .start = MXC91231_MMC_SDHC2_BASE_ADDR,
177 .end = MXC91231_MMC_SDHC2_BASE_ADDR + SZ_16K - 1,
178 .flags = IORESOURCE_MEM,
179 }, {
180 .start = MXC91231_INT_MMC_SDHC2,
181 .end = MXC91231_INT_MMC_SDHC2,
182 .flags = IORESOURCE_IRQ,
183 },
184};
185
186struct platform_device mxc_sdhc_device0 = {
187 .name = "mxc-mmc",
188 .id = 0,
189 .num_resources = ARRAY_SIZE(mxc_sdhc0_resources),
190 .resource = mxc_sdhc0_resources,
191};
192
193struct platform_device mxc_sdhc_device1 = {
194 .name = "mxc-mmc",
195 .id = 1,
196 .num_resources = ARRAY_SIZE(mxc_sdhc1_resources),
197 .resource = mxc_sdhc1_resources,
198};
199
200static struct resource mxc_cspi0_resources[] = {
201 {
202 .start = MXC91231_CSPI1_BASE_ADDR,
203 .end = MXC91231_CSPI1_BASE_ADDR + 0x20,
204 .flags = IORESOURCE_MEM,
205 }, {
206 .start = MXC91231_INT_CSPI1,
207 .end = MXC91231_INT_CSPI1,
208 .flags = IORESOURCE_IRQ,
209 },
210};
211
212struct platform_device mxc_cspi_device0 = {
213 .name = "spi_imx",
214 .id = 0,
215 .num_resources = ARRAY_SIZE(mxc_cspi0_resources),
216 .resource = mxc_cspi0_resources,
217};
218
219static struct resource mxc_cspi1_resources[] = {
220 {
221 .start = MXC91231_CSPI2_BASE_ADDR,
222 .end = MXC91231_CSPI2_BASE_ADDR + 0x20,
223 .flags = IORESOURCE_MEM,
224 }, {
225 .start = MXC91231_INT_CSPI2,
226 .end = MXC91231_INT_CSPI2,
227 .flags = IORESOURCE_IRQ,
228 },
229};
230
231struct platform_device mxc_cspi_device1 = {
232 .name = "spi_imx",
233 .id = 1,
234 .num_resources = ARRAY_SIZE(mxc_cspi1_resources),
235 .resource = mxc_cspi1_resources,
236};
237
238static struct resource mxc_wdog0_resources[] = {
239 {
240 .start = MXC91231_WDOG1_BASE_ADDR,
241 .end = MXC91231_WDOG1_BASE_ADDR + 0x10,
242 .flags = IORESOURCE_MEM,
243 },
244};
245
246struct platform_device mxc_wdog_device0 = {
247 .name = "mxc-wdt",
248 .id = 0,
249 .num_resources = ARRAY_SIZE(mxc_wdog0_resources),
250 .resource = mxc_wdog0_resources,
251};
252
